Laura Carrington

Laura Carrington is a researcher at the University of California, San Diego, specializing in High Performance Computing (HPC) with a focus on energy efficiency, memory management, and performance optimization. She has contributed to the development of tools like PEBIL for binary instrumentation, ADAMANT for data movement analysis, and frameworks for power management in large-scale systems.

Her research spans multiple domains including ARM processor evaluation, Xeon Phi vectorization, and communication reduction in graph algorithms. Key collaborations include work with Michael Laurenzano, Allan Snavely, Ananta Tiwari, and Pietro Cicotti. Laura's work addresses critical challenges in HPC such as DVFS configuration optimization, workload colocation, and energy-aware algorithm design.

While no explicit academic rank is stated, her extensive publication record across 2002-2019 in top venues like SC, IPDPS, and IJHPCA establishes her as a significant contributor to HPC research. Her work has influenced practices in system-level power management, scientific application characterization, and energy-efficient computing for both CPU/DRAM domains and emerging memory technologies.