Jien-Chung Lo

Professor Jien-Chung Lo is a faculty member in the Department of Electrical, Computer, and Biomedical Engineering at the University of Rhode Island (URI), where he holds the rank of Professor. His research focuses on Digital Circuit Designs on FPGA, VLSI Testing and Reliability, and System-on-Chip and Hardware Accelerators. He has contributed to advancements in circuit reliability, testing methodologies, and error detection techniques, with notable work on concurrent error detection in arithmetic operations and built-in current sensors.

Education:

• Ph.D., Computer Engineering, University of Southwestern Louisiana (1989)
• M.S., Computer Engineering, University of Southwestern Louisiana (1987)
• B.S., Electronics Engineering, Taipei University of Technology (1981)

Research Interests: Lo’s work emphasizes practical applications of circuit design and testing, including FPGA-based systems, VLSI reliability, and fault-tolerant hardware. His patented innovations include methods for on-chip power management and programmable jitter generation, reflecting his expertise in bridging theoretical research with real-world engineering challenges.

Patents and Contributions: Three key patents highlight his impact:

• Systems and Methods for On-Chip Power Management (US Patent 7902802, 2011)
• Programmable Jitter Signal Generator (LinkedIn Corp., 2006)
• Check Bit Code Circuit for Error Correction (US Secretary of Navy, 1995)

Advising and Grants: While no formal advisees are listed, Lo’s research projects likely involve collaborative efforts with graduate students and industry partners. His work aligns with URI’s engineering initiatives, focusing on advancing hardware reliability and system design.

Labs and Teams: Affiliated with URI’s Engineering department, his research leverages interdisciplinary collaborations to address challenges in embedded systems, signal processing, and fault-tolerant computing.