Ji-Yong Shin

Ji-Yong Shin is an Assistant Professor in the Khoury College of Computer Sciences at Northeastern University, where he has been faculty since 2020. Previously, he served as an Associate Research Scientist at Yale University after completing his Ph.D. at Cornell University. His research bridges systems design and formal verification to ensure correctness in complex distributed systems.

His educational background includes:

• Ph.D. in Computer Science from Cornell University

Professor Shin's research focuses on co-designing systems and formal verification methods to simplify correctness proofs without sacrificing performance. Key areas include distributed systems (consensus protocols like Raft/Paxos), serverless computing for stateful applications, cloud storage leveraging emerging hardware (persistent memory, RDMA), and system support for deep neural networks. His Atomic Distributed Objects (ADO) model abstracts network behaviors to enable compositional reasoning of distributed systems.

His publication trend (2020-2025) shows consistent contributions to top-tier venues (PLDI, OOPSLA, NSDI, VLDB), with recent work emphasizing blockchain verification (LiDO-DAG), reconfiguration protocols (ReCraft), and storage systems (FusionFlow). This reflects a cohesive research trajectory where formal methods solve practical systems challenges in distributed computing.

His scientific recognition includes:

• NSF CAREER Award (2025)

He currently advises PhD student Bryant Curto and actively recruits new students, focusing on systems and formal methods. His funded research includes an NSF FMitF grant (2020) with Zhong Shao and Robert Soule for formal methods in cloud infrastructure. He also serves in leadership roles including HotStorage 2025 Co-General Chair and PC member for OOPSLA 2026, NSDI 2026, and USENIX ATC 2025.

Professor Shin jointly runs the systems research group at Northeastern, collaborating on projects spanning distributed systems verification, serverless computing enhancements, and storage system optimizations using next-generation hardware.