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Supratik ChakrabortyView profile

Professor

• Formal Methods
• Formal Verification
• Automated Synthesis
• +7 more

Supratik Chakraborty serves as the Bajaj Group Chair Professor in the Department of Computer Science and Engineering at Indian Institute of Technology Bombay. He maintains dual affiliations with the Centre for Formal Design and Verification of Software and the Centre for Liberal Education at IIT Bombay, demonstrating his cross-disciplinary engagement. Professor Chakraborty's research spans formal methods with focus on formal verification, rigorous analysis of system models, and automated synthesis of systems from specifications. His work bridges theoretical foundations with practical applications, particularly in developing mathematically provable guarantees for increasingly complex hardware, software, and intelligent systems. Current research interests include constrained counting and sampling, scalable formal verification of software and hardware systems, automated synthesis of programs and circuits, and applications of automata, logic and finite model theory to practical verification challenges. His publication trajectory shows a significant evolution from traditional hardware and software verification toward addressing verification challenges in machine learning and AI systems. Recent work increasingly focuses on interpretability of black-box models, verification of neural networks, and synthesis techniques applicable to intelligent systems. The research demonstrates strong interdisciplinary connections between formal methods, programming languages, and artificial intelligence. IIT Bombay Excellence in Thesis (CSE) Award 2011 (for Bhargav Gulavani's thesis) IIT Bombay Excellence in Thesis (CSE) Award 2017 (for Abhisekh Sankaran's thesis) Best Paper in Algorithms and Architecture track at IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1998 Professor Chakraborty has successfully supervised 11 doctoral students, with research spanning formal verification techniques, Boolean functional synthesis, constrained counting, and applications to hardware and software systems. His students have gone on to positions at major institutions including Microsoft Research, TCS Research, Georgia Tech, and BARC, reflecting the strong industry and academic impact of his mentorship. Current research directions show increasing emphasis on verification challenges posed by machine learning systems and AI. His research group at IIT Bombay, while not explicitly named in the materials, appears to focus on formal methods with strong connections to the Centre for Formal Design and Verification of Software. The group maintains active collaborations with international researchers including Moshe Y. Vardi at Rice University, and has made significant contributions to verification tools like VeriAbs that bridge theoretical advances with practical applications.

Conor RyanView profile

Professor

• Genetic Programming
• Genetic Algorithms
• Grammatical Evolution
• +7 more

Conor Ryan is a Professor in the Department of Computer Science & Information Systems at the University of Limerick. He is a Science Foundation Ireland-funded Investigator since 2002 and a member of multiple research centres including Lero – the Irish Software Research Centre and the Limerick Digital Cancer Research Centre. His research focuses on Genetic Programming, Grammatical Evolution, and their applications in domains like healthcare analytics, digital circuit design, and financial modeling. He has authored over 250 publications, with recent work emphasizing automated feature selection in medical diagnostics, neural architecture search, and blockchain ecosystems. Teaching includes courses on Foundations of Computer Science and Computer Games Programming. Research interests span evolutionary computation, machine learning, and interdisciplinary applications. Collaborations involve global institutions, reflecting his work's impact across computer science, engineering, and healthcare. His research has addressed challenges in breast cancer diagnosis via genetic algorithms, cryptocurrency volatility prediction using random forests, and automated generation of digital circuits. Ongoing projects explore interpretability in AI, energy-efficient computing, and sustainable transport systems through predictive analytics. Professional memberships include roles in the Centre for Research Training in Foundations of Data Science and the Data-Driven Computer Engineering Research Centre, underscoring his commitment to interdisciplinary innovation.

Debjit PalView profile

Research Fellow

• Machine Learning for Electronic Design Automation (EDA)
• System-on-Chip (SoC) Verification
• Hardware Verification
• +6 more

Debjit Pal is a Post-Doctoral Associate at the School of Electrical and Computer Engineering, Cornell University, and a member of the Computer Systems Laboratory. His research focuses on machine learning techniques for hardware verification, SoC validation, and FPGA optimization. Education: Ph.D. in Computer Engineering (University of Illinois at Urbana-Champaign, 2019) M.S. in Computer Science (IIT Kharagpur, 2012) B.E. in Electronics Engineering (Jadavpur University, 2008) Research Interests: Machine Learning for Electronic Design Automation (EDA) System-on-Chip (SoC) Verification Edge Intelligence as a Service Compiler Optimizations for Reconfigurable and High-Performance Computing Scientific Awards: IEEE CEDA Student Research Award (2016) Best Paper Nomination (ICCAD 2015, DAC 2018, ASP-DAC 2019) E. J. McCluskey Best Doctoral Thesis Competition Semi-Finalist (2020) Travel Grants for ICCAD/DAC/ASPDAC (2018-2019) Professional Roles: Technical Program Committee Member (DAC, VLSID), Reviewer (IEEE TVLSI, DATE, ICCAD). Collaborates with researchers like Zhiru Zhang and Shobha Vasudevan.

• Network Security
• Android Security
• Malware Analysis
• +6 more

Vijay Laxmi is a Professor in the Department of Computer Science and Engineering at Malaviya National Institute of Technology (MNIT) Jaipur, India. With over a decade of active research publication from 2014-2024, Dr. Laxmi has established themselves as a prominent researcher in network security, Android security systems, and Network-on-Chip architectures. Their work demonstrates consistent collaboration with Manoj Singh Gaur and numerous doctoral students at MNIT Jaipur. Dr. Laxmi's research interests span Network Security, Android Security, Malware Analysis, Network-on-Chip Architectures, Routing Protocols, Side-Channel Attacks, Wireless Networks, and Mobile Security. Their work bridges theoretical security frameworks with practical implementations, particularly in mobile and embedded systems. Recent publications indicate a growing focus on AI-based security approaches including GAN applications for fuzzing and deep learning for image dehazing. The research trajectory shows increasing sophistication in security analysis techniques, evolving from basic malware detection to advanced side-channel attack analysis and sophisticated network security protocols. Recent publications demonstrate expertise in both theoretical frameworks and practical implementations with applications in real-world security challenges. Dr. Laxmi has mentored numerous graduate students including Vineeta Jain, Anugrah Jain, Sonal Yadav, Mohit Singh, and Gaurav Singal, who appear as co-authors across multiple publications. Their collaborative network extends to researchers at international institutions, indicating strong academic connections beyond their home institution.

Tobi DelbruckView profile

Professor

• Neuromorphic Engineering
• Event-Based Vision Systems
• Silicon Retinas
• +6 more

Tobi Delbruck is a titular professor of physics and electrical engineering at ETH Zurich, where he leads the Sensors Group at the Institute for Neuroinformatics (INI) in Zurich, Switzerland. He collaborates closely with Shih-Chii Liu and Giacomo Indiveri as part of the 'hardware groups' at INI. Delbruck has also served as visiting faculty at Caltech and is a Fellow of the IEEE. His work focuses on bio-inspired and neuromorphic event-based sensory processing systems. Professor Delbruck's research spans multiple areas of neuromorphic engineering, with particular emphasis on event-based vision systems and low-power analog VLSI circuits. His work has significantly advanced the field of Dynamic Vision Sensors (DVS), which mimic the human retina's response to changes in brightness rather than capturing full frames. This approach enables extremely low-latency vision processing with minimal power consumption, making it ideal for high-speed applications and robotics. His research has applications in robotics, autonomous systems, and low-power embedded vision. Delbruck is an active contributor to the neuromorphic engineering community, co-organizing the annual Telluride Workshop on Neuromorphic Engineering and serving in leadership roles with IEEE. He has authored numerous influential publications and co-authored books including "Event-Based Neuromorphic Systems" and "Analog VLSI: Circuits and Principles." His jAER (Java Address-Event Representation) project provides open-source tools for real-time event-based sensory processing. Analysis of his recent publications shows a clear trend toward integrating event-based vision with deep learning techniques and applying these systems to practical robotics problems. His scientific achievements have been recognized with multiple awards including: IEEE Fellow Winner of Best Live Demonstration award at ISCAS 2012 Honorable Mention Award from Sensory Systems Technical Committee at ISCAS 2012 Overall Best Student Paper Award and Best Paper Award from Sensory Systems Technical Committee at ISCAS 2010 Winner of the 2006 ISSCC Jan Van Vessem Outstanding European Paper Award Professor Delbruck actively mentors students and has supervised numerous PhD and Master's theses in the areas of neuromorphic engineering and event-based vision systems. His group has secured significant research funding from various sources to support their innovative work in bio-inspired sensory processing. He teaches courses on "Electronics for Physicists II (Digital)" and "Neuromorphic Engineering," helping to train the next generation of researchers in this field. The Sensors Group at INI, which Delbruck leads, operates state-of-the-art facilities for designing and testing neuromorphic vision systems. The group maintains close collaborations with researchers worldwide and has developed several important open-source resources including the jAER project and bias generator design kits. Their work continues to push the boundaries of what's possible with event-based sensory processing, with applications ranging from high-speed robotics to low-power embedded vision systems.

Bharat BhuvaView profile

Professor

• Computer-Aided Design
• Radiation Effects on Electronics
• Semiconductor Device Modeling
• +3 more

Professor Bharat Bhuva is a faculty member in the School of Engineering at Vanderbilt University, holding the position of Professor of Electrical Engineering and Computer Engineering . His research focuses on radiation effects on integrated circuits, semiconductor device modeling, and VLSI design, with an emphasis on advancing the resilience of nanoscale electronics against single-event effects and total-ionizing-dose damage. He also investigates emerging technologies like FinFET and FDSOI for improved radiation hardness and performance. Education: Ph.D. in Electrical Engineering, North Carolina State University M.S. in Electrical Engineering, North Carolina State University B.S. in Electrical Engineering, Maharaja Sayajirao University Research Interests: Professor Bhuva’s work spans computer-aided design tools, semiconductor process modeling, and the mitigation of radiation-induced failures in advanced integrated circuits. His studies address challenges posed by scaling to smaller technology nodes (e.g., 3-nm FinFET) and the impact of environmental factors like temperature, bias conditions, and neutron exposure on circuit reliability. Key areas include multicell upsets, single-event upset (SEU) cross-section analysis, and the efficacy of radiation-hardened-by-design (RHBD) techniques. Awards & Recognition: None explicitly listed in the provided text. However, his extensive publications in top-tier journals like IEEE Transactions on Nuclear Science highlight his contributions to the field. Grants & Advising: Advises on projects related to advanced semiconductor technologies and radiation effects. His research has been supported by grants from institutions focusing on space electronics and nanotechnology. No specific grant details or student advisees are listed. Labs & Teams: Likely affiliated with Vanderbilt’s Cyber-physical Systems and Nano Science and Technology research neighborhoods, though specific lab names are not mentioned in the text.

Suman DattaView profile

Professor

• Semiconductor Devices
• Nanotechnology
• VLSI Systems
• +7 more

Suman Datta is a Professor at the Georgia Institute of Technology , holding the Joseph M. Pettit Chair in Advanced Computing and Georgia Research Alliance Eminent Scholar titles. He has a joint appointment with the School of Materials Science and Engineering. Education : B.Tech in Electrical Engineering from IIT Kanpur; Ph.D. in Electrical and Computer Engineering from the University of Cincinnati. Prior Appointments : Stinson Endowed Chair Professor of Nanotechnology at University of Notre Dame (2015–2022); Professor at Penn State (2007–2015); Intel Corporation (1999–2007) in Advanced Transistor Group. Research Interests : His work focuses on high-performance heterogeneous computing using advanced CMOS and beyond-CMOS semiconductors. Key areas include ferroelectric field-effect transistors (FeFETs) , cryogenic computing , in-memory computing , and brain-inspired computing . He explores materials like ferroelectric gate stacks , insulator-to-metal phase transition oxides , and high-mobility oxides for next-generation compute architectures. Recent Article Trends : His group’s publications emphasize BEOL-compatible oxide transistors , negative capacitance , radiation-resilient devices , and machine learning-aided modeling . Subfields include low-voltage memory , 3D Ising machines , dynamic logic at cryogenic temperatures , and monolithic integration of power delivery systems. Scientific Awards : IEEE Fellow (2013) for contributions to transistor technologies NAI Fellow (2016) for societal impact via patents Intel Achievement Award (2003) for high-k/metal gate CMOS Intel Logic Technology Quality Award (2002) for Tri-gate transistors SEMI Award (2012) for high-k dielectrics Penn State Outstanding/ Premier Research Awards (2012, 2015) Advising & Grants : He has mentored students like Wriddhi Chakraborty , Khandker Akif Aabrar , and Sourav Dutta . His research is funded by SRC , DARPA , and NSF , including leadership of the ASCENT and EXCEL centers. Labs & Collaborations : Datta directs the STAR Lab at Georgia Tech, which specializes in atomistic modeling , nanofabrication , and compact model development . The lab collaborates with industry giants like Intel , Micron , and IBM through the ASCENT center.

Hailong JiaoView profile

Assistant Professor

• low-power VLSI circuit design
• variations-resilient systems
• error-resilient systems
• +10 more

Hailong Jiao is an Assistant Professor in the Department of Electrical Engineering at Eindhoven University of Technology (TU/e) and an Associate Professor at Peking University Shenzhen Graduate School's School of Electronic and Computer Engineering. He is also a Visiting Assistant Professor with TU/e's Electronic Systems group. His research focuses on low-power and variations-resilient VLSI circuit and system design , including error-resilient systems, approximate computing, machine learning in VLSI, ultra-low voltage circuits, and emerging devices like 3D integration and carbon electronics. Education : BSc (highest honor, 2004, Shandong University), MSc (2008, Institute of Microelectronics, Chinese Academy of Sciences), PhD (2012, HKUST). Collaborations : BrainWave project (TU/e and Radboud University Nijmegen) developing wearable brainwave processing for epilepsy/Parkinson's healthcare. Editorial Roles : Associate Editor for Elsevier Microelectronics Journal and World Scientific Journal of Circuits, Systems, and Computers. Committee Memberships : HiPEAC, MemoCiS, ACM/SIGDA, and six IEEE committees. Research Trends : Recent articles emphasize energy-efficient IoT networks , voltage stacking , sensitivity control , and scan flip-flop design , aligning with UN SDGs for energy engineering and healthcare innovation. Scientific awards include highest honor at BSc .

• Microelectronics
• Nanotechnology
• RF Engineering
• +3 more

Prof. Dr. Amelie Hagelauer holds a professorship in Micro- and Nanosystem Technology at the TUM School of Computation, Information and Technology, Technical University of Munich. Her work focuses on advanced electronics and systems integration across quantum computing hardware, resistive memory technologies, and high-frequency RF systems. She has contributed to innovations in superconducting qubit readout architectures, multi-level RRAM designs, and 3D-integrated CMOS-compatible quantum devices. Research interests span quantum hardware design, nanoelectronic devices, RF front-end systems, and emerging memory technologies. Her work emphasizes practical implementation challenges such as low-power operation, high-voltage handling in RF switches, and wafer-scale fabrication processes. Recent projects include D-band radar systems, energy-efficient 60 GHz transceivers, and antenna tuning solutions for 5G applications. Publications from 2023-2025 showcase advancements in resistive switching device characterization, mitigation of TLS losses in superconducting qubits, and reconfigurable AI accelerators using RRAM-based digital twins. Her work bridges theoretical device physics with practical integrated circuit design, addressing scalability and reliability in next-gen electronics. Awards and grants: None explicitly listed in provided texts. Active collaborations include EU-funded projects on quantum computing platforms and TUM's Electronic Photonic Integration initiatives. Leads research teams in microsystem technology with emphasis on cross-disciplinary approaches combining CMOS processes, MEMS, and quantum engineering.

• integrated system design
• quantum computation
• information security
• +4 more

Nozomu Togawa is a Professor at Waseda University's Faculty of Science and Engineering, School of Fundamental Science and Engineering, specializing in Computer Science. He has held this position since 2009 and also serves as Chief Scientific Officer (CSO) of Quanmatic Inc. since 2022. With a PhD in Engineering from Waseda University (1997), his academic journey includes positions at Waseda University and the University of Kitakyushu before his current professorship. His research interests focus on integrated system design , quantum computation , and information security . Togawa has published extensively with over 368 papers and significant citation metrics (Scopus h-index: 23, Google Scholar h-index: 28). His work bridges theoretical quantum computing with practical security applications, particularly in hardware security and IoT systems. Togawa's research demonstrates a clear progression from traditional hardware security toward quantum-inspired computing solutions. His recent publications focus on Ising machines, quantum annealing, and hardware Trojan detection, showing how quantum approaches can solve complex optimization problems in security contexts. He has made significant contributions to applying quantum computing techniques to practical problems like course selection optimization, travel planning, and hardware security verification. Among his notable recognitions are the Minister of Education, Culture, Sports, Science and Technology Award for Science and Technology (2018), SCOPE Results Development Promotion Award (2022), and multiple Best Paper Awards. He serves on important committees including the Ministry of Internal Affairs and Communications Cyber Security Task Force and the Institute of Electronics, Information and Communication Engineers' VLSI Design Technology Research Committee. Togawa actively mentors students who frequently appear as co-authors on his publications. His research group produces high-impact work in quantum computing applications and hardware security, with strong industry connections through his CSO role at Quanmatic Inc. He has received substantial research funding supporting his innovative work at the intersection of quantum computing and security.

Chih-Hung ChenView profile

Professor

• Biomedical Technologies
• Microelectronics & VLSI
• Digital & Smart Systems
• +5 more

Dr. Chih-Hung (James) Chen is a Professor in the Department of Electrical & Computer Engineering at McMaster University. His research focuses on noise-related issues in semiconductor devices, low-noise circuit design for medical and communication applications, and thermal noise characterization in nano-scale transistors. He holds senior member status in IEEE and is a licensed Professional Engineer in Ontario. Education: Ph.D., McMaster University, 2002 M.A.Sc., Simon Fraser University, 1997 B.Sc., National Central University, Taiwan, 1991 Research interests include biomedical technologies, microelectronics & VLSI, and digital/smart systems. He has collaborated with companies like Sony Corporation, United Microelectronics Corporation, and Focus Microwaves. His work is supported by grants from the Canada Foundation for Innovation (CFI), NSERC, and the Ontario Innovation Trust (OIT). Notable achievements include serving on the International Advisory Committee of the International Conference on Noise and Fluctuations (2015) and as an editor for the Journal of Low Power Electronics and Applications since 2022. Teaching includes courses like Analysis and Design of RF ICs for Communications and Electronic Devices and Circuits 2. His research lab focuses on advancing noise measurement techniques and designing ultra-low-power analog circuits for emerging applications.

• Neuromorphic Computing
• Hardware Accelerators
• VLSI Circuits
• +5 more

Prof. Dr. Tobias Gemmeke is a University Professor at RWTH Aachen University's Faculty of Electrical Engineering and Information Technology, leading the Chair of Integrated Digital Systems and Circuit Design. His work focuses on neuromorphic computing, hardware accelerators, and energy-efficient electronics. He has pioneered advancements in FPGA-based computational neuroscience simulators, neuromorphic processor architectures, and sensor integration for industrial and medical applications. Research interests include time-domain computing, ReRAM reliability, and co-optimization of neural networks with hardware. Notable contributions include the neuroAIx framework for accelerated neuroscience simulations and energy-efficient ASIC designs for post-quantum cryptography. He actively explores memristive devices and domain generalization techniques for edge computing. Recent publications highlight innovations in spiking neural networks, sensor systems for plain bearings, and time-domain compute-in-memory engines. His work bridges theoretical neuroscience with practical hardware implementations, emphasizing scalability and real-time performance.

Shantanu DuttView profile

Professor

• VLSI CAD
• Discrete Optimization
• FPGA Testing and Trusted Design
• +2 more

Shantanu Dutt is a full Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago , located in Chicago, IL. His office is in 930 SEO at 851 S. Morgan St, and he can be reached at dutt@uic.edu . Education Ph.D. in Computer Science and Engineering, University of Michigan, Ann Arbor (1990) M.Tech. in Computer Engineering, Indian Institute of Technology Kharagpur (1984) B.E. in Electronics and Communication Engineering, Maharaja Sayajirao University of Baroda (1983) Research Interests Professor Dutt’s research agenda centers on VLSI Computer-Aided Design (CAD) , with particular emphasis on physical design and incremental synthesis targeting both ASICs and FPGAs. He explores discrete optimization techniques to solve placement, routing, and partitioning problems. Another major thrust is FPGA built-in self-test (BIST) and trusted design , ensuring provable diagnosability and security against hardware Trojans. He also investigates fault-tolerant computing at both chip and system levels, and develops parallel and distributed computing algorithms for scalable performance. Scientific Awards 1996 Best Paper Award , ACM/IEEE Design Automation Conference, for “A probability-based approach to VLSI circuit partitioning” 1995 Most Influential Paper Award , Fault-Tolerant Computing Symposium, for “Design and reconfiguration strategies for near-optimal k-fault-tolerant tree architectures” Research Impact and Funding Professor Dutt has published extensively in top-tier journals (IEEE TVLSI, ACM TRETS, IEEE TCAD) and premier conferences (ICCAD, DAC, DATE, FTCS). His work has shaped incremental placement, timing-driven routing, FPGA security, and fault-tolerant multiprocessor architectures. While specific grant numbers are not listed, the breadth and longevity of his publication record indicate sustained funding from NSF, industry, and other agencies. Laboratory and Collaborations Although no formal laboratory name is provided, Professor Dutt’s research is conducted within the ECE department’s VLSI CAD and Fault-Tolerance groups, collaborating with graduate students and colleagues across the US and internationally.

• Embedded Systems
• Cyber-Physical Systems
• Computer Architecture
• +5 more

Aviral Shrivastava is a Professor at the School of Computing and Augmented Intelligence, Arizona State University, leading the Make Programming Simple Lab. He holds a Ph.D. and M.S. from the University of California-Irvine (2006, 2002) and a Bachelor’s from IIT Delhi (1999). His research focuses on making programming simple for embedded and cyber-physical systems, with a particular interest in manycore and accelerated computing, software for CPS, and resilient/fault-tolerant computing. He has co-authored over 120 publications in top venues like DAC, ESWEEK, and ACM TECS, with more than 3000 citations and 5 granted patents. His work has been recognized with multiple awards, including the 2010 NSF CAREER award and best paper nominations. Research Areas: Embedded and Cyber-Physical Systems Compiler Design for Modern Architectures Resilient and Fault-Tolerant Computing Scientific Awards: 2010 NSF CAREER award DAC 2017 Best Paper Award Candidate VLSI 2016 Best Student Paper Award LCTES 2010 Second Highest Ranked Paper ASPDAC 2008 Best Paper Candidate Advising & Grants: He has mentored 9 Ph.D. and over 20 Masters students. His research has been funded by NSF, DOE, NIST, SFAZ, and industry partners, totaling $3.5M. He teaches courses on computer organization, architecture, and embedded systems, with student evaluations averaging over 4/5. He also serves as General Chair of Embedded Systems Week (ESWEEK) and holds editorial roles in IEEE ESL, ACM TCPS, and ACM TECS.

• Microelectronics
• Analog/Digital Circuit Design
• Ultra Low Power Circuits
• +1 more

Snorre Aunet is a Professor at the Department of Electronic Systems at the Norwegian University of Science and Technology (NTNU), with additional roles as an Adjunct Professor at the Department of Informatics, University of Oslo. His academic career spans institutions in Norway, Germany, and the USA, including sabbaticals at Bielefeld University and University of California, San Diego. Education: Electronics Engineering (Trondheim Technical College, 1987), Informatics (UiO, 1993), and Physical Electronics (NTNU, 2002) Research Focus Dr. Aunet specializes in ultra-low-power mixed-signal integrated circuits and nanoscale CMOS technologies . His work includes innovative MEMS transducer designs for energy harvesting, digital IC development, and robust circuit solutions for emerging semiconductor challenges. Recent Publications His recent contributions include advancements in MEMS technology for sustainable energy systems, editorial leadership at NorCAS conferences, and policy discussions on the European Chips Act. These reflect expertise in both cutting-edge design and strategic technology development. Scientific Recognition 2019: Elected to Norwegian Academy of Technical Sciences (NTVA) 2015: Best Paper Award at Asia Symposium on Quality Electronic Design 2006: IEEE Senior Member (Electron Devices Society) 2003: Best Poster Award at Int'l Conf. on Evolvable Systems Leadership & Grants He has chaired multiple IEEE conferences and contributed to projects like Robust Ultra-Low-Power Circuits for Nano-Scale CMOS (NTNU/University of Paderborn). His career combines academic leadership with industry collaboration through Nordic Semiconductor and international research councils.