Prof. Dr. Amelie Hagelauer holds a professorship in Micro- and Nanosystem Technology at the TUM School of Computation, Information and Technology, Technical University of Munich. Her work focuses on advanced electronics and systems integration across quantum computing hardware, resistive memory technologies, and high-frequency RF systems. She has contributed to innovations in superconducting qubit readout architectures, multi-level RRAM designs, and 3D-integrated CMOS-compatible quantum devices. Research interests span quantum hardware design, nanoelectronic devices, RF front-end systems, and emerging memory technologies. Her work emphasizes practical implementation challenges such as low-power operation, high-voltage handling in RF switches, and wafer-scale fabrication processes. Recent projects include D-band radar systems, energy-efficient 60 GHz transceivers, and antenna tuning solutions for 5G applications. Publications from 2023-2025 showcase advancements in resistive switching device characterization, mitigation of TLS losses in superconducting qubits, and reconfigurable AI accelerators using RRAM-based digital twins. Her work bridges theoretical device physics with practical integrated circuit design, addressing scalability and reliability in next-gen electronics. Awards and grants: None explicitly listed in provided texts. Active collaborations include EU-funded projects on quantum computing platforms and TUM's Electronic Photonic Integration initiatives. Leads research teams in microsystem technology with emphasis on cross-disciplinary approaches combining CMOS processes, MEMS, and quantum engineering.
Christian Enz is a Full Professor at École Polytechnique Fédérale de Lausanne (EPFL), where he serves as Director of the Institute of Microengineering and Head of the Integrated Circuits Laboratory. With M.S. and Ph.D. degrees in electrical engineering from EPFL (1984 and 1989), he has established himself as a leading researcher in low-power analog circuit design and semiconductor device modeling. His research interests focus on very low-power analog and RF IC design , semiconductor device modeling , and increasingly on cryogenic electronics for quantum computing applications . Professor Enz is particularly known for his work on FDSOI MOSFET behavior at cryogenic temperatures, developing comprehensive models that address challenges in subthreshold swing saturation, threshold voltage shifts, and self-heating effects. As a Life Fellow of IEEE with 282 publications and over 7,400 citations, Professor Enz has made significant contributions to the field. His recent work demonstrates how the $G_{m}/I_{D}$ design methodology remains effective in advanced technology nodes and can be extended to cryogenic temperature operation. His research bridges fundamental semiconductor physics with practical circuit design considerations for quantum computing interfaces. Life Fellow, IEEE Director of the Institute of Microengineering, EPFL Head of the Integrated Circuits Laboratory 282 publications with 7,400+ citations Specialist in cryogenic CMOS for quantum computing Professor Enz's work on cryogenic electronics addresses critical challenges for quantum computing scalability. By developing accurate models for transistor behavior at temperatures as low as 3.3K, his research enables the design of specialized control electronics that can operate inside dilution refrigerators, potentially solving major wiring constraints that currently limit quantum computer scaling. His laboratory continues to advance the understanding of semiconductor device physics at cryogenic temperatures while developing practical circuit design methodologies for this emerging application domain.
Kyojin Choo is a Tenure Track Assistant Professor at the Swiss Federal Institute of Technology Lausanne (EPFL) in the School of Engineering , affiliated with the Mixed-Signal Integrated Circuits Lab (MSIC-LAB). He also holds teaching roles in Microengineering and Electrical and Electronics Engineering at EPFL. B.S. and M.S. in Electrical Engineering from Seoul National University (2007, 2009) Ph.D. in Electrical Engineering from the University of Michigan (2018) His research focuses on charge-domain analog/mixed-signal circuits , low-power sensor interfaces , and compact ADCs for IoT, wearables, and millimeter-scale systems. He has pioneered charge-injection cell techniques for energy-efficient circuits in energy management, sensor front-ends, and communication. His work emphasizes reducing power consumption to nanowatt levels while enabling ultra-compact designs. His recent publications highlight advancements in compact SAR ADCs , low-power MEMS accelerometers , millimeter-scale imaging systems , and ultra-low-power timing generators . His research integrates charge-domain circuit design with sensor interface optimization , energy harvesting , and high-speed link architectures . He holds over 20 US patents and has taught courses in Microengineering and Electrical Engineering at EPFL. His group (MSIC-LAB) addresses challenges in battery-free sensor design, power-constrained system scaling, and commercialization of wearables with unconventional form factors.
Donald Lie is a Professor and the Keh-Shew Lu Regents Chair in Electrical and Computer Engineering at Texas Tech University's Whitacre College of Engineering. His research focuses on low-power RF/analog integrated circuits, System-on-a-Chip (SoC) design, and interdisciplinary applications in medical electronics, biosensors, and biosignal processing. PhD, Electrical Engineering, California Institute of Technology (1995) MS, Electrical Engineering, California Institute of Technology (1990) BS, Electrical Engineering, National Taiwan University (1987) Donald Lie's research bridges RF/analog circuit design with biomedical engineering, emphasizing millimeter-wave power amplifiers for 5G systems and non-contact vital signs monitoring using software-defined radio (SDR). His work explores CMOS FD-SOI, GaN HEMTs, and SiGe technologies for high-efficiency, linear RF front-end modules and wearable biosensors. His 15 most recent publications focus on 5G communication systems , millimeter-wave power amplifier design in CMOS FD-SOI and GaN , digital predistortion techniques, and non-contact biosensors . These works highlight advancements in wideband amplifiers for 5G FR2 bands and wireless power transfer for medical devices. Institute of Electrical and Electronics Engineers (2017) Excellent Paper Award Winner (2019) Best Student Poster Paper Award Winner (2019) Donald Lie has secured NSF Student Travel Grants for conferences like RFIC 2022 and 2020. He leads the RF/Analog System-on-a-Chip (SoC) Design Lab , which develops innovative solutions for 5G RF front-ends and biomedical sensing systems.
Ian Sellers is Professor in Electrical Engineering at University at Buffalo's School of Engineering and Applied Sciences. He specializes in next-generation solar cells and materials for space photovoltaics, with appointments including Marie Curie Fellow (2004-2006) and Visiting Academic Fellow at Oxford (2009-2012). His research examines: Novel photovoltaic materials and architectures Ultra-low power electronic systems MEMS-based sensors and energy harvesters Beyond-CMOS computing technologies Recent publications demonstrate advances in ultra-low power sensor design (MEMS accelerometers), energy-efficient computing (MESO technology), and miniaturized imaging systems. The work shows consistent focus on optimizing power efficiency through innovations in circuit design, materials integration, and system architecture. Before joining UB, Sellers held positions as Presidential Professor at University of Oklahoma and Senior Research Scientist at Sharp Labs of Europe. His international collaborations include extended research stays in France and the UK.
Bipin Rajendran is a Professor of Intelligent Computing Systems at King's College London, based in the Department of Engineering within the Faculty of Natural, Mathematical & Engineering Sciences. He directs the King's Laboratory for Intelligent Computing and co-leads the Centre for Intelligent Information Processing (CIIPS). Previously, he held positions at IBM Research and academic institutions in the U.S. and India. His research focuses on algorithms, devices, and systems for intelligent computing, emphasizing neuromorphic computing, memristive devices, and hardware-software co-design. Education: B.Tech, IIT Kharagpur (2000) M.S. and Ph.D., Electrical Engineering, Stanford University (2003, 2006) Research Interests: Rajendran's work spans hardware-software co-design, novel materials for neuromorphic systems, event-driven computing algorithms, and energy-efficient AI hardware. His contributions include foundational research on memristive devices for spiking neural networks and phase-change memory-based learning systems. Grants & Awards: He has received funding from EPSRC, NSF, European Commission, and industry partners like Intel and IBM. Notable awards include the IBM Faculty Award (2019) and election to the U.S. National Academy of Inventors (2019). Labs & Initiatives: Leads the King's Laboratory for Intelligent Computing and collaborates on projects like NeuroComm (6G neuromorphic comms) and SGAI (green AI systems). His work bridges nanoscale devices with AI algorithms for sustainable computing.
Pierre-Emmanuel Gaillardon is a Professor in the Department of Electrical & Computer Engineering and Adjunct Professor in the School of Computing at the University of Utah. He holds a joint appointment since July 2024, having previously served as Assistant Professor (2016–2019) and Adjunct Assistant Professor in Computing (2016–2019). His research focuses on FPGA design, VLSI systems, nanoelectronics, and hardware security. He leads projects in emerging devices like TIGFETs, compute-in-memory architectures, and radiation-hardened FPGA fabrics. Teaching includes courses on Digital VLSI Design, Embedded Systems Design, and thesis supervision. He has secured grants from NSF, DARPA, and industry partners totaling over $10M, addressing topics like FPGA redaction, neuromorphic systems, and environmental sensors. Notable awards include the NSF CAREER Award (2018) and IEEE Senior Member elevation (2016). He actively serves on IEEE committees for nanoelectronics and EDA tools, contributing to standards like OpenFPGA.
Marco Donato is an Assistant Professor in both the Department of Electrical and Computer Engineering and the Department of Computer Science at Tufts University. He leads the TECS Lab (Testchip, Embedded Computing Systems) focused on hardware design for emerging applications. Prior to joining Tufts, he was a postdoctoral fellow at Harvard University's John A. Paulson School of Engineering and Applied Sciences. Dr. Donato received his academic training from prestigious institutions: Ph.D. in Electrical Sciences and Computer Engineering from Brown University (2016) M.Sc. in Electrical Engineering from Università di Roma La Sapienza, Rome, Italy (2010) B.Sc. in Electrical Engineering from Università di Roma La Sapienza, Rome, Italy (2008) Dr. Donato's research primarily focuses on designing reliable and energy-efficient hardware systems leveraging emerging technologies. His work centers on co-design methodologies for building specialized architectures for machine learning applications that utilize dense, fault-prone embedded non-volatile memories. He investigates noise modeling and reliability aspects of next-generation memory technologies, with particular emphasis on how these can be effectively integrated into system-on-chip (SoC) designs for edge computing and IoT applications. His research bridges the gap between circuit-level design and system-level architecture to create holistic solutions for hardware acceleration of machine learning workloads. Analysis of Dr. Donato's publication record reveals a strong focus on hardware acceleration for machine learning, particularly through innovative memory system designs. His work spans multiple domains including non-volatile memory technologies, energy-efficient circuit design, and flexible SoC architectures. A notable trend is his exploration of how emerging memory technologies can be leveraged to create more efficient implementations of deep neural networks, with particular attention to the trade-offs between reliability, density, and energy consumption. His research often involves full-stack approaches that consider everything from device physics to system architecture. Dr. Donato is actively involved in mentoring and has indicated he is "looking for Ph.D. students." His work has been supported by significant research grants that have enabled the fabrication of multiple test chips, as evidenced by his extensive publication record in top-tier venues including IEEE Journal of Solid-State Circuits, ISSCC, and MICRO. He leads the TECS Lab at Tufts University, which focuses on testchip development, embedded computing systems, and hardware acceleration. The lab appears to maintain connections with researchers at Harvard University and other institutions, reflecting Dr. Donato's collaborative approach to research. The lab's work emphasizes practical, real-world implementations of novel hardware concepts through actual silicon fabrication, which is relatively rare in academic settings.
Per-Erik Hellström is a Professor at KTH Royal Institute of Technology, affiliated with the Department of Electronics and Embedded Systems. His research focuses on semiconductor process technology, particularly the heterogeneous integration of materials like SiGe, Ge, high-κ dielectrics, and metal gates with Si CMOS to advance integrated circuits. He leads KTH's FDSOI CMOS process and circuit technology, emphasizing sequential 3D integration for future CMOS developments. Additionally, he manages the Si and SiC process line at Electrum Laboratory, overseeing tool maintenance, process control, and upgrades. Researcher ID: ORCID Location: Kistagangen 16 Email: pereh@kth.se His work involves developing nanometer-sized transistors through double patterning techniques and studying material integration for enhanced device performance. He teaches courses in electrical circuits, semiconductor devices, and nanotechnology at both Bachelor's and Master's levels, including Electrical Engineering (IF1330) , Embedded Electronics (IE1206) , and Introduction to Integrated Circuits (IL2241) . He also supervises degree projects and exams. Scientific achievements include the 2020 G03 Best Paper Award for gate stack research. His recent publications highlight advancements in Type-II superlattices, 3D integration, and high-temperature sensors. Key collaborators include PhD students working on nanotechnology and process engineering.
Labros Bisdounis is a Professor at the Department of Electrical and Computer Engineering, University of the Peloponnese, Greece. He previously held positions at the Technological Educational Institute of Western Greece, including Associate Professor, Full Professor, and Dean of the School of Technological Applications (2016–2018). He has extensive industry experience as a senior research engineer and project manager at Intracom S.A. (2000–2008), focusing on VLSI circuits and telecom applications. His research interests include CMOS circuit timing/power modeling, low-power/high-speed design, MOSFET modeling, and sensor applications. He has authored over 30 papers with 740+ citations and is an IEEE member. Education: Diploma in Electrical Engineering (1992), University of Patras Ph.D. in Electrical Engineering (1999), University of Patras Research Interests: CMOS circuit timing and power dissipation modeling Deep-submicron/nano-CMOS circuit design MOSFET device modeling Low-power embedded systems and SoC Sensor applications and organic electronics Leadership Roles: Dean of the School of Engineering, University of the Peloponnese (2023–present) Director of Training & Lifelong Learning Centre (2019–2019) Board Member, Hellenic NARIC (2016–2019) Collaborations: Active at the Hellenic Open University as a tutor in Computer Architecture and Digital Systems modules. Co-developed the AETHER framework for pervasive computing and contributed to energy-aware SoC designs for 5 GHz WLANs.
Taylor Barton is an Associate Professor and Lockheed Martin Faculty Fellow at the University of Colorado's Department of Electrical, Computer, and Energy Engineering. His research focuses on electromagnetics, RF/microwave engineering, and integrated circuits, with an emphasis on power amplifier design, GaN-based systems, and high-frequency electronics. He leads a lab conducting cutting-edge work in antenna integration, nonlinear circuit analysis, and energy-efficient RF solutions. His contributions include innovations in load modulation techniques, multi-band amplifier architectures, and superconducting frequency conversion. Barton's work intersects with applications in 5G communications, aerospace systems, and wireless power transfer. His research interests span RF power amplification, semiconductor device modeling, and high-efficiency transmitter design. Notable areas include GaN MMICs, outphasing architectures, and adaptive impedance matching networks. Recent projects explore kinetic inductance-based frequency conversion and compact charge digitizer systems for beam monitoring. Publications highlight advancements in wideband amplifiers, thermal sensor integration in GaN circuits, and novel methods for distortion reduction. His work frequently addresses trade-offs between power efficiency, bandwidth, and linearity in modern RF systems. Barton collaborates with industry partners like Lockheed Martin to bridge academic research with practical aerospace and defense applications. His lab website showcases ongoing projects in reconfigurable RF components and multi-functional microwave systems.
Alexander Zaslavsky is a Professor of Engineering and Physics at Brown University, where he has been a faculty member since 1994. He received his Ph.D. in electrical engineering from Princeton University in 1991 and completed postdoctoral work at IBM Research. His research spans semiconductor device physics with focus on novel device concepts that could supplement silicon transistor technology. He maintains active collaborations with institutions in France and has served as editor of Solid State Electronics since 2003. PhD in Electrical Engineering, Princeton University (1991) MS in Electrical Engineering, Princeton University (1988) BA, Harvard University (1986) Professor Zaslavsky's research focuses on developing alternative semiconductor devices that could supplement conventional silicon technology. His work spans five main areas: (1) quantum transport in silicon-based nanostructures and resonant tunneling; (2) tunneling-based semiconductor devices in silicon-on-insulator and germanium-on-insulator technology; (3) thin film transistors based on conducting oxides and iodides; (4) flexible metallic interconnects for flexible electronics; and (5) probabilistic computing implemented in silicon technology. His research bridges fundamental physics with practical device applications, particularly in low-power electronics and novel sensing mechanisms. Analysis of Professor Zaslavsky's recent publications reveals a strong focus on cryogenic electronics for quantum computing interfaces, novel memory architectures, and germanium-based photodetectors. His work increasingly intersects with quantum computing needs, particularly in developing cryo-CMOS circuitry and memory solutions. There's also continued emphasis on sharp-switching devices for ultra-low power applications and exploration of alternative materials like copper iodide for transparent electronics. The research demonstrates a strategic evolution from fundamental device physics toward applications in emerging computing paradigms. Alfred P. Sloan Fellowship (1995) Office of Naval Research Young Investigator Award (1995) National Science Foundation Career Award (1997) Editor of Solid State Electronics international journal (2003-present) Visiting Senior Chair of Excellence at Nanosciences Foundation, Grenoble (2009-2012) Professor Zaslavsky has mentored numerous students whose alumni have gone on to semiconductor companies (Micron, Applied Materials, GlobalFoundries, Synopsys), government labs (NIST, CNRS, Paul Scherrer Institute), and major industrial companies (EMC, Apple). His research has been supported by extensive funding including: Alfred P. Sloan Foundation ($30,000, 1995-1999); Office of Naval Research Young Investigator award ($265,750, 1995-1998); multiple NSF grants totaling over $1.5 million; Semiconductor Research Corporation subcontract ($95,000, 1998-2002); and Air Force Office of Scientific Research MURI award (sharing $350,000 annually, 2000-2005). Professor Zaslavsky leads an active research laboratory at Brown University focused on semiconductor device physics and engineering. Current projects include Cryo-CMOS and magnetic sensing (with Xiao lab at Brown, Tufts, NIST-Gaithersburg, CoolCAD Electronics, and MIT-Lincoln Laboratory); and Germanium quantum dot photodetectors (with Pacifici lab at Brown). The lab has previously worked on nitride hot electron and tunneling transistors, amorphous indium-zinc-oxide devices, tunneling devices in SOI, noise-immune CMOS design, Si and SiGe nanowire tunneling transistors, carbon nanotube devices, and flexible metal interconnects. The lab emphasizes comprehensive training from device fabrication to characterization and modeling.
Yu [Kevin] Cao is the Louis John Schnell Professor in the Department of Electrical and Computer Engineering at the University of Minnesota. His research focuses on microelectronics co-design for energy-efficient computing, spanning integrated circuit design, semiconductor physics, and machine learning methodologies. He leads the Microelectronics Co-design Research Group and actively collaborates with institutions like Georgia Institute of Technology, Sandia National Laboratories, and Notre Dame. His research interests include AI hardware acceleration , in-memory computing , cryogenic CMOS design , and 3D integration of heterogeneous chiplets . Current initiatives explore reconfigurable on-package systems for AI, spiking neural networks on neuromorphic hardware, and low-temperature logic technologies. Recent publications and projects highlight advancements in AI accelerators , RRAM-based compute-in-memory , graph convolutional networks , and 3D integration . His group develops tools like MN-SIM 2.0 for memristor modeling and investigates novel materials for neuromorphic systems. Grants include collaborative NSF funding for chiplet-based AI systems, CoCoSys center funding from SRC, and DOE/Sandia projects on neuromorphic hardware. Future work emphasizes scalable co-design frameworks for intelligent systems and heterogeneous integration challenges.
Houpeng Chen is a Research Professor at the Chinese Academy of Sciences, specifically affiliated with the School of Microsystem and Information Technology in the Department of Microelectronics. With over two decades of research experience since the early 2000s, Chen has established himself as a leading expert in memory systems and circuit design, particularly in the areas of Phase Change Memory and neuromorphic computing. Chen's research primarily focuses on advanced memory technologies, with particular emphasis on Phase Change Memory (PCM) systems, neuromorphic computing architectures, and analog circuit design for memory applications. His work spans from fundamental circuit design for memory systems to advanced computing architectures that leverage novel memory technologies. A significant portion of his recent work explores in-memory computing paradigms and brain-inspired computing systems, demonstrating a strategic shift toward next-generation computing architectures that address the limitations of traditional von Neumann systems. Analysis of Chen's publication record shows a clear evolution from traditional circuit design toward more innovative memory-based computing architectures. His recent work demonstrates strong expertise in 3D cross-point memory systems, in-memory computing, and neuromorphic hardware implementations. The research shows consistent quality with publications in top-tier IEEE journals and conferences, indicating strong recognition within the semiconductor and memory research community. As evidenced by the authorship patterns in his publications, Chen has successfully mentored numerous graduate students and junior researchers who have gone on to become first authors on significant publications. His collaborative network includes extensive work with Zhitang Song, Qian Wang, and Xi Li, suggesting a well-established research group with strong internal collaboration.
Jeff Dix is an Assistant Professor in the Department of Electrical Engineering at the University of Arkansas, College of Engineering. He received his B.S., M.S., and Ph.D. in Electrical Engineering from the University of Tennessee at Knoxville in 2013, 2015, and 2018, respectively. He leads the Integrated Systems Laboratory for ANalog Design (ISLAND), focusing on analog/mixed-signal integrated circuits for energy-efficient applications. B.S., Electrical Engineering, University of Tennessee at Knoxville M.S., Electrical Engineering, University of Tennessee at Knoxville Ph.D., Electrical Engineering, University of Tennessee at Knoxville His research spans four key areas: (1) Neural network/neuromorphic hardware for IoT/edge computing; (2) Extreme environment IC design (radiation-hardening, temperature extremes); (3) Subthreshold/weak inversion IC design for ultra-low power; and (4) Power electronics for electric vehicles and micro-grids. His work emphasizes energy efficiency and robustness in specialized operational contexts. Recent publications highlight trends in radiation-hardened analog circuits (2021), RF energy harvesting (2022), and neuromorphic hardware (2023). Key keywords include Integrated Circuit Design, Machine Learning Hardware, and Low Power Electronics. He teaches courses in analog/digital IC design, microelectronics, and neural network hardware, including Circuits I (ELEG 2103), Electronics II (ELEG 3223), and IC Design Lab I (ELEG 4243L/5253L).
