Per-Erik Hellström

Per-Erik Hellström is a Professor at KTH Royal Institute of Technology, affiliated with the Department of Electronics and Embedded Systems. His research focuses on semiconductor process technology, particularly the heterogeneous integration of materials like SiGe, Ge, high-κ dielectrics, and metal gates with Si CMOS to advance integrated circuits. He leads KTH's FDSOI CMOS process and circuit technology, emphasizing sequential 3D integration for future CMOS developments. Additionally, he manages the Si and SiC process line at Electrum Laboratory, overseeing tool maintenance, process control, and upgrades.

• Researcher ID: ORCID
• Location: Kistagangen 16
• Email: pereh@kth.se

His work involves developing nanometer-sized transistors through double patterning techniques and studying material integration for enhanced device performance. He teaches courses in electrical circuits, semiconductor devices, and nanotechnology at both Bachelor's and Master's levels, including Electrical Engineering (IF1330), Embedded Electronics (IE1206), and Introduction to Integrated Circuits (IL2241). He also supervises degree projects and exams.

Scientific achievements include the 2020 G03 Best Paper Award for gate stack research. His recent publications highlight advancements in Type-II superlattices, 3D integration, and high-temperature sensors. Key collaborators include PhD students working on nanotechnology and process engineering.