Prof. Dr. rer. nat. Rainer Leupers is a faculty member at RWTH Aachen University, chairing the Department of Software for Systems on Silicon. His research focuses on embedded systems, hardware-software co-design, virtual prototyping, and security in computing-in-memory architectures. He has published extensively on RRAM accelerators, logic locking, and neuromorphic security. Chair of Software for Systems on Silicon Research in hardware security and deep learning accelerators Recent publications on cross-tool virtual frameworks and thermal side-channel attacks His work bridges system-level modeling with practical security implementations, emphasizing reliability and performance in heterogeneous computing environments. Key trends in his 2025-2023 articles include compute-in-memory optimization, neural network inference efficiency, and security vulnerabilities in emerging hardware. Awards and formal recognitions are not explicitly detailed in the provided materials. He has not directly mentioned advising students or research grants in the given text fragments. The chair's contact information includes an office at ICT Cube 1, Electrical Engineering, Aachen, with direct email and website links.
Urs Hengartner is an Associate Professor at the Department of Computer Science, University of Waterloo. His research focuses on information privacy, computer and network security with emphasis on smartphones, IoT, and machine learning-based authentication systems. He holds a Ph.D. (2005) and M.Sc. (2003) from Carnegie Mellon University, and a Diploma from ETH Zürich (1997). His work spans Adaptive security attacks on ML systems Implicit user authentication frameworks Privacy-preserving technologies for location and genomic data Secure authentication systems resilient to voice/spoofing attacks Recent publication trends show a strong focus on adversarial attack detection (e.g., watermarking evasion, diffusion model attacks) and context-aware authentication systems . His frameworks like MRAAC and SHRIMPS address multi-stage authentication challenges in mobile ecosystems. Key contributions include frameworks for evaluating multi-user authentication systems (SHRIMPS), risk-aware access control (MRAAC), and novel defense strategies against collaborative robot traffic fingerprinting. His work bridges security mechanisms with user-centric design principles.
Frank Piessens is a Full Professor in the Department of Computer Science at KU Leuven's Faculty of Engineering Science, where he leads the Distributed and Secure Software (DistriNet) research group. His research focuses on cutting-edge security challenges at the hardware-software interface. His research interests span: Hardware-software co-design for end-to-end security Confidential computing architectures Microarchitectural side-channel mitigation Secure IoT development Compiler-based security mechanisms Control-flow integrity techniques Recent publications (2024-2025) demonstrate strong focus on: Hardware security cost/performance tradeoffs Processor-level security enhancements (RISC-V, high-end CPUs) IoT device lifecycle security Control-flow leakage prevention Microcontroller IP protection He currently supervises PhD students including M. Bognár and H. Winderix, and leads major research initiatives such as: Hardening confidential computing through vertically integrated system design (2025-2031) Designing secure hardware for software-exploitable attacks (2025-2029) Compiler-based mitigations for microarchitectural side-channels (2023-2027) Security Arms Race at the Hardware-Software Boundary (2020-2025)
Nele Mentens is a full professor at both KU Leuven and Leiden University, where she leads cutting-edge research in applied cryptography, hardware security, and secure embedded systems. At KU Leuven, she is affiliated with the Faculty of Engineering Technology and the Electrical Engineering Department (ESAT), leading the Emerging Technologies, Systems & Security (ES&S) research group at the Diepenbeek campus. Simultaneously, she holds a full professorship at Leiden University’s Leiden Institute of Advanced Computer Science (LIACS), focusing on applied cryptography and security. She has been instrumental in numerous national and international research initiatives, including Horizon Europe and NWO-funded projects. Full Professor, KU Leuven (since 2023) Full Professor, Leiden University (since 2020) Associate Professor, KU Leuven (2014–2023) Post-doctoral Researcher & Lecturer, KHLim / KU Leuven (2007–2014) Ph.D. in Engineering Science, KU Leuven (2007) M.Sc. in Electrical Engineering, KU Leuven (2003) Her research focuses on secure and efficient hardware design, particularly for cryptographic applications on FPGAs, reconfigurable architectures, IoT security, and neuromorphic computing. She explores physical attack resistance, side-channel analysis protection, and trusted computing architectures, with applications in healthcare, industrial monitoring, and endpoint AI. Her work bridges theoretical cryptography with practical hardware implementations, emphasizing energy efficiency and real-time performance. The 15 most recent publications reflect a strong trend toward secure, energy-efficient, and intelligent embedded systems. Topics include neuromorphic AI accelerators, trusted IoT architectures, dynamic reconfiguration for side-channel protection, and secure medical data processing. These works span disciplines such as computer architecture, cybersecurity, digital design, and embedded systems, with a focus on hardware-software co-design and real-world deployment. Nele Mentens has received recognition for her contributions, including: Best Paper Award, DATE'16 Best Paper Nomination, AsianHOST'17 Best Paper Award, CHES'19 She has supervised over 15 Ph.D. students and post-docs, both current and former, and has served as principal investigator in approximately 25 funded research projects. Her work has attracted significant grants from Horizon Europe, NWO, FWO, and national innovation programs. She actively contributes to the academic community through editorial roles in top journals and leadership in major conferences. Nele Mentens leads the ES&S research group at KU Leuven and collaborates closely with LIACS at Leiden University. Her team includes Ph.D. students, post-docs, and research experts working on projects like NimbleAI, NeuroSoC, and TrustedIoT. She has also established secure electronics labs through infrastructure grants and maintains strong international ties with institutions such as EPFL, Ruhr University Bochum, and ETH Zurich.
Scott Barnett serves as an Assistant Professor in the Department of Biochemistry & Molecular Biology at the University of Nevada, Reno, focusing on molecular pathways in uterine physiology to combat preterm labor through novel drug development. His academic credentials include: B.S. from University of Nevada, Reno (2011) Ph.D. from University of Nevada, Reno School of Medicine (2017) Dr. Barnett's research centers on reproductive pharmacology, specifically developing placenta-impermeable tocolytics targeting myometrial relaxation mechanisms. His work integrates molecular biology, smooth muscle physiology, and translational drug discovery to address the critical unmet need for FDA-approved preterm labor treatments. Key approaches include modulation of β3 adrenergic receptors, connexin 43 dynamics, and mechanosensitive ion channels like Piezo1 and TREK-1. Analysis of his publication record reveals consistent innovation in dual-pathway targeting strategies, with recent emphasis on small-molecule modulators of endoplasmic reticulum trafficking (Cx43/OXTR) and synergistic ion channel activation. His nephrology-related work demonstrates parallel expertise in multi-target therapeutics for diabetic complications. Dr. Barnett holds a provisional patent for a preterm labor treatment, reflecting his translational impact. While no formal advisees are documented, his program actively develops novel therapeutics and previously explored dual-purpose nephrology drugs. Research is supported by patent-protected innovation and likely grant funding for molecular obstetrics. His laboratory focuses on human myometrial tissue studies, combining molecular signaling analysis with functional contractility assays to bridge basic science and clinical obstetrics.
Jia Di serves as Professor and Department Head of the Department of Electrical Engineering and Computer Science at the University of Arkansas, holding the Rodger S. Kline Endowed Leadership Chair. He has been with the institution since 2004, progressing from Assistant Professor to his current leadership position within the College of Engineering. Education: B.S. in Automatic Control, Tsinghua University (1997) M.S. in Automatic Control, Tsinghua University (2000) Ph.D. in Electrical and Computer Engineering, University of Central Florida (2004) Research Focus: Dr. Di's work centers on asynchronous integrated circuit design and hardware security , with emphasis on Multi-threshold Null Convention Logic (MTNCL) for ultra-low-power secure systems. His research spans hardware Trojan detection, polymorphic logic gates, extreme environment electronics, and security solutions for IoT infrastructure. His Trustable Logic Circuit Design Lab has pioneered techniques for side-channel attack mitigation and cold boot attack prevention through self-destructive memory mechanisms. Publication Trends: Recent publications reveal a strategic shift toward hardware security applications for renewable energy systems and IoT edge devices, while maintaining core expertise in asynchronous circuit design. His work increasingly integrates machine learning (e.g., graph neural networks for hardware Trojan detection) and cross-platform verification frameworks, demonstrating evolution from pure circuit design to holistic cybersecurity solutions for critical infrastructure. Scientific Recognition: Senior Member of IEEE Eminent Member of Tau Beta Pi Elected Member of the National Academy of Inventors Research Leadership: Dr. Di has secured over $23 million in research funding for his Trustable Logic Circuit Design Lab, supporting development of 6 U.S. patents and two authoritative books. His lab collaborates with federal agencies and industry partners on hardware security challenges, with recent grants focusing on photovoltaic system protection and extreme-environment electronics. While specific student names aren't documented here, his extensive publication record indicates significant graduate mentorship in hardware security and asynchronous design. Lab Infrastructure: The Trustable Logic Circuit Design Lab maintains specialized capabilities for testing circuits in extreme environments (high temperature/radiation) and developing polymorphic security mechanisms. Current projects include RF aperture security, hardware-based IoT verification systems, and digital twin implementations for power electronics with integrated trust verification.
Pascal Sasdrich is a Researcher at Ruhr University Bochum, Germany, affiliated with the Faculty of Computer Science and the Security Engineering department. He holds a PhD in IT-Security/Information Technology from the same university (2018), following M.Sc. (2015) and B.Sc. (2012) degrees in the same field. His research focuses on Hardware Security, Secure Processor Design, Computer-Aided Security, and Security by Design. He has extensive experience in cryptographic hardware implementations, including countermeasures against side-channel and fault attacks. Teaching includes courses on Processor Security and Implementation of Cryptographic Schemes. His work bridges theoretical security models with practical hardware implementations, emphasizing automated tools and formal verification for secure embedded systems. Key projects include contributions to Project HEP (open-source hardware security chip design) and development of methodologies like EASIMASK for automated masking in hardware. Publications span cryptographic hardware implementations, fault and side-channel countermeasures, and formal security verification. Notable works include combined threshold implementations, secure processor extensions, and automated generation of masked hardware circuits. Current research emphasizes securing embedded systems through holistic design approaches, including ISA extensions and automated EDA tools.
Renaud Pacalet is a Researcher at Institut Mines-Télécom – Télécom Paris , affiliated with the Communications and Electronics (Comelec) Department and the System on Chip (LabSoc) research team under the Information Processing and Communication Laboratory (LTCI). His work spans hardware security, embedded systems, and software-defined radio (SDR) architectures. Current Research: Hardware security, side-channel attacks (power, timing, fault injection), RISC-V security analysis using gem5, FPGA scheduling for cloud data centers, and model-driven design methodologies. Past Research: Hardware acceleration for ray tracing, SDR front-end processing, SoC security, and memory bus protection (SecBus project). Teaching: Courses on Digital Systems, Computer Architecture, and Hardware Security at EURECOM, including lab sessions on side-channel attacks and fault analysis. Email: renaud.pacalet@telecom-paris.fr Contact: Télécom ParisTech, Campus SophiaTech, 450 route des Chappes 06410 Biot, France
Vasileios P. Kemerlis is an Associate Professor of Computer Science at Brown University, where he conducts research in systems and software security. He serves as the director of the Secure Systems Lab (SSL) and is a recipient of the prestigious NSF CAREER Award. His work focuses on practical security solutions for real-world systems. Dr. Kemerlis specializes in software, hardware, and systems security with particular emphasis on OS kernel protection, software hardening, fuzz testing, and information flow tracking. His research bridges theoretical security concepts with practical implementations that can be deployed in commodity systems. His work often leverages hardware features to build more robust security mechanisms while maintaining system performance. His recent publications demonstrate a consistent focus on memory safety, control flow integrity, and practical security mechanisms that can be deployed in real-world systems. His work spans multiple security domains including kernel security, network security, and application security, with a strong emphasis on developing solutions that balance security guarantees with practical performance considerations. Scientific Awards: NSF CAREER Award Dr. Kemerlis teaches advanced security courses at Brown University including CSCI 1650: Software Security and Exploitation (offered Fall 2016-2024) and CSCI 2951U: Topics in Software Security (offered Spring 2016-2018, 2020, 2021, 2024). As director of the Secure Systems Lab, he leads research efforts that have resulted in numerous publications at top security venues including IEEE Symposium on Security and Privacy, ACM CCS, and USENIX Security. The Secure Systems Lab under his direction focuses on developing practical security solutions that can be deployed in real-world systems, with recent work exploring hardware-assisted security mechanisms, binary hardening techniques, and novel approaches to memory safety.
Tudor Dumitras is an Affiliate Associate Professor at the University of Maryland, College Park, holding appointments in the Department of Electrical and Computer Engineering (ECE) and the Department of Computer Science (CS). He is affiliated with The Maryland Cyber Security Center (MC2), where he leads research initiatives in cybersecurity and cryptography. His work focuses on malware detection, system security, and analyzing real-world vulnerabilities like the Heartbleed bug. Dumitras has collaborated with institutions such as Northeastern and Stanford Universities on critical security challenges, including SSL certificate reissuance and revocation strategies. His research interests span machine learning applications in cybersecurity, network security protocols, and adversarial attack mitigation. Notable contributions include developing automated tools for vulnerability exploitation prediction (SCAVY) and investigating the robustness of machine learning models against adversarial examples. Dumitras advises PhD students Simge Tekin and Kamala Varma, focusing on advancing cybersecurity through data-driven approaches. Key projects include analyzing software adoption patterns, studying zero-day attacks, and improving PKI security. His work often bridges academic research with industry practices, leveraging big data from sources like Symantec's WINE system. Dumitras has published extensively on topics ranging from malware behavior analysis to hardware fault attacks on neural networks.
Fan Yao is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Central Florida's College of Engineering and Computer Science. She received her Ph.D. in Computer Engineering from The George Washington University in 2018 and currently leads the Computer Architecture and Systems Research (CASR) lab. Her research focuses on the intersection of computer architecture, security, and machine learning, with particular emphasis on hardware-based security vulnerabilities and defenses. Dr. Yao's research interests span computer architecture, hardware and system security, AI security, energy-efficient computing, and cloud computing. Her work addresses critical security challenges in modern computing systems, particularly focusing on microarchitecture attacks, hardware-based model tampering in deep learning systems, and information leakage threats in emerging non-volatile memory systems. She has developed innovative defense mechanisms against cache timing channels, branch predictor vulnerabilities, and GPU-based side channels. Her recent publications demonstrate a strong focus on AI security (particularly Deep Neural Network vulnerabilities), hardware security (including cache and branch predictor attacks), and secure memory architectures. The research shows an evolution from traditional computer architecture topics toward the security implications of AI hardware and emerging memory technologies, with increasing emphasis on practical attacks and defenses in real-world systems. NSF GW I-Corps Site Grant Award, 2018 Best Dissertation Award, GWU, 2018 The Norris & Betty Hekimian Engineering Endowment Fellowship, GWU, 2017 Top Picks in Hardware and Embedded Security, 2019 NSF CAREER project award, 2024 Dr. Yao currently leads multiple NSF-funded research projects including 'Understanding and Taming Deterministic Model Bit Flip Attacks in Deep Neural Networks' (NSF SaTC, 2020-2023), 'Towards Secure-By-Design Integration of Emerging Non-Volatile Memory in Future System' (NSF CNS, 2020-2023), and 'Architecting Secure-by-Design Memristor-Based Memories' (NSF CNS, 2019-2022). She has successfully mentored numerous PhD students, many of whom appear as first authors on top-tier conference publications, demonstrating her commitment to graduate education and research mentorship. As the leader of the CASR lab, Dr. Yao oversees a vibrant research group focused on building secure-by-design, efficient, and advanced future systems through novel techniques spanning hardware, computer architecture, and systems. The lab actively publishes at top computer architecture and security conferences including ISCA, MICRO, HPCA, IEEE S&P, and USENIX Security, with multiple papers accepted to these venues annually. The group has developed several influential tools and frameworks for security analysis, including proof-of-concept code for BranchSpec exploits that has been widely cited in the hardware security community.
Domenic Forte is Professor and Steven A. Yatauro Faculty Fellow in the Department of Electrical and Computer Engineering at the University of Florida. He directs research on hardware security and trust at the Florida Institute for Cybersecurity (FICS) Research Scan Lab. Forte's innovations include anti-counterfeiting technologies for integrated circuits, protection against side-channel attacks, and hardware Trojan detection. Recent projects develop low-cost methods to detect recycled counterfeit chips using LDO-based odometers and defenses against optical probing attacks. His work integrates AI/ML approaches for hardware assurance challenges including SEM image analysis and X-ray tomography reconstruction.
Luca Caviglione is a prominent cybersecurity researcher at the National Research Council of Italy (CNR), specializing in steganography, covert channels, and network security. With over 140 publications spanning from 2015 to 2025, he has established himself as a leading expert in information hiding techniques and their security implications. His research bridges theoretical foundations with practical applications in IoT, cloud computing, and mobile security environments. Dr. Caviglione's primary research interests focus on steganography and covert communication channels , particularly their application in modern computing environments. He investigates how data can be hidden within network protocols, mobile applications, and cloud infrastructures, while simultaneously developing detection methodologies. His work extends to IoT security , where he examines vulnerabilities in constrained devices and develops AI-based approaches for threat detection. Additional research areas include container security, malware analysis (particularly stegomalware), and security protocol analysis. Caviglione's publication record reveals a clear evolution toward applying machine learning and artificial intelligence to detect sophisticated threats like stegomalware. His recent work increasingly addresses container security, DDoS protection in microservices, and post-quantum security challenges, reflecting the evolving threat landscape. He frequently collaborates with international researchers, notably Wojciech Mazurczyk (46 co-authored papers) and Steffen Wendzel (31 co-authored papers), forming a productive research network in information hiding. As an active contributor to the cybersecurity research ecosystem, Caviglione serves on editorial boards and has organized special issues focused on information security methodology and replication studies. His leadership in developing taxonomies for steganography methods demonstrates his influence in shaping research directions in this specialized field. His work has practical implications for securing modern computing environments against increasingly sophisticated hidden communication channels.
Sihem Mesnager is a University Professor of Mathematics at the University of Paris VIII, affiliated with the Laboratory of Analysis, Geometry and Applications (LAGA) at Paris XIII (CNRS) and the AGC3 research group (Algebra, Geometry, Combinatorics) . She holds an adjunct professorship at Télécom Paris within the MIC2 Mathematics team of the Computer Science and Networks department (INFRES). Her work bridges pure mathematics and applied cryptography, focusing on Boolean functions, bent functions, and coding theory for secure communication and data protection. PhD in Mathematics, University of Pierre and Marie Curie (Paris VI), Sorbonne University (2002) Habilitation (HDR) in Mathematics, University of Paris VIII (2012) Research Interests Dr. Mesnager specializes in symmetric cryptography and coding theory , particularly their applications to secure digital communication, error correction, and post-quantum cryptographic protocols. Her algebraic approach employs finite fields, exponential sums, algebraic geometry, and finite geometry to analyze and construct cryptographic primitives like S-boxes, APN functions, and optimal linear codes. She also investigates algorithmic aspects of computer algebra in these domains. Scientific Awards George Boole International Prize (2020) PEDR Excellence Scientific Award (2019-2022) PEDR Excellence Scientific Award (2014-2017) Publications & Projects Her recent work includes constructing weightwise perfectly balanced Boolean functions for the FLIP cipher, optimizing Inner Product Masking schemes via coding theory, and developing post-quantum secure functional encryption using multivariate cryptography. She has contributed to Reed-Muller codes, BCH codes, and Gaussian sum-based linear codes with one-dimensional hulls, emphasizing their applications in side-channel attack resistance and quantum error correction.
Eric Wustrow is an Associate Professor in the Department of Electrical, Computer & Energy Engineering at the University of Colorado Boulder , affiliated with the College of Engineering and Applied Science . His research focuses on network security, internet censorship, and cryptographic protocols. Contact: ewust@colorado.edu , Phone: 734-330-8702, Office: ECCR 1B13. Academic Rank: Associate Professor Department: Electrical, Computer & Energy Engineering University: University of Colorado Boulder Eric Wustrow's research explores methods to measure and circumvent internet censorship, analyze network vulnerabilities, and enhance privacy in digital communications. His work includes studying the Great Firewall of China, DNS and TLS security, and developing anticensorship tools like ShadowTLS and WATER. He also investigates cryptographic weaknesses in network devices and secure hardware implementations. Recent publications examine the effectiveness of anticensorship tools, the impact of IPv6 on information controls, and vulnerabilities in encrypted protocols. His studies include speculative execution attacks, DNS censorship measurement, and techniques to exploit transient errors in TLS for key compromise. These works highlight evolving network threats and countermeasures. Eric's research has been supported by grants such as the CAREER: Combating Censorship from within the Network (2022) and SaTC: CORE: Medium: Collaborative: Studying the Impact of IPv6 on Information Controls and Censorship Circumvention (2020). These projects focus on developing network-level solutions to censorship and security challenges.
