About
Renaud Pacalet is a Researcher at Institut Mines-Télécom – Télécom Paris, affiliated with the Communications and Electronics (Comelec) Department and the System on Chip (LabSoc) research team under the Information Processing and Communication Laboratory (LTCI). His work spans hardware security, embedded systems, and software-defined radio (SDR) architectures.
- Current Research: Hardware security, side-channel attacks (power, timing, fault injection), RISC-V security analysis using gem5, FPGA scheduling for cloud data centers, and model-driven design methodologies.
- Past Research: Hardware acceleration for ray tracing, SDR front-end processing, SoC security, and memory bus protection (SecBus project).
Teaching: Courses on Digital Systems, Computer Architecture, and Hardware Security at EURECOM, including lab sessions on side-channel attacks and fault analysis.
- Email: renaud.pacalet@telecom-paris.fr
- Contact: Télécom ParisTech, Campus SophiaTech, 450 route des Chappes 06410 Biot, France
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