Dr. Zainab Aizaz is a Research Fellow at the School of Engineering and Informatics , University of Sussex, specializing in Artificial Intelligence hardware design and Field Programmable Gate Arrays (FPGA) . Her work focuses on creating energy-efficient and high-performance hardware solutions for AI applications, particularly through innovative pipelined vector processor architectures extending RISC-V open-source frameworks. Her research interests include: Approximate computing for neural networks Hardware acceleration of machine learning Computer architecture optimization Energy-efficient FPGA design Medical imaging applications using AI Signal integrity in nanoscale circuits Dr. Aizaz's recent publications highlight her work on: Spiking neural network acceleration (2025) Approximate multiplier architectures (2022-2024) Hardware-software co-design for edge computing (2023) Cognitive radio antenna optimization (2016) Contact: Z.Aizaz@sussex.ac.uk
Mikael Olofsson is an Associate Professor and Head of Division at the Division of Electronics and Computer Engineering (ELDA), Department of Electrical Engineering (ISY), Linköping University. He is actively engaged in teaching and academic leadership, serving as director of studies for courses in Integrated Circuits and Systems since 2018. His research background lies at the intersection of telecommunications, electronics, and mathematics , particularly focusing on algorithms and architectures for arithmetic operations in finite fields . His PhD thesis, VLSI Aspects on Inversion in Finite Fields (2002), reflects this interdisciplinary focus. Though currently more focused on education, he continues to explore arithmetic-related algorithmic designs when time permits. The recent publications reflect a strong emphasis on signal theory and telecommunications education , including textbooks and pedagogical research. Topics span signal processing fundamentals, digital modulation, and Massive MIMO principles , indicating a consistent thread in communication systems education and foundational theory. Scientific Awards: No awards listed in the provided text. Advising and Grants: While no formal students or grant awards are listed, Mikael Olofsson plays a significant mentoring role through his extensive teaching and leadership as director of studies. He emphasizes the value of student discussions and strives to provide optimal learning opportunities, suggesting strong engagement in academic advising at the course and program level. Labs and Teams: He is affiliated with the Division of Electronics and Computer Engineering (ELDA), which conducts research in analog, digital, mixed-signal electronics, programmable systems, and processor design. This division is part of the broader Department of Electrical Engineering (ISY), known for strong industry and research collaborations.
Amirali Baniasadi is a Professor and Graduate Advisor in the Department of Electrical & Computer Engineering at the University of Victoria. He holds a BS from Tehran University, an MS from Sharif University, and a PhD from Northwestern University, with professional engineering (PEng) certification. His research focuses on low-power design, power-aware architectures, VLSI interconnect, and high-performance processors, with applications extending to GPU optimization and machine learning hardware integration. Education: BS, Tehran University MS, Sharif University PhD, Northwestern University Research Interests: Development of energy-efficient processor architectures GPU architecture optimizations and performance analysis Machine learning applications in hardware design and signal processing Quantum annealing for signal processing challenges Security and reliability in network-on-chip systems Recent Trends in Publications: Dr. Baniasadi’s work increasingly integrates AI and deep learning with traditional hardware domains, such as using neural networks for phase unwrapping in SAR imaging, lightweight edge detection networks, and explainable AI frameworks for signal-based models. His research also explores GPU design space optimizations, power-aware architectures, and security against thermal attacks in NoCs. Advising & Grants: Supervised over 15 graduate students, including prominent alumni now in academic and industry roles (e.g., Assistant Professors at Lakehead and Syracuse Universities). Active in securing funding for interdisciplinary projects combining computer architecture with emerging fields like quantum computing and healthcare AI. Labs & Teams: Leads a research group focusing on high-performance computing and low-power systems, collaborating with industry partners on GPU optimization and embedded processor design.
Francisco Fabio Banchelli Gracia is a researcher affiliated with the Universitat Politècnica de Catalunya (UPC), specifically in the Department of Systems, Automation, and Industrial Informatics at the Barcelona School of Informatics (FIB). He is actively involved in high-performance computing (HPC) research and collaborates with the Barcelona Supercomputing Center (BSC). His research interests include high-performance computing, computer architecture, energy efficiency in computing systems, performance analysis of HPC and computational fluid dynamics (CFD) workloads, Arm-based processors (A64FX, ThunderX2), RISC-V, hardware-software co-design, and HPC education for undergraduates. His work bridges industry practices and academic training, particularly in introducing students to real-world HPC environments. The recent publications highlight a strong focus on evaluating emerging HPC architectures such as NVIDIA Grace and Arm-based systems, developing generic performance and efficiency models, benchmarking production CFD codes, and advancing educational methodologies for HPC. His work spans both technical innovation and pedagogical development in the HPC domain. He has contributed to major HPC conferences such as the International Conference on High Performance Computing (HiPC), Platform for Advanced Scientific Computing (PASC), IEEE Cluster, and IEEE/ACM workshops on HPC education. His collaborations are primarily with researchers at UPC and BSC, especially Filippo Mantovani and Marta Garcia Gasulla. Francisco Fabio Banchelli Gracia is actively engaged in research and publication, with no indication of retirement or former status. He advises on HPC education initiatives and participates in collaborative research projects, though specific grants are not detailed in the provided text. He is part of the CAP (High Performance Computing Group) and works within the UPC-BSC ecosystem, contributing to cutting-edge HPC system evaluation and educational outreach.
Maria Luisa Gil Gómez is a researcher at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture and the Barcelona Higher Technical School of Telecommunications Engineering. She holds a PhD in Computer Science and leads research in parallel computing, high-performance computing (HPC), and programming models. Her work focuses on optimizing computational workflows, fault tolerance in distributed systems, and leveraging multi-GPU architectures for scientific simulations. She has contributed to projects like the Programming Models group (PM) at UPC and collaborates with the Barcelona Supercomputing Center (BSC-CNS). Affiliations: UPC Department of Computer Architecture, BSC-CNS, PM Research Group Research Interests: Parallel Programming Models, HPC, GPU Computing, Cellular Automata, Education Technology Her research spans over 147 documented activities, including journal articles, conference presentations, and funded projects. Notable contributions include studies on BCI in music education, distributed algorithms for ARM-based clusters, and the OpenCAL++ framework for parallel cellular automata simulations. She has also explored educational methods integrating creativity and game-based learning in engineering.
Dr. Stephanie Brown is a State Specialized Agent in Food Science at the Southwest Florida Research and Education Center (SWFREC), part of the University of Florida's Institute of Food and Agricultural Sciences (IFAS). Her role focuses on extending food safety, regulatory compliance, and entrepreneurship support to Florida's food businesses. She develops programs targeting food processors, cottage food operators, and entrepreneurs to help them adhere to federal and state regulations, particularly under the Food Safety Modernization Act (FSMA). Her research interests emphasize microbial pathogen control, food safety interventions, and regulatory challenges in the food industry. She has conducted extensive work on Listeria monocytogenes biofilms, antimicrobial efficacy, and food safety training methodologies. Her outreach activities bridge academic research with practical industry applications, ensuring safe food production practices. Dr. Brown’s publications highlight innovations in antimicrobial applications, food safety training efficacy, and emerging trends like alternative proteins and insect-based foods. She actively collaborates with stakeholders to address global food safety challenges through evidence-based solutions.
Prof. Dr.-Ing. Martin Botteck is a faculty member at South Westphalia University of Applied Sciences, where he leads courses in the Department of Engineering and Economics. He holds a professorship in engineering disciplines, with a focus on multimedia systems and embedded technologies. Education: Dipl.-Ing. and Dr.-Ing. in Electrical Engineering from TU Dortmund Research Interests: Multimedia systems, embedded architectures, digital signal processing, wireless communication, and virtualization Recent Work: Developments in music data analysis frameworks, power modeling for embedded processors, and security through virtualization Publications: Spanning IEEE journals, international conference proceedings, and book chapters His academic contributions include peer-reviewed articles on mobile media search, music classification, and embedded device security. He holds the IEEE Senior Member distinction and has served on program committees for international conferences.
Andrei Karatkevich, PhD, DSc, Eng., is a Professor at the Department of Applied Informatics , within the Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering at AGH University of Science and Technology in Kraków, Poland. His research focuses on Petri nets , control systems , and concurrency analysis in manufacturing and cyber-physical systems. His work includes systematic studies on deadlock detection and recovery , state machine decomposition , and formal verification of concurrent systems. Articles emphasize applications in flexible manufacturing , embedded control , and real-time systems , with methodological contributions to SM-covers , reachability graph optimization , and logic controller synthesis .
Domenico Zito , PhD, Eng., is a Professor at the AGH University of Science and Technology in Kraków, Poland, affiliated with the Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering under the Department of Metrology and Electronics . His research spans advanced semiconductor technologies, focusing on cryogenic circuits for quantum computing, millimeter-wave systems for 5G/6G communications, and biomedical sensing applications. University: AGH University of Science and Technology (Kraków, Poland) School: Faculty of Electrical Engineering, Automatics, Computer Science and Biomedical Engineering Department: Department of Metrology and Electronics Email: domenico.zito@agh.edu.pl Research Interests: His work emphasizes the intersection of electronics engineering with quantum computing and biomedical technologies. Key areas include: Development of cryogenic CMOS circuits for quantum processors Millimeter-wave circuit design for next-generation wireless systems High-frequency oscillators, amplifiers, and switches Integration of micro-devices in biomedical platforms Phase noise reduction in CMOS oscillator topologies Recent Article Trends: Recent publications highlight advancements in sub-mW mm-Wave LNAs, cryogenic amplifiers for spin qubit control, and 60–95 GHz CMOS/SiGe components. Collaborative efforts include biomedical applications like contactless respiratory monitoring via UWB radar and environmental sensing with Doppler radar systems. Contact: Located in Headquarters B-1, 2nd floor, room 213 at AGH University.
Jean Pierre David is a Full Professor in the Department of Electrical Engineering at Polytechnique Montréal. He has been with the institution since January 2006, was promoted to Associate Professor in June 2013, and became a Full Professor in June 2021. His research focuses on digital systems design, reconfigurable systems, and hardware implementations of artificial intelligence applications. David received his Electrical Engineering degree (specializing in electronics) from the University of Liège (Belgium) in 1995. He completed his Ph.D. in June 2002 at the Catholic University of Louvain, with research focused on reconfigurable systems (FPGAs). Before joining Polytechnique Montréal, he was a professor at the University of Montreal from August 2002 to January 2006. Jean Pierre David's research spans several key areas in electrical engineering and computer science. His primary focus is on digital systems design, configuration, and programming, with particular expertise in reconfigurable systems such as FPGAs and microcontrollers. He has made significant contributions to Hardware Description Languages (HDL), developing methodologies for fast, safe, and simple design of digital architectures. His work extends to Hardware-in-the-Loop (HIL) simulation, Deep Packet Inspection (DPI) for high-speed communications (10GBE, 40GBE, 100GBE), and applications of digital systems in artificial intelligence, particularly neural network implementations. David's recent research has increasingly focused on energy-efficient AI hardware, RISC-V processor design for neural network acceleration, and specialized architectures for low-precision computation. His publication record shows a clear evolution from foundational work in digital system design and FPGA implementation toward increasingly sophisticated applications in artificial intelligence and neural network acceleration. The most recent publications demonstrate expertise in creating specialized hardware for efficient AI computation, with a strong emphasis on low-precision and binary neural networks that can run efficiently on resource-constrained devices. His work bridges computer architecture, electrical engineering, and artificial intelligence, creating practical hardware solutions for emerging computational challenges. David is affiliated with several important research groups and institutions including the Strategic Microsystems Group of Quebec (ReSMiQ), the Institute of Electrical and Electronics Engineers (IEEE), and the Institute for Data Valorization (IVADO). His work has been recognized through numerous publications in high-impact journals and conferences, with a total of 108 publications to his name. Professor David has supervised an impressive number of graduate students throughout his career, mentoring 9 Ph.D. students and 24 Master's students to completion. His students have worked on diverse topics including FPGA-based neural network acceleration, hardware implementations of deep learning algorithms, energy harvesting systems for IoT devices, and specialized architectures for low-precision computation. His lab appears to maintain strong connections with industry through various research projects and collaborations with researchers like Yves Savaria. His research laboratory focuses on the intersection of hardware design and artificial intelligence, with particular emphasis on creating efficient implementations of neural networks on specialized hardware platforms. The lab maintains strong connections with industry partners and collaborates extensively on projects related to network processing, AI acceleration, and energy-efficient computing systems.
Manfred Dietrich is a Researcher at TU Dresden's Institute of Precision Engineering and Electronic Design, actively leading EU projects including HyPerStripes (2022-2025) and KI4BoardNet (2022-2025). His work focuses on design automation, IC design, and system design for advanced semiconductor integration. His educational background includes: 1970-1974: Dipl.-Ing in Information Technology, TU Dresden 1981: Promotion (PhD) on 'Fault localization in analog circuits' Dr. Dietrich's research centers on 3D/2.5D integration challenges, particularly interposer-based memory interfaces, thermal management of stacked systems, and Wide IO implementations. His methodologies address critical bottlenecks in signal integrity, power delivery, and design verification for next-generation semiconductor packaging. Publications from 2014-2016 demonstrate consistent focus on thermal optimization of 3D systems and XML-based design rule checking, establishing foundational work for current EU projects targeting high-performance computing architectures. Scientific awards: None documented. With extensive grant leadership including ECSEL's Microprince project (2017-2020) and current EU supervision roles, his portfolio reflects significant funding acquisition expertise. No student advisees are listed in available records. He actively contributes to industry standards through memberships in VDE's ITG/GMM groups, the GI/VDE 'Computer-aided circuit and system design' cooperation, and as an ECSEL Strategic Research Group expert.
Abhay Parekh is an Adjunct Professor in the Electrical Engineering and Computer Sciences Department at the University of California, Berkeley, where he has been teaching since 2003. His academic career is complemented by extensive industry experience in the field of computer networking and communications. Dr. Parekh received his educational training from prestigious institutions: Ph.D. in Electrical Engineering and Computer Science from MIT (1992) S.M. in Operations Research from MIT (1985) B.E.S. in Mathematical Sciences from Johns Hopkins University (1983) His research interests span multiple domains within computer networking and communications, with particular focus on Computer Networking , Wireless Communication Systems , Peer-to-Peer Systems , and Multimedia Networks . Dr. Parekh has made significant contributions to the understanding of quality of service in data networks, spectrum sharing mechanisms, and peer evaluation systems in MOOCs. His work on generalized processor sharing has been highly influential in the networking community. Dr. Parekh's publication record demonstrates a consistent research trajectory from theoretical networking foundations to practical applications. His early work focused on fundamental networking concepts like processor sharing and quality of service, while more recent publications address contemporary challenges in peer-to-peer systems, spectrum sharing, and educational technology. The breadth of his work spans from theoretical information theory to practical implementations in multimedia delivery systems and wireless communications. Among his notable achievements: Recipient of the IEEE Communication Society's William Bennett Prize Paper Award (1994) Co-author of the book "Resource Sharing in Networks" (2014) Co-inventor of multiple patents related to network bandwidth allocation Dr. Parekh has successfully bridged academia and industry throughout his career. Following his academic training, he co-founded FastForward Networks, which was later acquired by Inktomi. He has also served as a Venture Partner at Accel Partners and founded Flowgram, Inc. Since 2014, he has been co-founder and CEO of Lytmus Inc. His industry experience informs his academic work, particularly in understanding real-world networking challenges.
Çağatay Edemen is an Assistant Professor in the Department of Electrical and Electronics Engineering at Özyeğin University's Faculty of Engineering since 2013. His research spans communication theory, optical wireless systems, and next-generation mobile networks with significant contributions to international standards. Education: PhD in Electrical Engineering, Işık University (2014) Master's in Electrical Engineering, Işık University (2006) Bachelor's in Electrical Engineering, Marmara University (2003) Dr. Edemen's research focuses on information-theoretic aspects of multi-user cooperative communication and visible light communication (VLC) applications . His work bridges theoretical analysis with practical implementations, particularly in optical wireless systems for underwater, terrestrial, and vehicular environments. Recent projects explore reconfigurable intelligent surfaces (RIS) for underwater acoustic communication and VLC for electric vehicle charging infrastructure. His publication portfolio shows strong emphasis on optical wireless communication (35%), multi-user cooperative systems (30%), and 5G/6G mobile technologies (25%), with growing interest in underwater and vehicular applications. The most cited works include his IEEE WCNC 2008 Best Paper Award-winning research on three-user cooperative channels. Awards: IEEE WCNC Best Paper Award (2008) IEEE SIU Communication Society Best Paper Award (2024) IEEE Senior Member (2022) MEVICO Silver Award (2013) Dr. Edemen has secured multiple TÜBİTAK and European research grants totaling over $2M, including projects on UAV-based optical wireless backhaul and underwater VLC networks. He currently supervises 7 graduate students across PhD and MS programs, with research focusing on RIS performance, optical channel modeling, and vehicular networking. As executive director of OKATEM (Centre of Excellence in Optical Wireless Communication Technologies), he leads an international research team developing next-generation communication systems for terrestrial, non-terrestrial, and underwater environments. His CT&T Research Group actively collaborates with NYU Abu Dhabi and industry partners on optical wireless communication standards development, with recent patents pending in electric vehicle communication systems and accident notification technologies.
Dr. Fengwei An is an Associate Professor at the Shenzhen-Hong Kong Institute of Microelectronics , Southern University of Science and Technology (SUSTech). He earned his Ph.D. in Engineering from Hiroshima University (2013) , following a Master's (2010) and Bachelor's (2006) from Qingdao University of Science and Technology. Current Role : 2025-Present - Associate Dean and Associate Professor, SUSTech Shenzhen-Hong Kong Institute of Microelectronics Prior Academic Roles : 2017-2018 - Associate Professor, Hiroshima University; 2013-2017 - Assistant Professor, Hiroshima University Industry Experience : 2018-2019 - Chief Engineer, Panasonic Semiconductor Co., Ltd., Japan Research Interests focus on low-power edge artificial intelligence chip design for computer vision, including: Ultra-large-scale digital integrated circuit design System-on-Chip (SoC) integration Image processing and recognition Machine learning hardware Autonomous driving applications High-speed motion tracking systems Publications include over 80 top-tier journal/conference papers (e.g., TCAS-I/II, ESSCIRC, APCCAS) on AI accelerators, stereo vision processors, and sensor interfaces, with 15 recent articles highlighting advancements in stereo matching, video denoising, and reconfigurable coprocessors. Scientific Awards : 2023 - SUSTech Outstanding Teaching Award 2022 - APCCAS Best Paper Nomination 2022 - PrimeAsia Bronze Leaf Award 2020 - Wu Wenjun Artificial Intelligence Science and Technology Award (Second Prize) Patents : 9 Chinese and 3 Japanese inventions in AI chip design, stereo matching systems, and sensor interfaces.
Dr. Longyang Lin is an Assistant Professor at the School of Microelectronics, Southern University of Science and Technology (SUSTech) in Shenzhen, China. He received his Ph.D. from the National University of Singapore in 2018 and has been with SUSTech since May 2021. His research focuses on cutting-edge integrated circuit design with emphasis on ultra-low power systems, hardware security, and cryogenic circuits. Education: Ph.D., National University of Singapore, 2018 M.Sc., Lund University, 2011-2013 B.Sc., Umeå University & B.Eng., Shenzhen University, 2007-2011 Dr. Lin's research spans ultra-low power digital circuit design , energy-efficient AI processor design , compute-in-memory , on-chip sensor fusion , and cryogenic CMOS circuit design . His work addresses critical challenges in battery-less systems, hardware security, and energy-efficient computing. He has developed innovative solutions for self-powered sensor nodes, widely energy-scalable VLSI systems, and secure integrated circuits that operate across extreme temperature ranges. His recent publications demonstrate a strong focus on hardware security, ultra-low power design, and biomedical applications. The research shows a clear progression toward more integrated systems that combine sensing, processing, and communication in highly energy-constrained environments. Many papers address the challenge of maintaining performance while drastically reducing power consumption, with several targeting sub-nanowatt operation. Scientific Awards: Takuo Sugano Award for Outstanding Far-East Paper, ISSCC 2022 ISSCC Demonstration Session Certificate of Recognition, 2022 ISSCC Demonstration Session Certificate of Recognition, 2020 IEEE SSCS Singapore Chapter Award, 2017 & 2018 ISSCC Student Travel Grant Award, 2017 Dr. Lin actively mentors students and researchers, with openings for Research Assistant Professors, Postdoctoral Fellows, Research Assistants, and Graduate Students. His research group benefits from ample funding and regular tape-out opportunities (3-5 per year across different process nodes). He serves as Associate Editor for IEEE Transactions on VLSI Systems and has authored or co-authored over 40 publications, including 10 in IEEE JSSC, 5 in ISSCC, and 12 in VLSI Circuits conference. His laboratory focuses on integrated circuit design for ultra-low power applications, with specialized expertise in hardware security, energy harvesting systems, and cryogenic electronics. The research environment supports tape-outs in advanced CMOS processes, enabling practical validation of theoretical designs.
