Longyang Lin

Dr. Longyang Lin is an Assistant Professor at the School of Microelectronics, Southern University of Science and Technology (SUSTech) in Shenzhen, China. He received his Ph.D. from the National University of Singapore in 2018 and has been with SUSTech since May 2021. His research focuses on cutting-edge integrated circuit design with emphasis on ultra-low power systems, hardware security, and cryogenic circuits.

Education:

• Ph.D., National University of Singapore, 2018
• M.Sc., Lund University, 2011-2013
• B.Sc., Umeå University & B.Eng., Shenzhen University, 2007-2011

Dr. Lin's research spans ultra-low power digital circuit design, energy-efficient AI processor design, compute-in-memory, on-chip sensor fusion, and cryogenic CMOS circuit design. His work addresses critical challenges in battery-less systems, hardware security, and energy-efficient computing. He has developed innovative solutions for self-powered sensor nodes, widely energy-scalable VLSI systems, and secure integrated circuits that operate across extreme temperature ranges.

His recent publications demonstrate a strong focus on hardware security, ultra-low power design, and biomedical applications. The research shows a clear progression toward more integrated systems that combine sensing, processing, and communication in highly energy-constrained environments. Many papers address the challenge of maintaining performance while drastically reducing power consumption, with several targeting sub-nanowatt operation.

Scientific Awards:

• Takuo Sugano Award for Outstanding Far-East Paper, ISSCC 2022
• ISSCC Demonstration Session Certificate of Recognition, 2022
• ISSCC Demonstration Session Certificate of Recognition, 2020
• IEEE SSCS Singapore Chapter Award, 2017 & 2018
• ISSCC Student Travel Grant Award, 2017

Dr. Lin actively mentors students and researchers, with openings for Research Assistant Professors, Postdoctoral Fellows, Research Assistants, and Graduate Students. His research group benefits from ample funding and regular tape-out opportunities (3-5 per year across different process nodes). He serves as Associate Editor for IEEE Transactions on VLSI Systems and has authored or co-authored over 40 publications, including 10 in IEEE JSSC, 5 in ISSCC, and 12 in VLSI Circuits conference.

His laboratory focuses on integrated circuit design for ultra-low power applications, with specialized expertise in hardware security, energy harvesting systems, and cryogenic electronics. The research environment supports tape-outs in advanced CMOS processes, enabling practical validation of theoretical designs.