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Dr. Chengmo Yang is a Professor in the Department of Electrical and Computer Engineering at the University of Delaware, with a joint appointment. She received her PhD and MSc in Computer Science from the University of California, San Diego, and a BSc in Microelectronics from Peking University, China. PhD, University of California, San Diego MSc, University of California, San Diego BSc, Peking University, China Her research focuses on enhancing security, reliability, non-volatility, and energy efficiency in embedded systems, cyber-physical systems (CPS), and Internet-of-Things (IoT). She leads the Computer Architecture, Reliability, and Security (CARES) group and has authored over 70 peer-reviewed publications. Recent publications emphasize neural network accelerators, non-volatile memory (NVM) optimization, and security frameworks for embedded systems. Her work explores fault tolerance, wear leveling, and side-channel attack mitigation in NVM-based FPGAs, STT-RAM, and SSDs. National Science Foundation Career Award (2013) University of Delaware Mid-Career Faculty Excellence in Scholarship Award (2020) Best paper award at ICESS (2019) Three best paper nominations at DAC, DATE, and GLSVLSI (2019) Dr. Yang serves as Associate Editor for IEEE TCAD and ACM TODAES. She is the Diversity & Inclusion Representative for IEEE CEDA and has organized numerous conferences including Technical Program Chair for CODES-ISSS 2022. Her lab has hosted current and former students like Fanruo Meng (PhD candidate), Fateme Hosseini (Qualcomm), and Patrick Cronin (Intel), focusing on graduate-level research in hardware security and reliability.

• Embedded Systems
• Design Automation
• Computer Architecture
• +6 more

Yingyan (Celine) Lin is an Associate Professor in the School of Computer Science at Georgia Institute of Technology, leading the Efficient and Intelligent Computing (EIC) Lab. Her work focuses on cross-layer innovations in machine learning systems, from algorithms to chip design, aiming to advance green AI and ubiquitous machine learning. She holds a Ph.D. in Electrical and Computer Engineering from the University of Illinois at Urbana-Champaign (2017). Research interests include efficient machine learning, neural rendering (e.g., NeRF), hardware-software co-design for AI acceleration, and graph neural networks. Her lab has pioneered projects like RTML and 3DML, funded by NSF, NIH, DARPA, and industry partners (Qualcomm, Intel, Meta). Awards: NSF CAREER Award (2021), ACM SIGDA Outstanding Young Faculty (2022), Meta Faculty Research Award (2022) Grants: Multi-university projects funded by NSF, NIH, DARPA, SRC, ONR, and industry Recognition: First-place wins at DAC 2022 and TinyML Design Contest 2022, IEEE Micro Top Pick 2023 Her research bridges algorithmic innovation with hardware implementation, emphasizing energy efficiency and real-time performance for applications in AR/VR, computer vision, and neuro-symbolic AI systems.

• Efficient Machine Learning
• Cross-Layer Innovations
• Green AI
• +7 more

Tomas Palacios is a Professor of Electrical Engineering at the Massachusetts Institute of Technology (MIT) , where he directs the Center for Graphene Devices and 2D Systems and leads the Microsystems Technology Laboratories (MTL). His research focuses on pushing the boundaries of microelectronics through novel semiconductor materials and device architectures, including Gallium Nitride (GaN) and 2D materials like graphene and molybdenum disulfide (MoS2). Professor, MIT Electrical Engineering and Computer Science Director, MIT Center for Graphene Devices and 2D Systems Clarence J. LeBel Professor, MIT Faculty Director, Northeast Microelectronics Internship Program (NMIP) Research Interests span multiple cutting-edge domains: High-frequency electronics (>300 GHz) for 6G and quantum applications High-voltage power devices (600V–10kV) for energy conversion Post-silicon logic devices using 2D materials High-temperature electronics (e.g., Venus rover applications) Distributed neural networks on large-area 2D materials Graphene-based biosensors and chemical detection systems Scientific Contributions include: Double recipient of the IEEE George Smith Award for groundbreaking GaN transistor work Co-invented first MoS2 electronic circuits Developed world’s first Wi-Fi-to-electricity conversion antenna Led MIT’s Microsystems Technology Laboratories since 2021 Advising Philosophy emphasizes cross-layer expertise, with students gaining experience from materials synthesis to system-level prototyping. His lab has incubated startups like Vertical Horizons , focused on GaN power devices for AI and EVs.

• Semiconductor Physics
• Gallium Nitride (GaN) Electronics
• Two-Dimensional Materials
• +6 more

Hyesoon Kim is a Professor at the Georgia Institute of Technology , affiliated with the College of Computing and leading the HPArch research group . She co-directs the Center for Research into Novel Computing Hierarchies (CRNCH) . Her research focuses on Computer Architecture , GPU , Compilers and Runtime Systems , and Hardware Security , particularly for heterogeneous systems. Contact : hyesoon@cc.gatech.edu Location : 266 Ferst Drive, KACB 2344, Atlanta, GA Research Trends Her recent work spans RISC-V extensions for security, CUDA optimization on softcore GPUs, memory safety techniques, and energy-efficient deep learning architectures. Articles emphasize heterogeneous computing , GPU performance scaling, and IoT -oriented neural network methods. Open Source Projects She leads development of Macsim (heterogeneous architecture simulator) and Vortex (open-source GPU platform).

• Computer Architecture
• GPU
• Compilers and Runtime Systems
• +3 more

Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology, with a courtesy appointment in the School of Computer Science. He earned his PhD in Electrical Engineering and Computer Science from MIT in 2014, an MSE in Electrical Engineering from Princeton University in 2009, and a B.Tech in Electrical Engineering from IIT Delhi in 2007. His research spans computer architecture, interconnection networks, networks-on-chip (NoC), and AI/ML accelerator systems, with a focus on optimizing data movement in modern computing platforms. His work is funded by NSF, DARPA, IARPA, SRC, Department of Energy, Intel, Google, Meta, Qualcomm, and TSMC. His papers have been cited over 17,000 times, with three receiving IEEE Micro's Top Picks recognition, one earning an honorable mention, and four winning best paper awards. Dr. Krishna leads the Synergy Lab at Georgia Tech and has developed several influential tools including ASTRA-sim for distributed AI/ML training, MAESTRO and SCALE-sim for accelerator design space exploration, and Garnet2.0 for NoC simulation. His recent work focuses on large language model acceleration, distributed training systems, and neuro-symbolic AI architectures. He has received numerous teaching and research awards including induction into the HPCA Hall of Fame (2022), the Class of 1940 Teaching Effectiveness Award (2018), and the Roger P. Webb Outstanding Mid-career Faculty Award (2024). HPCA Hall of Fame Inductee (2022) Roger P. Webb Outstanding Mid-career Faculty Award (2024) Richard M. Bass/Eta Kappa Nu Outstanding Junior Teacher Award (2023) Roger P. Webb Outstanding Junior Faculty Award (2021) Class of 1940 Course Survey Teaching Effectiveness Award (2018) Dr. Krishna currently serves as Associate Director for the Center for Research into Novel Computing Hierarchies (CRNCH) and co-chair of the Chakra Execution Traces and Benchmarks Working Group. He has held the ON Semiconductor (Endowed) Junior Professorship at Georgia Tech (2019-2021) and has been a visiting professor at MIT EECS, Harvard University CS, and a researcher at Intel's VSSAD group.

• Computer Architecture
• Interconnection Networks
• Networks-on-Chip
• +4 more

Hang Lu is a Professor and holds the Cecil J. "Pete" Silas Chair of Chemical & Biomolecular Engineering at the Georgia Institute of Technology. Dr. Lu also holds a Love Family Professorship and leads the Lµ Fluidics Group, which focuses on engineering microfluidic systems and machine learning tools to address complex questions in neuroscience, developmental biology, and cell biology that are difficult to address with conventional techniques. Dr. Lu's research lies at the intersection of engineering and biology, with primary interests including: Microfluidic systems for high-throughput screens and image-based genetics and genomics Systems biology: large-scale experimentation and data mining Microtechnologies for optical stimulation and optical recording Big data, machine vision, and automation Developmental neurobiology, behavioral neurobiology, and systems neuroscience Cancer biology, immunology, embryonic development, and stem cells Her laboratory engineers microfluidic devices and BioMEMS to study neuroscience, genetics, cancer biology, and biotechnology. These miniaturized Lab-on-a-chip tools operate at scales comparable to biological systems, leveraging unique micro and nano-scale phenomena to gather large-scale quantitative data about complex biological systems. Current projects include Microfluidics for Life Sciences, Optical Neuron Recordings and Manipulations, Machine Learning Tools for Neuroscience, Measuring and Modeling Behavior, and High-throughput, High-content Cell-based Assays. Analysis of Dr. Lu's recent publications (2024-2025) reveals a strong trend toward integrating microfluidics with advanced computational methods: Development of deep learning frameworks for biological image analysis Advanced neuron tracking and functional imaging techniques Non-invasive characterization of 3D organoid cultures Sophisticated neuromechanical modeling of locomotion Microfluidic temperature control systems for in vivo studies Label-free imaging pipelines for neural development Dr. Lu's significant professional honors include: Cecil J. "Pete" Silas Chair of Chemical & Biomolecular Engineering Love Family Professorship The Lµ Fluidics Group actively mentors students and postdocs, currently accepting new postdoctoral researchers. The lab receives substantial funding for interdisciplinary projects at the engineering-biology interface, with research implications spanning fundamental biological understanding to therapeutic development. The group operates within Georgia Tech's School of Chemical & Biomolecular Engineering, with specialized facilities for microfluidic device fabrication, biological experimentation, and advanced imaging, maintaining strong collaborative ties across engineering, neuroscience, and biological disciplines.

• Microfluidics
• Systems Biology
• Neuroscience
• +6 more

Dr. Jiamin Li is an Associate Professor at the School of Microelectronics, Southern University of Science and Technology (SUSTech), Shenzhen, China. She holds a Ph.D. and B.Eng. in Electrical and Computer Engineering from the National University of Singapore (NUS). Her research focuses on biomedical integrated circuits, energy harvesting, and wireless body-area networks. Education: Ph.D. and B.Eng. in Electrical and Computer Engineering from NUS Employment: Associate Professor (2024–Present), Assistant Professor (2022–2024) at SUSTech; Research Fellow at NUS Dr. Li's research addresses wireless body area powering , low-power biosignal interfaces , and intelligent biosignal processors . Her work leverages microsystem design for applications in biomedical engineering , particularly in energy-autonomous medical devices and human body-coupled communication . Her recent publications highlight advancements in concurrent power/data transmission , subharmonic pulse injection , and triboelectric energy harvesting for biomedical systems. Key venues include IEEE JSSC , Nature Electronics , and conferences like ISSCC and BioCAS. Awards: IEEE SSCS Predoctoral Achievement Award, ISSCC Best Demo Award, ASSCC SDC Best Design Award Committees: IEEE SSCS Women-in-Circuit (WiC) Committee, ISSCC Student Research Preview Committee Opportunities: Positions available for Ph.D., Master's, Postdoctoral Fellows, and Visiting Scholars

• Integrated Circuit Design
• Biomedical Microsystems
• Low-Power Sensor Interfaces
• +3 more

Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University, with a courtesy appointment in Computer Science. She leads the Stanford Accelerate research group, focusing on domain-specific hardware architectures and agile hardware-software co-design. Her work emphasizes high-performance, energy-efficient accelerators for emerging technologies. Education: B.Tech. from IIT Delhi (2011), M.S. and Ph.D. from MIT (2013/2018). Postdoctoral experience includes NVIDIA Research (2018) and Amazon Visiting Academic (2023–present). Awards include the Sloan Research Fellowship (2024), NSF CAREER Award (2023), and Terman Faculty Fellowship (2018). Research Interests: Domain-specific architectures, near-memory computing, design productivity, and machine learning acceleration. Her group develops frameworks like AHA (Agile Hardware) for efficient accelerator design and compilers. Awards: Over 10 major awards, including best paper recognitions at VLSI, MICRO, and JSSC. Active roles as Associate Editor for IEEE JSSC and Program Chair for IEEE Hot Chips (2020). Advising & Teaching: Supervises multiple PhD and MS students in hardware design, CGRAs, and ML accelerators. Teaches VLSI design courses (EE271/272/372) and oversees independent studies in embedded systems and chip design. Labs & Collaborations: Affiliated with Stanford PORTAL Center, AHA Center, and SystemX Alliance. Projects include MINOTAUR (edge AI accelerator), Amber (CGRA-based SoC), and EMBER (RRAM macros).

• Domain-Specific Architectures
• Hardware/Software Co-design
• Energy-Efficient Computing
• +3 more

Sarita V Adve is the Richard T. Cheng Professor of Computer Science at the University of Illinois at Urbana-Champaign, where she conducts research spanning hardware, programming languages, operating systems, and applications with a focus on domain-specific systems. Her work bridges theoretical foundations and practical implementations, particularly in extended reality and heterogeneous computing. Her educational background includes a Ph.D. and M.S. in Computer Science from the University of Wisconsin-Madison (1993, 1989) and a B.Tech in Electrical Engineering from the Indian Institute of Technology Bombay (1987). Prior to joining Illinois, she served on the faculty at Rice University from 1993 to 1999. Adve's research centers on generalizable and scalable specialization for domain-specific systems, with current emphasis on extended reality (XR) systems including virtual, augmented, and mixed reality. She chairs the ILLIXR consortium to democratize XR research and developed the first fully open-source XR system (ILLIXR). Her foundational contributions include memory consistency models for C++ and Java programming languages, the Spandex coherence framework for heterogeneous systems, and software-driven approaches for hardware reliability. Her work spans hardware reliability (SWAT and RAMP projects), power management (GRACE system), and instruction-level parallelism. Recent publications reveal a strong focus on energy-efficient XR systems, hardware-software co-design for AI workloads, and resilience analysis. Her team explores rendering offload, visual-inertial odometry optimization, and compositional error injection frameworks, often targeting tradeoffs between energy, latency, and accuracy in mobile and edge environments. Fellow of the American Academy of Arts and Sciences Fellow of the ACM and IEEE ACM/IEEE-CS Ken Kennedy Award Anita Borg Institute Woman of Vision in Innovation Award ACM SIGARCH Maurice Wilkes Award Alfred P. Sloan Research Fellowship UIUC University Scholar University of Illinois Campus Award for Excellence in Graduate Student Mentoring Adve actively mentors students and has received multiple teaching awards. She co-founded the CARES movement to address discrimination in CS research events and chairs CS@Illinois CARES. Her service includes leadership roles in ACM SIGARCH (2015-2019), DARPA/ISAT study group, ACM Council, and Computing Research Association. She has secured significant funding including DARPA initiatives and Google Faculty Research Awards. She leads the ILLIXR consortium and has established collaborative research programs such as the $8.3M DARPA Joint University Microelectronics Program. Her lab focuses on open-source XR development, heterogeneous system architectures, and reliability-aware designs, with strong industry and government partnerships.

• Computer Architecture
• Extended Reality Systems
• Heterogeneous Computing
• +4 more

Srijan Kumar is an Assistant Professor in the School of Computational Science and Engineering at Georgia Institute of Technology's College of Computing. His research focuses on data science, AI for security, and online safety, addressing challenges in detecting malicious users, misinformation, and enhancing AI robustness. His work has been deployed in platforms like Flipkart and Wikipedia, and recognized through awards such as the NSF CAREER and Forbes 30 Under 30. Education: B.Tech from Indian Institute of Technology, Kharagpur Ph.D. in Computer Science from University of Maryland, College Park Postdoctoral training at Stanford University Research Interests: Multi-modal/multi-lingual detection of harmful content and users Adversarial robustness of AI models Graph and network analysis for early detection Responsible recommender systems Awards & Grants: NSF CAREER Award (2023) Kavli Fellow (2022) Facebook/Adobe Faculty Awards NSF Convergence Accelerator Phase II grant ($5M) Advising & Labs: Leads the CLAWS Lab, advising over 20 students. Active in mentoring through conferences and NSF-funded projects.

• Data Science
• Applied Machine Learning
• Network Analysis
• +7 more

Subhasish Mitra is the William E. Ayer Professor of Electrical Engineering and Computer Science at Stanford University, holding dual appointments in both departments. He leads the Stanford Robust Systems Group and serves on the leadership team of the Microelectronics Commons AI Hardware Hub under the US CHIPS and Science Act. His research spans Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences, with breakthroughs in X-Compact test compression, carbon nanotube computing, and 3D integration. He has held international roles like the Carnot Chair at CEA-LETI and Visiting Professorships globally. Education & Honors: Recipient of over 40 awards including the IEEE Computer Society’s Harry H. Goode Memorial Award, ACM/IEEE’s A. Richard Newton Technical Impact Award, and the Intel Achievement Award. He earned top academic accolades from IIT Kharagpur and Jadavpur University, and is a Fellow of ACM and IEEE. Research Impact: Pioneered first-of-their-kind systems like the carbon nanotube computer and monolithic 3D integration. His work on robust computing techniques like QED validation and X-Compact compression has industry-wide adoption, saving billions in manufacturing costs. Collaborates with industry leaders like Intel, Google, and Samsung. Publications & Grants: Over 400 publications, including award-winning papers in DAC, ISSCC, and IEEE journals. Leads grants from NSF, DoE, and industry partnerships. His lab explores cutting-edge topics like neuromorphic computing, 3D thermal scaffolding, and AI hardware acceleration. Administration & Outreach: Serves as Associate Chair (Faculty Affairs) for Stanford’s Computer Science Department. Recognized by students for mentorship, and frequently invited to global forums like the World Economic Forum and National Academy of Engineering.

• Robust Computing
• NanoSystems
• Electronic Design Automation (EDA)
• +3 more

Vijay Raghunathan is a Professor in the Department of Electrical and Computer Engineering at Purdue University's College of Engineering. His work focuses on hardware and software architectures for embedded systems, wireless sensors for IoT, and wearable/implantable electronics with emphasis on low power design, energy harvesting, emerging memory technologies, and secure system design. Academic Rank: Professor Department: Electrical and Computer Engineering University: Purdue University Research Focus: Energy-efficient embedded systems, IoT, wearable devices His research explores low power design at both board-level and system-on-chip scales, micro-scale energy harvesting , and reliable/secure system design for medical devices. Recent work focuses on Processing-in-Sensor/Memory for battery-free AIoT devices, state space models for neural processing units, and security coprocessor integration in autonomous systems. Analysis of his publications reveals trends in energy-efficient neural network acceleration , approximate computing for edge inference , and compute-in-memory architectures . Key subfields include collaborative edge-cloud partitioning , sparse DNN accelerators , and security frameworks for medical devices. Vijay's work also addresses energy-accuracy tradeoffs in multimodal cognitive systems and intermittent computing using non-volatile memory technologies. His contributions span from microcontroller energy management to security protocols for implantable electronics.

• Embedded Systems
• Internet of Things (IoT)
• Wearable and Implantable Electronics
• +4 more

Hamed Rahmani is an Assistant Professor of Electrical and Computer Engineering at New York University (NYU Tandon School of Engineering). He is affiliated with NYU WIRELESS and the Center for Advanced Technology in Telecommunications (CATT), leading the Research in Advanced Integrated Systems and Electronics (RAISE) Lab. His research focuses on integrated circuits and systems for biomedical applications, IoT, and 5G/6G communication. Education: Ph.D., Electrical and Computer Engineering, UCLA (2020) M.Sc., Electrical and Computer Engineering, Rice University (2017) B.Sc., Electrical Engineering, Sharif University of Technology (2014) Research Interests: RF/mm-Wave circuits, low-power biomedical sensors, energy-efficient IoT systems, and wireless power transfer. His work emphasizes miniaturized implants, smart healthcare, and sustainable electronics. Awards: Recipient of the NSF CAREER Award (2025), IEEE MTT-S Graduate Fellowship (2019), and the 2023 Best Paper Award in the Journal of Microwave. He serves on technical committees for major conferences like CICC and IMS. Labs & Groups: Directs the RAISE Lab, collaborating with NYU WIRELESS on 6G research and CATT for technology transfer.

• Integrated Circuits
• RF/mm-Wave and THz Circuits
• Low-Power Sensors
• +5 more

David Wentzloff is a Professor of Electrical Engineering and Computer Science at the University of Michigan, where he has been on faculty since 2007. He directs the Wireless Integrated Circuits and Systems (WICS) group and serves as Director of the Michigan Integrated Circuits Laboratory (MICL). Wentzloff received his B.S.E. from the University of Michigan in 1999 and his S.M. and Ph.D. from MIT in 2002 and 2007. Wentzloff's research focuses on low-power integrated circuits for wireless communication in energy-constrained and volume-constrained applications. His work spans three primary areas: Synthesizable all-digital radios and radio building blocks Wireless body sensor networks (channel modeling, radios, and antennas) Radios and interfaces for millimeter-scale computing devices His innovations have significantly reduced power consumption in wireless communication for IoT devices, impacting standards including Bluetooth, WiFi, and 5G/6G. Analysis of his publication record reveals a consistent focus on ultra-low power wireless communication, with recent work emphasizing back-channel communication techniques that achieve 500x power reduction compared to conventional approaches. His research bridges theoretical circuit design with practical applications in healthcare, industrial monitoring, and consumer electronics. Wentzloff's scientific recognition includes: 2024 University of Michigan Faculty Recognition Award NSF CAREER Award (2012) DARPA Young Faculty Award (2009) Multiple best paper awards Two-time recipient of the Eta Kappa Nu Professor of the Year Award As an educator and mentor, Wentzloff has graduated 21 doctoral students and mentored dozens of master's and undergraduate researchers. He has taught courses ranging from introductory circuits to advanced graduate topics in analog and RF design. His entrepreneurial impact includes co-founding three successful companies: Everactive (formerly PsiKick), Movellus, and CubeWorks, which commercialize technologies developed in his research lab. Wentzloff leads the WICS research group, which operates within the Michigan Integrated Circuits Laboratory. His team develops cutting-edge technologies for batteryless sensing systems, millimeter-scale computing platforms, and ultra-low power wireless communication solutions that enable the next generation of Internet of Things applications.

• RF integrated circuits
• Ultra-low power design
• Wireless communication
• +4 more

Rakesh Kumar is a Professor and John Bardeen Faculty Scholar in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign. His work focuses on computer architecture, system-level design automation, and low-power computing. PhD in Computer Engineering from University of California, San Diego BS in Electrical Engineering from IIT Kharagpur His research spans all layers of the computing stack, with key contributions to flexible computer systems , waferscale computing , error-resilient architectures , and approximate computing . He has pioneered work on voltage-reliability tradeoffs and peak power management techniques. Recent publications highlight trends in space microdatacenters , printed microprocessors , and neural graph accelerators . His work on plastic chips was recognized as one of the three biggest semiconductor headlines of 2022 by IEEE Spectrum. IEEE Fellow (2024) ISCA Influential Paper Award MICRO Test-of-Time Award ICCAD Ten Year Retrospective Most Influential Paper Award Best Paper Awards at CASES, SELSE, HPCA He has received teaching accolades including the Stanley H. Pierce Faculty Award and Ronald W. Pratt Outstanding Teaching Award . His research group explores hardware-software co-design for emerging applications in AI, IoT, and sustainable computing.

• Computer Architecture
• System-Level Design Automation
• Low Power Computing
• +3 more