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Kian-Lee TanView profile

Professor

• Query Processing
• Big Data Analytics
• Database Systems
• +5 more

Kian-Lee Tan is a Tan Sri Runme Shaw Senior Professor and Professor of Computer Science at the School of Computing, National University of Singapore (NUS). He holds a Ph.D. (1994), M.S. (1992), and B.Sc. (1st Class Honours) from NUS. His academic career spans decades of contributions to database systems and data analytics. Ph.D. in Computer Science, National University of Singapore (1994) M.S. in Computer Science, National University of Singapore (1992) B.Sc. in Computer Science (1st Class Honours), National University of Singapore As a leading researcher in database systems, Tan focuses on query processing and optimization in multiprocessor/distributed systems, database performance, security, and multimedia information retrieval. His work extends to computational biology applications like genome databases and real-time influence analysis on social streams. His recent publications highlight trends in GPU-accelerated graph analytics, trajectory pattern mining, and computational journalism. These works emphasize parallel processing, performance optimization, and social/media data analysis. IEEE Technical Achievement Award (2013) President Science Awards, Singapore (2011) NUS Graduate School Excellent Mentor Award (2010/2011) Outstanding University Researchers Award (1997/1998) Tan has supervised numerous research projects and mentored students contributing to database systems. He secured significant grants including a US$1 million Ripple Foundation grant (2024) for financial technology education. His editorial roles include ACM Transactions on Database Systems and IEEE Transactions on Knowledge and Data Engineering. He leads the FinTech Lab at NUS Computing and has served on the VLDB Endowment Board (2012-2017). His work bridges database foundations with emerging applications in AI, fintech, and computational journalism.

Daniel Dominic Kaplan SleatorView profile

Professor

• Algorithms
• Data Structures
• Theoretical Computer Science
• +5 more

Daniel Dominic Kaplan Sleator is a Professor of Computer Science at Carnegie Mellon University's School of Computer Science. He maintains an office in the Gates-Hillman Center (7205 Gates-Hillman) and teaches various courses in algorithms and theoretical computer science. Professor Sleator's research spans several areas of theoretical computer science and algorithms. His primary interests include: Algorithms and Data Structures Amortized Analysis and Competitive Analysis Persistent and Self-Adjusting Data Structures Computational Geometry and Combinatorial Optimization Combinatorial Game Theory and Mathematical Games Music Analysis using Computational Methods His extensive publication record shows a consistent focus on efficient data structures and algorithms. Over the years, his work has evolved from foundational data structures like splay trees and skew heaps to applications in diverse areas such as music analysis and combinatorial games. A notable trend in his work is the development of self-adjusting data structures that achieve excellent amortized performance without maintaining explicit structural constraints. His papers on splay trees, skew heaps, and persistent data structures have become classics in the field. Professor Sleator has made significant contributions across multiple domains of computer science. His work on competitive algorithms for paging and list update problems has been particularly influential, establishing fundamental results in online algorithms. His research extends beyond traditional computer science into interdisciplinary areas like computational music theory, demonstrating the broad applicability of algorithmic thinking. He teaches a variety of courses including Algorithms 15-451/651, Competition Programming 15-295, and specialized topics like mathematical games.

• Databases
• Data Mining
• Machine Learning
• +3 more

Ming-Syan Chen is a distinguished academic holding dual roles as a Distinguished Research Fellow and Director of the Research Center for Information Technology Innovation (CITI) at Academia Sinica, Taiwan, and a Distinguished Professor jointly appointed across multiple departments at National Taiwan University (NTU), including Electrical Engineering (EE), Computer Science and Information Engineering (CSIE), and the Graduate Institute of Communication Engineering (GICE). His career spans academia and industry, with prior roles as a research staff member at IBM Watson Research Center and leadership positions in Taiwan's technology sector. Education: He earned a B.S. in Electrical Engineering from National Taiwan University, followed by M.S. and Ph.D. degrees in Computer, Information, and Control Engineering from the University of Michigan, Ann Arbor. Research Interests: Chen's work focuses on databases, data mining, machine learning, multimedia networking, and cloud computing. He has authored over 350 papers and holds numerous patents, contributing to foundational advancements in query processing, data management, and networked systems. Award Highlights: Recipient of ACM and IEEE Fellowships, National Chair Professorship (lifetime honor), Teco Award, Pan Wen Yuan Distinguished Research Award, and IBM's Outstanding Innovation Award. His contributions span research, teaching, and technology commercialization. Leadership & Service: Former Dean of NTU's College of Electrical Engineering and Computer Science, CEO of Taiwan's Networked Communication Program, and Editor-in-Chief of the International Journal of Electrical Engineering. He has chaired international conferences and served on editorial boards of journals like IEEE TKDE and VLDB. Labs & Teams: Leads the Network Database Laboratory and collaborates on national initiatives in information and communication technologies. His research groups focus on data science, distributed systems, and social network analysis.

• Computer Architecture
• Datacenter Systems
• Cloud-Native Server Architecture
• +7 more

Babak Falsafi is a Full Professor at the School of Computer and Communication Sciences (IC) at EPFL, leading the Parallel Systems Architecture Laboratory (PARSA). He is a renowned expert in computer architecture, datacenter systems, and cloud-native server design. His research focuses on post-Moore era computing, emphasizing heterogeneous architectures, energy efficiency, and scalable IT infrastructure. Falsafi is the founder of EcoCloud, an EC-sponsored industrial-academic consortium investigating sustainable information technology. He holds ACM and IEEE fellowships, a Sloan Research Fellowship, and has contributed to major projects like Optimus Prime (data transformation acceleration), AstriFlash (flash-based online service systems), and Midgard (virtual memory re-design). His work spans hardware-software co-design, memory systems, and security. Falsafi advises numerous PhD students and collaborates with industry partners such as Google and Cavium. Key achievements include pioneering scalable multiprocessor architectures, snoop filters in IBM BlueGene, and spatial memory streaming in ARM cores. His lab develops open-source tools like QFlex for server simulation. He frequently presents at top conferences (HPCA, ISCA, MICRO) and chairs workshops on post-Moore infrastructure. Teaching roles include leading courses in computer architecture and parallel systems across multiple EPFL departments (SIN, EDIC, SSC, SMA). His work addresses datacenter challenges like the 'data tax' and mitigating latency through specialized accelerators.

Jan MadsenView profile

Professor

• Embedded Systems
• Cyber-Physical Systems
• Microfluidic Biochips
• +5 more

Jan Madsen is a Professor at DTU Compute, Technical University of Denmark, and Head of the Embedded Systems Engineering section. His research focuses on system-level modeling and design of embedded computing systems, particularly cyber-physical systems, microfluidic biochips, and synthetic biology applications. Develops design automation tools and methodologies for embedded systems Supervises numerous PhD students and leads major research projects Research Interests Key areas include: Embedded systems-on-a-chip Cyber-Physical Systems (Internet-of-Things) Microfluidic Lab-on-Chip devices Synthetic biology with molecular computing Design, modeling, and optimization of complex systems Scientific Awards DATE Fellow (2019) IEEE CEDA Outstanding Recognition (2019) DTU Scientific Advise Award (2013) Best Paper Awards at MECO (2013) and CASES (2009) Jorck’s Foundation Research Award (1995) Publications His 14+ journal papers and 115+ conference papers demonstrate expertise in: SystemC-based modeling frameworks Energy-aware sensor networks Self-healing eDNA architectures Microfluidic biochip synthesis RTOS modeling and MPSoC exploration

José F. MartínezView profile

Professor

• Computer Architecture
• Microprocessor Design
• Multiprocessor and Multicore Architectures
• +5 more

José F. Martínez holds the Lee Teng-hui Professorship of Engineering at Cornell University's College of Engineering, where he leads research in computer architecture and systems. His roles include Vice Chair of ACM SIGARCH, IEEE Fellow, and past leadership roles in ISCA, MICRO, and IEEE Computer Society journals. He has received prestigious awards such as the NSF CAREER Award, IBM/Qualcomm Faculty Awards, and multiple teaching accolades including Tau Beta Pi Professor of the Year (2011). Education: Licenciado en Informática de Sistemas (1996), Universidad Politécnica de Valencia M.S. (1999) and Ph.D. (2002) in Computer Science, University of Illinois at Urbana-Champaign His research focuses on computer architecture , including microprocessors, multiprocessors, memory subsystems, embedded systems, and processing-in-memory (PIM) innovations. He co-leads the DARPA/SRC ACE Center for Evolvable Computing and NSF's CROPPS Center, and previously co-founded Cornell's Institute for Digital Agriculture (CIDA). His work bridges hardware-software co-design and sustainable computing. Key Contributions: Advancing energy-efficient multiprocessor architectures Developing PIM frameworks like PUMICE and Membrane Market-based resource allocation systems (e.g., XChange, ReBudget) His advising spans over 15 graduate students and has guided Merrill Presidential Scholars. Current research explores evolvable computing paradigms and AI hardware acceleration, reflecting his dual focus on foundational architecture and applied systems innovation.

Morteza FayaziView profile

Assistant Professor

• Electronic Design Automation (EDA)
• Machine Learning (ML) in Analog Circuit Design
• System-on-Chip (SoC) Design Automation
• +3 more

Morteza Fayazi is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Utah, with an adjunct position in the Kahlert School of Computing. His research focuses on Electronic Design Automation (EDA), applying machine learning to automate analog and mixed-signal circuit design, and developing high-performance computing systems. He holds a B.Sc. from Sharif University of Technology, and M.S.E./Ph.D. degrees from the University of Michigan. His research interests include AI-driven EDA, RF/circuit automation, and energy-efficient processors. Key achievements include the MEDAL lab’s work on terahertz radars, systolic-array processors (e.g., DAP and Versa), and open-source frameworks like FASCINET and Tablext. He has received awards such as the 2024 College of Engineering Dean’s ETR Fund and the 2017 Outstanding Undergraduate Thesis Award. Teaching responsibilities include multiple iterations of the Digital System Design course (ECE/CS 3700). His work spans over 15 peer-reviewed articles in IEEE Transactions, ACM, and top conferences like ICCAD and VLSI-SOC, emphasizing automation, efficiency, and AI integration in hardware design.

Ozcan OzturkView profile

Professor

• Heterogeneous Computing
• Hardware Accelerators
• GPU Computing
• +7 more

Ozcan Ozturk is a Professor in the Computer Science and Engineering and Electronics Engineering programs at Sabancı University's Faculty of Engineering and Natural Sciences. Previously, he held professorships at Bilkent University and adjunct roles at North Carolina State University. His expertise spans heterogeneous computing, parallel systems, processor architecture, and compiler optimization. He earned his Ph.D. from Penn State University, with prior academic roles at the University of Florida and internships at Intel and Marvell. Education: Ph.D. in Computer Science and Engineering (2007), Pennsylvania State University M.S. in Computer Engineering (2002), University of Florida B.Sc. in Computer Engineering (2000), Bogazici University Research interests include accelerator technologies, GPU-based systems, multicore processors, and compiler optimizations. His work focuses on improving parallelization efficiency, energy optimization, and reliability in heterogeneous architectures. He leads funded projects like 'Machine Learning for Compiler Flags' and 'Graph Accelerator Design'. Notable awards include the Bilkent Teaching Award (2019), BAGEP (2018), and HiPEAC Paper Award (2016). He serves on editorial boards of IEEE and ACM journals and chairs major conferences like ASPLOS and ICS. Grants and collaborations include partnerships with Huawei, Intel, NVIDIA, and TÜBİTAK. He advises over 20 students and has supervised projects in safety-critical systems, FPGA accelerators, and compiler-directed optimizations. His lab develops domain-specific architectures, including RISC-V extensions for graph processing.

Björn BrandenburgView profile

Researcher

• Real-Time Systems
• Scheduling Algorithms
• Real-Time Operating Systems
• +5 more

Björn Brandenburg is a researcher at the Max Planck Institute for Software Systems (MPI-SWS) in Kaiserslautern, Germany. His work focuses on real-time systems, scheduling algorithms, and operating system design, with a particular emphasis on predictable resource allocation and performance guarantees in multiprocessor and cyber-physical environments. His research interests include real-time response-time analysis (e.g., PROSA ), locking protocols for multiprocessor systems, side-channel mitigation in cloud environments, and the verification of real-time scheduling policies. He has contributed to foundational studies on deadline failure probabilities, self-suspending tasks, and predictable real-time Linux implementations. Scientific awards include recognition for outstanding papers on TimerShield (2017) Offline Equivalence (2017) . His work intersects with practical systems like LITMUSRT and ROS 2, aiming to bridge theoretical guarantees with real-world applications in safety-critical and distributed real-time systems.

Mithuna S. ThottethodiView profile

Professor

• Computer Architecture
• Interconnection Networks
• Distributed Systems
• +7 more

Mithuna S. Thottethodi is a Professor and Interim Associate Head of Teaching and Learning at the Elmore Family School of Electrical and Computer Engineering at Purdue University. He holds a B.Tech. from the Indian Institute of Technology, Kharagpur (1996), and a Ph.D. in Computer Science from Duke University (2002). His research focuses on computer architecture, interconnection networks, distributed systems, and security, with notable work on sparse tensor accelerators and processing-near-memory architectures. His work has been funded by the NSF, AT&T, and SK Hynix. Research interests include security, interconnection networks in multicores, storage performance optimization, and memory hierarchies. Notable contributions span hardware accelerators for machine learning, secure speculative execution, and datacenter network congestion control. He has advised over 20 graduate students, many of whom have joined top tech firms like Google, Microsoft, and Intel. Awards: NSF CAREER Award (2007) Wilfred Hesselberth Teaching Excellence Award (2021) Multiple Eta Kappa Nu Outstanding Professor Awards Teaching includes undergraduate courses like EE 437 (Computer Design) and graduate courses such as ECE 666 (Advanced Computer Architecture). He also advises VIP and EPICS student teams.

Jiang HuView profile

Professor

• VLSI Design Automation
• Hardware Security
• Machine Learning Applications
• +3 more

Jiang Hu is a Professor in the Department of Electrical and Computer Engineering at Texas A&M University, holding the Eric D. Rubin '06 Endowed Professorship. He also serves as Co-Director of Graduate Programs and is affiliated with the Computer Science & Engineering department. His research focuses on VLSI design automation, machine learning applications, and hardware security. He has held roles as editor for IEEE Transactions on CAD and ACM Transactions on Design Automation, and chaired the 2012 ACM International Symposium on Physical Design. Education: B.S. in Optical Engineering (Zhejiang University, 1990), M.S. in Physics (1997), and Ph.D. in Electrical Engineering (University of Minnesota, 2001). He worked at IBM Microelectronics before joining Texas A&M in 2002. Research interests include energy-efficient VLSI circuits, on-chip communication fabrics, analog layout automation, and AI-driven EDA. Recent work emphasizes machine learning for design closure, privacy-preserving frameworks, and systolic array-based architectures. Awards: IEEE Fellow (2016) Humboldt Research Fellowship (2012) Multiple best paper awards at DAC, ICCAD, and ASPDAC Advising and grants: Leads initiatives like the SLICE project, NSF workshops on ML-EDA infrastructure, and serves as Editor-in-Chief of ACM TODAES since 2024. His work bridges academic research and industry applications in EDA and semiconductor design. Labs/Teams: Active contributor to open-source tools like ALIGN for analog layout generation and collaborations on machine learning for EDA commons.

Clyde KruskalView profile

Associate Professor

• Parallel Computing
• Algorithms
• Computer Architecture
• +3 more

Clyde Kruskal is an Associate Professor in the Department of Computer Science at the University of Maryland, College Park. His research focuses on parallel architectures, models, and algorithms. He earned a Ph.D. from New York University in 1981 and a bachelor’s degree from Brandeis University in 1976. His work includes foundational contributions to parallel computing, such as the read–modify–write concept in distributed systems. Kruskal’s research spans topics like interconnection networks, synchronization mechanisms, and algorithm design for parallel systems. Education: Bachelor’s Degree: Brandeis University, 1976 Master’s Degree: New York University (Courant Institute), 1978 Ph.D.: New York University (Courant Institute), 1981 Research Interests: Parallel computing architectures, parallel algorithms design, multiprocessor synchronization, interconnection networks, and computational geometry problems like graph coloring and visibility analysis. His work emphasizes theoretical foundations and practical implementations in parallel systems. Notable Contributions: Kruskal co-authored the book Problems With A Point: Exploring Math And Computer Science (2019), and his research includes foundational papers on parallel prefix operations, sparse matrix algorithms, and synchronization protocols. His publications span over three decades, reflecting sustained contributions to parallel computing theory and practice. Advising & Outreach: He has mentored students through programs like the Summer Combinatorial Algorithms REU at UMD, fostering undergraduate research in algorithm design and parallel computing.

Shantanu DuttView profile

Professor

• VLSI CAD
• Discrete Optimization
• FPGA Testing and Trusted Design
• +2 more

Shantanu Dutt is a full Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago , located in Chicago, IL. His office is in 930 SEO at 851 S. Morgan St, and he can be reached at dutt@uic.edu . Education Ph.D. in Computer Science and Engineering, University of Michigan, Ann Arbor (1990) M.Tech. in Computer Engineering, Indian Institute of Technology Kharagpur (1984) B.E. in Electronics and Communication Engineering, Maharaja Sayajirao University of Baroda (1983) Research Interests Professor Dutt’s research agenda centers on VLSI Computer-Aided Design (CAD) , with particular emphasis on physical design and incremental synthesis targeting both ASICs and FPGAs. He explores discrete optimization techniques to solve placement, routing, and partitioning problems. Another major thrust is FPGA built-in self-test (BIST) and trusted design , ensuring provable diagnosability and security against hardware Trojans. He also investigates fault-tolerant computing at both chip and system levels, and develops parallel and distributed computing algorithms for scalable performance. Scientific Awards 1996 Best Paper Award , ACM/IEEE Design Automation Conference, for “A probability-based approach to VLSI circuit partitioning” 1995 Most Influential Paper Award , Fault-Tolerant Computing Symposium, for “Design and reconfiguration strategies for near-optimal k-fault-tolerant tree architectures” Research Impact and Funding Professor Dutt has published extensively in top-tier journals (IEEE TVLSI, ACM TRETS, IEEE TCAD) and premier conferences (ICCAD, DAC, DATE, FTCS). His work has shaped incremental placement, timing-driven routing, FPGA security, and fault-tolerant multiprocessor architectures. While specific grant numbers are not listed, the breadth and longevity of his publication record indicate sustained funding from NSF, industry, and other agencies. Laboratory and Collaborations Although no formal laboratory name is provided, Professor Dutt’s research is conducted within the ECE department’s VLSI CAD and Fault-Tolerance groups, collaborating with graduate students and colleagues across the US and internationally.

Stephen W. KecklerView profile

Adjunct Professor

• Computer Architecture
• Deep Learning Accelerators
• GPU Computing
• +4 more

Stephen W. Keckler is an Adjunct Professor at the Department of Computer Science , The University of Texas at Austin , and serves as Vice President of Architecture Research at NVIDIA . He is an ACM Fellow , IEEE Fellow , and Sloan Foundation Research Fellow . Education: BS in Electrical Engineering, Stanford University (1990) SM in Computer Science, Massachusetts Institute of Technology (1992) PhD in Computer Science, MIT (1998) Research Interests focus on computer architecture for deep learning , GPU computing , and energy-efficient systems . His work explores memory compression , network-on-chip designs , and heterogeneous computing . Publication Trends highlight advancements in deep learning accelerators , GPU memory systems , and energy-efficient architectures . Notable themes include sparsity exploitation , multi-chip modules , and fault-tolerant GPU pipelines . Scientific Recognition : ACM Fellow IEEE Fellow Sloan Foundation Research Fellow Best Paper Awards at ASPLOS 2009 and ISPASS 2011 Laboratory Affiliations : Computer Architecture and Technology Laboratory (CART) TRIPS Project (Tera-Op Reliable Intelligently adaptive Processing System) NVIDIA Research

• Embedded Systems
• Real-Time Systems
• Cyber-Physical Systems
• +7 more

Marco Caccamo is a Professor at the Technical University of Munich (TUM) , holding the Chair of Cyber-Physical Systems in Production Engineering within the Faculty of Mechanical Engineering. He is also a Principal Investigator and Professor at the Department of Computer Science, with courtesy appointments in Electrical and Computer Engineering, Coordinated Science Lab (CSL), and Aerospace Engineering at the University of Illinois at Urbana-Champaign (UIUC). His research spans Embedded Systems , Real-Time Systems , and Cyber-Physical Systems (CPS) , focusing on resource management, reinforcement learning architectures, and 6D pose recognition for robotics. University of Pisa (B.Sc., 1997) Scuola Superiore Sant'Anna (Ph.D., 2002) Research highlights include predictable resource management on heterogeneous platforms, security frameworks for AI-based controllers , and UAV testbed development . His work integrates deep learning and real-time constraints in industrial applications like avionics, farming, and automotive systems. His 15 most recent publications emphasize cache optimization , memory bandwidth regulation , and reinforcement learning for CPS , with a focus on multi-core processors and DNN inference . Awards include the IEEE Fellow (2018), Alexander von Humboldt Professorship (2018), and multiple Best Paper Awards at RTSS, RTNS, and RTAS. NSF CAREER Award (2003) IEEE Fellow (2018) Alexander von Humboldt Professorship (2018) Best Paper Awards (RTSS 2024, RTNS 2023, ECRTS 2019) He has advised numerous Ph.D. students and postdocs, with a track record in UAV development and industrial collaborations . His lab, the Real-Time and Embedded System Laboratory , focuses on real-time OS and predictable computing .