Find Academic Supervisors

Rakesh KumarView profile

Professor

• Computer Architecture
• System-Level Design Automation
• Low Power Computing
• +3 more

Rakesh Kumar is a Professor and John Bardeen Faculty Scholar in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign. His work focuses on computer architecture, system-level design automation, and low-power computing. PhD in Computer Engineering from University of California, San Diego BS in Electrical Engineering from IIT Kharagpur His research spans all layers of the computing stack, with key contributions to flexible computer systems , waferscale computing , error-resilient architectures , and approximate computing . He has pioneered work on voltage-reliability tradeoffs and peak power management techniques. Recent publications highlight trends in space microdatacenters , printed microprocessors , and neural graph accelerators . His work on plastic chips was recognized as one of the three biggest semiconductor headlines of 2022 by IEEE Spectrum. IEEE Fellow (2024) ISCA Influential Paper Award MICRO Test-of-Time Award ICCAD Ten Year Retrospective Most Influential Paper Award Best Paper Awards at CASES, SELSE, HPCA He has received teaching accolades including the Stanley H. Pierce Faculty Award and Ronald W. Pratt Outstanding Teaching Award . His research group explores hardware-software co-design for emerging applications in AI, IoT, and sustainable computing.

• Computer Architecture
• Interconnection Networks
• Approximate Computing
• +5 more

Natalie Enright Jerger is a Professor in the Department of Electrical and Computer Engineering at the University of Toronto's Faculty of Applied Science and Engineering. She holds the Canada Research Chair in Computer Architecture and serves as Director of the Division of Engineering Science (2023-2028). Previously, she was the Percy Edward Hart Professor (2016-2019). She received her B.S. in Computer Engineering from Purdue University (2002), and M.S./Ph.D. in Electrical Engineering from University of Wisconsin-Madison (2004/2008). Her research focuses on: Multi/many-core architectures and on-chip networks Cache coherence protocols and memory hierarchy optimization Approximate computing and sustainable systems Intermittent computing for energy-harvesting devices Hardware acceleration for machine learning Her publications demonstrate strong emphasis on networks-on-chip (NoC) innovations, including routing algorithms, deadlock handling, power-efficient designs, and topology optimizations. Recent work expands into approximate computing, mobile architectures, and ML-driven hardware design. Major Awards: Fellow of Engineering Institute of Canada (2023) McLean Senior Fellow (2019) IEEE Micro Top Picks (2016) ACM/IEEE Microarchitecture Hall of Fame (2015) Sloan Research Fellowship (2015) Canada Research Chair (current) Distinguished Scientist, ACM Fellow, IEEE She leads the NEJ research group and collaborates with industry partners including Intel, AMD, Qualcomm, and IBM. Her work is funded by NSERC, CFI, and industrial grants. She co-chaired ASPLOS 2023 and HPCA 2014, and actively promotes diversity through WICARCH and ACM initiatives.

Chunyan LaiView profile

Associate Professor

• Electric drives
• Motor control
• Power electronics
• +2 more

Dr. Chunyan Lai is an Associate Professor at the Department of Electrical and Computer Engineering, Concordia University. Her research focuses on electric drives, motor control, power electronics, electrified vehicles, and vehicle-to-grid solutions. She contributes to both graduate and undergraduate education through courses such as Controlled Electric Drives and Hybrid Electric Vehicle Power Systems . Research Emphasis : Electric motor drives and control systems, electrified transportation, power electronics innovations, and energy management strategies. Publications : Specializes in sensorless control techniques for Permanent Magnet Synchronous Motors (PMSM), thermal management in electric machines, and advanced energy trading frameworks for smart grids. PhD Opportunities : The Power Electronics and Energy Research (PEER) Group under Dr. Lai offers positions for developing efficient motor drives for EVs and grid-connected power converters. Collaboration : Industry-adjacent research with requirements for professional communication, patent development, and technical dissemination.

Alessandro OttavianoView profile

Researcher

• Computer Architecture
• Embedded Systems
• Real-Time Systems
• +3 more

Dr. Alessandro Ottaviano is a Researcher affiliated with the Department of Digital Integrated Circuits and Systems at ETH Zürich. His work focuses on advanced computer architecture and embedded systems, particularly in the domains of RISC-V processors, real-time systems, and heterogeneous computing. He contributes to the design of time-predictable virtual memory solutions, mixed-criticality systems, and energy-efficient hardware-software interfaces. Key research areas include modular processor architectures, hardware monitoring for safety-critical applications, and power management in high-performance computing (HPC) systems. His recent projects involve developing controllers for 2.5D systems-in-package and creating open-source networking solutions for mixed-criticality environments. Ottaviano’s work often emphasizes open-source hardware design and scalable system-level approaches to address challenges in autonomous systems and edge computing. He collaborates on advancements in interrupt handling for virtualized systems, peripheral event linking for IoT devices, and FPGA-based thermal emulation for many-core processors. His research bridges theoretical computer architecture principles with practical implementations in embedded and real-time systems.

Luca CarloniView profile

Professor

• Computer Science
• Embedded Systems
• Hardware Design
• +6 more

Luca Carloni is a Professor of Computer Science and Department Chair at Columbia University's Columbia Engineering. He leads the System-Level Design Group, focusing on heterogeneous system-on-chip (SoC) architectures, networks-on-chip (NoC), and embedded systems. Carloni holds a Laurea Summa Cum Laude in Electronics Engineering from the University of Bologna and a PhD in Electrical Engineering and Computer Sciences from UC Berkeley. His work emphasizes specialized hardware design, energy-efficient computing, and FPGA-based prototyping. Research interests include system-level design methodologies for SoCs, embedded accelerators, and quantum computing hardware. He has pioneered frameworks like Embedded Scalable Platforms (ESP) and tools like MosaicSim for rapid SoC prototyping. Carloni has received numerous awards, including the NSF CAREER Award (2006), IEEE Fellow (2017), and multiple best paper awards at DATE and CloudCom conferences. He has served on editorial boards of IEEE Transactions on CAD and ACM Transactions on Embedded Computing , and chaired key conferences like EMSOFT and ESWeek. His research addresses challenges in heterogeneous architectures, power management, and the intersection of machine learning with embedded systems. Current projects explore quantum control systems, brain-computer interfaces, and energy-efficient datacenter computing.

Tom ConteView profile

Professor

• Computer Architecture
• Compiler Optimization
• Manycore Architectures
• +4 more

Tom Conte is an academic leader with a joint appointment in the School of Electrical & Computer Engineering and School of Computer Science at Georgia Institute of Technology. As the founding director of the Center for Research into Novel Computing Hierarchies (CRNCH), he specializes in computer architecture and compiler optimization. His work focuses on manycore architectures, energy-efficient microprocessor design, and embedded system architectures. Prior to Georgia Tech, he directed the Center for Embedded Systems Research at North Carolina State University. He holds IEEE Fellow status and served as 2015 President of the IEEE Computer Society, co-leading the IEEE Rebooting Computing Initiative since 2011. Dr. Conte earned his bachelor’s degree in Electrical Engineering from the University of Delaware (1986), followed by M.S. and Ph.D. degrees in Electrical Engineering from the University of Illinois at Urbana-Champaign (1988 and 1992). His research has been recognized with prestigious awards including the IEEE Computer Society’s Golden Core Member award and the National Science Foundation’s CAREER Award (1996). His research interests span quantum computing, 3D chip architectures, energy-efficient processing, and post-Moore computing innovations. He has pioneered initiatives like the Superstrider architecture and CREEPY energy-efficient processing frameworks. Recent work includes advancements in quantum programming languages (e.g., Qwerty) and hybrid quantum-classical systems. Awards: IEEE Fellow, Young Alumni Achievement Award, CAREER Award Leadership: IEEE Computer Society President (2015), CRNCH Director Key Projects: Rebooting Computing Initiative, Superstrider Architecture His lab’s contributions include novel compiler optimizations for manycore systems, smart NIC offloading techniques, and thermodynamically inspired computing models. Conte’s work bridges academic research with industry needs through interdisciplinary collaborations and standardization efforts.

• Neuromorphic Computing
• Memristor-Based Architectures
• Energy-Efficient AI Hardware
• +7 more

Said Hamdioui serves as a full Professor in the Department of Computer Engineering within the Faculty of Electrical Engineering, Mathematics and Computer Science at Delft University of Technology. His research focuses on cutting-edge hardware architectures for neuromorphic computing and energy-efficient AI acceleration, with particular emphasis on memristor-based systems, emerging memory technologies, and fault-tolerant designs for edge applications. His research interests span Neuromorphic Computing , Memristor-Based Architectures , and Energy-Efficient AI Hardware , addressing critical challenges in hardware security, computation-in-memory, and reliable edge AI deployment. Recent work demonstrates significant advancements in RRAM/FeFET testing methodologies, spiking neural network implementations, and spin wave computing alternatives to traditional CMOS. His publications reveal strong trends toward real-world deployment of brain-inspired hardware with practical constraints like power efficiency, testability, and security. Award highlights include: DATE'20 Best Paper Award DFT'21 Outstanding Student Paper ETS 2021 Best Paper Award LATS 2018 & 2022 Best Paper Awards Professor Hamdioui actively contributes to the research community through editorial roles at IEEE Transactions on VLSI Systems , IEEE Design & Test , and Journal of Electronic Testing from 2017-2018. His leadership in multi-partner projects like CONVOLVE and NEUROKIT2E demonstrates strong industry-academia collaboration for edge AI solutions. Current work shows increasing focus on practical deployment challenges including in-field fault monitoring, security vulnerabilities in neuromorphic systems, and realistic brain simulation frameworks.

David WentzlaffView profile

Professor

• Computer Architecture
• Green Computing
• Cloud Computing
• +6 more

David Wentzlaff is a Professor of Electrical and Computer Engineering at Princeton University, with associated faculty roles in Computer Science and the High Meadows Environmental Institute (HMEI). He leads research in computing architecture, green computing, and sustainable system design. As Director of Undergraduate Studies, he shapes educational programs in his field. Education: Ph.D., Electrical Engineering, MIT (2012) M.S., Electrical Engineering and Computer Science, MIT (2002) B.S., Electrical Engineering, University of Illinois at Urbana-Champaign (2000) Research Focus: Future Computing Systems: Designing manycore architectures, cloud computing infrastructure, and chiplet-based systems for exascale computing. Sustainability: Developing energy-efficient hardware, recyclable computing systems, and eco-friendly decommissioning strategies. Hardware-Software Co-Design: Exploring FPGA integration, in-memory computing, and parallel processing frameworks. Advising & Grants: Advises 8 current graduate students, focusing on topics like chiplet design, neural acceleration, and sustainable computing. Recipient of NSF grants for projects like OpenPiton (open-source manycore research platform) and CAREER awards for energy-efficient architectures. Labs & Collaborations: Leads the Wentzlaff Research Group at Princeton. Develops open-source frameworks like PRGA (FPGA prototyping) and OpenPiton (manycore processor).

Khurram K. AfridiView profile

Professor

• Wireless Power Transfer
• Power Electronics
• Electric Vehicle Charging Systems
• +5 more

Khurram K. Afridi is a Professor in the Electrical and Computer Engineering Department at Cornell University's College of Engineering. With a BS from Caltech and SM/PhD from MIT, he leads the High-Frequency Power Electronics and Control (HFPEC) research group. His work focuses on high-frequency power electronics, wireless power transfer systems, and electric vehicle charging infrastructure. Dr. Afridi's research spans capacitive wireless power transfer systems for electric vehicles, high-frequency power converters , impedance control networks , and power density optimization . His team has developed innovative approaches for multi-MHz wireless power transfer, reduced-fringing-field systems, and high-efficiency power conversion architectures. Recent work emphasizes practical implementation challenges including thermal management, pavement-embedded systems, and dynamic charging applications. His publications reveal a strong focus on high-power-density systems , wireless charging technologies , and advanced power conversion techniques . The research spans both theoretical modeling and practical implementation, with numerous papers in top conferences like APEC, ECCE, and IEEE journals. Key themes include improving power transfer efficiency at multi-MHz frequencies, developing novel matching network designs, and creating practical systems for electric vehicle charging infrastructure. First Place Prize Paper Award, IEEE Journal of Emerging and Selected Topics in Power Electronics, 2023 First Place Best Contribution Award, IEEE WPTCE, 2023 Second Place Prize Paper Award, IEEE Transactions on Power Electronics, 2022 Distinguished Lecturer, IEEE Vehicular Technology Society, 2022 Cornell Engineering Research Excellence Award, 2021 NSF CAREER Award, 2016 Dr. Afridi has successfully advised numerous graduate students who have received multiple Outstanding Presentation Awards at major conferences. His research has been supported by significant funding including the NSF CAREER Award. The HFPEC group maintains strong industry connections and focuses on translating theoretical advances into practical power electronics solutions with real-world impact. Current research directions include electrified roadways, dynamic wireless charging systems, and high-power-density power conversion architectures for next-generation applications.

• Embedded Systems
• Hardware-Software Co-Design
• Invasive Computing
• +7 more

Prof. Dr.-Ing. Jürgen Teich is a full Professor and Chair for Hardware-Software Co-Design at the Department of Computer Science, Friedrich Alexander University Erlangen-Nuremberg (FAU). He serves as Head of Department Computer Science and Vice Dean of the Technical Faculty since August 2024, and has been Speaker of the FAU Research Center Embedded System Initiative (FAU ESI) since 2023. His educational background includes: Diploma degree in Electrical Engineering, University of Kaiserslautern (1989) Dr.-Ing. degree in Electrical Engineering, University of Saarland (1993) Habilitation (PD Dr.-Ing.) entitled "Synthesis and Optimization of Digital Hardware/Software Systems" (1996) Prof. Teich's research focuses on Embedded Systems , Invasive Computing , Hardware-Software Co-Design , and Reconfigurable Computing . His work spans from theoretical foundations to practical implementations, with particular emphasis on resource-constrained systems, many-core architectures, and energy-efficient computing. He has pioneered research in invasive computing paradigms that enable more efficient use of many-core processors by allowing applications to dynamically claim resources. His recent publications reveal a strong trend toward energy-efficient AI deployment on embedded devices , security of embedded systems , and novel memory technologies . There's a clear focus on practical implementations of machine learning on microcontrollers (TinyML), hardware acceleration for data processing, and innovative approaches to power management in self-powered systems. Among his notable scientific awards are: IEEE Fellow (since 2018) Member of Academia Europaea, Section Informatics (since 2011) Member of the National Academy of Science and Engineering (acatech) (since 2018) Member of the German Society of Humboldtians (since 2021) Prof. Teich has been Principal Investigator for numerous DFG-funded projects including SFB/Transregio 89 "Invasive Computing" (2010-2022), SFB 694, and multiple priority programs. He has coordinated large collaborative research efforts across Germany and internationally, with significant funding from DFG and other sources. His research group has produced influential work in embedded systems design and co-design methodologies. He leads the Hardware-Software Co-Design research group at FAU, which focuses on innovative approaches to embedded system design, invasive computing architectures, and efficient implementation of machine learning on resource-constrained devices. The group maintains strong collaborations with industry partners including Intel, Xilinx, and automotive companies.

Manolis G.H. KatevenisView profile

Professor

• Computer Architecture
• VLSI Systems
• Interconnection Network Architecture
• +4 more

Manolis G.H. Katevenis is a Professor at the Department of Computer Science, University of Crete, and Deputy Director and Head of the Computer Architecture and VLSI Systems (CARV) Laboratory at the Institute of Computer Science (ICS), Foundation for Research & Technology - Hellas (FORTH). He co-founded the European Research Center on Computer Architecture (EuReCCA) and is a founding partner of the European Network of Excellence on High-Performance and Embedded Architecture and Compilation (HiPEAC). PhD in Computer Science from University of California, Berkeley (1983) Co-founder of EuReCCA (2011) Contributed to RISC architecture (1980-1983), interconnection networks (1985-2011), and parallel computing (1993-2010) His research spans Scalable Multicore Systems , Interconnection Network Architecture , Packet Switch Design , Computer Architecture , and VLSI Systems . He has made foundational contributions to per-flow queueing, backpressure mechanisms, and wormhole IP over ATM, with applications in internet routers, data centers, and supercomputers. His publications focus on high-radix crossbar switches, flow control algorithms, and explicit interprocessor communication. Notable scientific awards include: ACM Doctoral Dissertation Award (1984) David J. Sakrison Memorial Prize (1983) IBM PhD Fellowship (1981-1983) Greek State Fellowship (1973-1978) He has supervised 40 graduate theses and participated in 22 R&D projects totaling €9M, including HiPEAC (coordinator of interconnection networks), SARC (FPGA prototype design), and ENCORE (cache-optimized remote DMA). His work has received over 2000 citations, with an h-index of 23.

Bashir M. Al-HashimiView profile

Professor

• Energy-efficient mobile computing systems
• Low-power test and test-data compression of digital integrated circuits
• Energy-harvesting computing
• +1 more

Professor Sir Bashir M. Al-Hashimi is currently Vice President (Research & Innovation) at King’s College London and holds the ARM Professorship in Computer Engineering there. He is also a Visiting Professor in Electronics and Computer Science at the University of Southampton. Prior to academia, he worked in the electronics design industry for eight years before joining the University of Southampton in 1999, where he became a personal Chair holder in 2004. His research focuses on energy-efficient computing systems, low-power testing, and energy-harvesting technologies, with a strong emphasis on smart city applications and wearable computing. He has led numerous interdisciplinary projects funded by the EPSRC and industry, including the PRiME Programme Grant and the EPSRC-funded Spatial Computational Learning consortium. He has supervised 45 PhD students and authored/co-authored nearly 400 technical papers, earning eight best paper awards and contributing to five books. His honors include a CBE (2018), knighthood (2025), Fellowship of the Royal Society (2023), and roles on the Research Excellence Framework panels. He founded the Arm-ECS industry-academia center in 2008, promoting energy-efficient computing research.

Anuj PathaniaView profile

Assistant Professor

• Low Power Design
• Sustainable Systems
• Electronic Design Automation
• +4 more

Anuj Pathania serves as an Assistant Professor in the Parallel Computing Systems (PCS) group within the Informatics Institute at the University of Amsterdam's Faculty of Science. His research pioneers sustainable computing systems operating under severe power, thermal, and reliability constraints, with significant contributions to energy-efficient hardware design and embedded systems. Education: PhD in Computer Science (2018), Karlsruhe Institute of Technology MSc in Computer Science (2012), National University of Singapore B.Tech in Computer Science (2009), Maharaja Agrasen Institute of Technology Pathania's research centers on low-power design and sustainable systems for constrained environments, with particular expertise in thermal management of 3D-stacked architectures and energy-efficient machine learning inference . His work bridges electronic design automation with real-world reliability challenges, developing novel power budgeting techniques like T-TSP that incorporate transient temperature effects ignored by conventional methods. Current projects include EU-funded initiatives on energy labeling for digital services, addressing ecological impacts through technological, behavioral, and legal frameworks. His publication trajectory reveals a strategic evolution toward zero-waste computing , with recent work (2023-2025) focusing on hardware-software co-design for edge AI, energy modeling across computing continua, and parameter-efficient neural adaptation. Key themes include thermal-aware scheduling for S-NUCA many-cores, cooperative processor utilization in heterogeneous systems, and sustainability metrics for digital services. Scientific Recognition: Best Paper Award Nomination at IEEE Computer Society Annual Symposium on VLSI 2023 for 3D-TTP power budgeting technique Pathania actively mentors 4 PhD students (Ehsan Aghapour, Saeedeh Baneshi, Sudam Wasala, Yixian Shen) and has successfully supervised 5 Master's theses (including Cum Laude defenses by Joris op ten Berg and Jurre Wolff). His research is supported by major grants including Energy Labels for Ecologically Sustainable Digital Services (2023-2024) and Towards Zero-Waste Computing (2021-2025), developing simulation frameworks like HotSniper and CoMeT for thermal analysis. The PCS group maintains strong industry collaborations with ARM and NVIDIA, particularly through tools like ARM-CO-UP for heterogeneous processor utilization.

Joshua San MiguelView profile

Associate Professor

• Approximate computing
• Processor microarchitecture
• Intermittent computing
• +4 more

Associate Professor Joshua San Miguel leads research in computer architecture and systems at the University of Wisconsin-Madison, with an affiliate role in Computer Sciences. His work focuses on energy-efficient computing for IoT devices, microarchitecture innovations, and networks-on-chip. He holds a PhD (2017) and BASc (2012) from the University of Toronto. Education: PhD in Electrical & Computer Engineering, University of Toronto (2017) BASc in Engineering Science (ECE), University of Toronto (2012) Research Interests: Approximate computing for energy harvesting systems Branch prediction and value prediction in processors Cache architectures and networks-on-chip for many-core processors Intermittent computing resilience His recent work emphasizes value-level parallelism (Carat/uSystolic), RTL simulation acceleration (TaroRTL), and personalized neural network inference (CAP’NN). His research has been recognized with the NSF CAREER Award (2021) and multiple IEEE Micro Top Picks. Grants & Advising: Active in supervising advanced independent studies and master’s/dissertation research. Extensive grant funding includes the NSF CAREER Award and the Grainger Faculty Scholarship. Labs & Teams: Leads research groups focused on approximate computing and energy-efficient architectures within the Electrical & Computer Engineering department.

• Computer Science
• Electrical Engineering
• Machine Learning
• +4 more

Marian Verhelst is a Professor at KU Leuven's Faculty of Engineering Science, renowned for her research in hardware-efficient computing and dedication to STEM education. Her work spans hardware acceleration for machine learning, edge AI, and in-memory computing, with a focus on energy optimization and algorithm-hardware co-design. Her research interests include: Designing flexible hardware for ultra-low-power edge AI systems Optimizing sparsity-aware architectures for deep learning workloads Advancing chiplet-based and 3D memory technologies Co-designing algorithms and hardware for probabilistic AI Pioneering STEM outreach through KU Leuven InnovationLab Recent publications (2023–2025) demonstrate strong trends in: Hardware-software co-optimization for edge ML systems Efficient data movement in heterogeneous accelerators Low-precision and sparse computation techniques RISC-V based customizable SoCs Sustainable AI accelerator design Awards & Honors: Young Academy of Europe Award (2021) for science communication and STEM advocacy She leads significant educational initiatives, including the KU Leuven InnovationLab which has engaged 150 schools and 13,000 students since 2014. The program develops hands-on STEM projects (e.g., AI-powered wheelchairs, sustainable energy systems) and provides teacher training to inspire youth in engineering.