Manolis G.H. Katevenis

Manolis G.H. Katevenis is a Professor at the Department of Computer Science, University of Crete, and Deputy Director and Head of the Computer Architecture and VLSI Systems (CARV) Laboratory at the Institute of Computer Science (ICS), Foundation for Research & Technology - Hellas (FORTH). He co-founded the European Research Center on Computer Architecture (EuReCCA) and is a founding partner of the European Network of Excellence on High-Performance and Embedded Architecture and Compilation (HiPEAC).

• PhD in Computer Science from University of California, Berkeley (1983)
• Co-founder of EuReCCA (2011)
• Contributed to RISC architecture (1980-1983), interconnection networks (1985-2011), and parallel computing (1993-2010)

His research spans Scalable Multicore Systems, Interconnection Network Architecture, Packet Switch Design, Computer Architecture, and VLSI Systems. He has made foundational contributions to per-flow queueing, backpressure mechanisms, and wormhole IP over ATM, with applications in internet routers, data centers, and supercomputers.

His publications focus on high-radix crossbar switches, flow control algorithms, and explicit interprocessor communication. Notable scientific awards include:

• ACM Doctoral Dissertation Award (1984)
• David J. Sakrison Memorial Prize (1983)
• IBM PhD Fellowship (1981-1983)
• Greek State Fellowship (1973-1978)

He has supervised 40 graduate theses and participated in 22 R&D projects totaling €9M, including HiPEAC (coordinator of interconnection networks), SARC (FPGA prototype design), and ENCORE (cache-optimized remote DMA). His work has received over 2000 citations, with an h-index of 23.