José F. Martínez holds the Lee Teng-hui Professorship of Engineering at Cornell University's College of Engineering, where he leads research in computer architecture and systems. His roles include Vice Chair of ACM SIGARCH, IEEE Fellow, and past leadership roles in ISCA, MICRO, and IEEE Computer Society journals. He has received prestigious awards such as the NSF CAREER Award, IBM/Qualcomm Faculty Awards, and multiple teaching accolades including Tau Beta Pi Professor of the Year (2011). Education: Licenciado en Informática de Sistemas (1996), Universidad Politécnica de Valencia M.S. (1999) and Ph.D. (2002) in Computer Science, University of Illinois at Urbana-Champaign His research focuses on computer architecture , including microprocessors, multiprocessors, memory subsystems, embedded systems, and processing-in-memory (PIM) innovations. He co-leads the DARPA/SRC ACE Center for Evolvable Computing and NSF's CROPPS Center, and previously co-founded Cornell's Institute for Digital Agriculture (CIDA). His work bridges hardware-software co-design and sustainable computing. Key Contributions: Advancing energy-efficient multiprocessor architectures Developing PIM frameworks like PUMICE and Membrane Market-based resource allocation systems (e.g., XChange, ReBudget) His advising spans over 15 graduate students and has guided Merrill Presidential Scholars. Current research explores evolvable computing paradigms and AI hardware acceleration, reflecting his dual focus on foundational architecture and applied systems innovation.
Prof. Dr. Sebastian Steinhorst is an Associate Professor (W3-level with tenure) at the Technical University of Munich (TUM) within the Embedded Systems and Internet of Things group at the TUM School of Computation, Information and Technology . His research focuses on advancing the security, predictability, reliability, and interoperability of smart connected and autonomous systems, particularly for applications in Internet of Things (IoT) , Industry 4.0 , and automotive systems . PhD in Computer Science (2011) from Goethe University Frankfurt Postdoctoral roles at TUMCREATE Singapore (2011-2016) and Aarhus University (2016) Joined TUM in 2016 as Rudolf Moessbauer Tenure Track Professor His research areas include decentralized embedded systems, hardware/software co-design, modeling and verification of cyber-physical systems, security protocols for automotive networks, and time-sensitive networking (TSN) for industrial applications. Recent work explores blockchain-based data sovereignty, zero-knowledge proofs for vehicle authentication, and resilient architectures for autonomous systems. Key scientific contributions include the 2019 ACM TODAES Best Paper Award and pioneering work on CyberSecDome , LeapChain , and Simutack frameworks. He serves on editorial boards and conference committees, including co-organizing the Autonomous Systems Design initiative at DATE. His teaching portfolio spans lectures on System Design for IoT , Software Architecture for Distributed Systems , and IoT Security across multiple semesters. He also leads advanced seminars on embedded systems and IoT.
Marina Blanton is an Associate Professor in the Department of Computer Science and Engineering at the University at Buffalo, and Faculty Director of Women in Science and Engineering within the School of Engineering and Applied Sciences. She holds a PhD in Computer Science from Purdue University (2007), along with multiple advanced degrees in Computer Science and Electrical Engineering from prestigious institutions in the US and Russia. Her research focuses on applied cryptography, information security, and privacy-preserving computation and outsourcing. She has pioneered work on secure multi-party computation protocols, privacy-preserving biometric authentication, and secure data analytics across distributed systems. Her contributions include foundational frameworks like PICCO, a compiler for private distributed computation, and advancements in protocols for genomic data analysis and floating-point secure computation. Blanton has been recognized with numerous awards, including IEEE and ACM Senior Membership (2016/2015), the ACM CCS Test of Time Award (2015), and the AFOSR Young Investigator Award (2013). Her research has been supported by grants such as NSF SaTC awards and AFOSR funding. Her work emphasizes practical implementations of secure computation, with applications in healthcare, biometrics, and distributed data systems. She has advised numerous students and contributed to educational initiatives promoting women in STEM through her leadership roles.
Shantanu Dutt is a full Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago , located in Chicago, IL. His office is in 930 SEO at 851 S. Morgan St, and he can be reached at dutt@uic.edu . Education Ph.D. in Computer Science and Engineering, University of Michigan, Ann Arbor (1990) M.Tech. in Computer Engineering, Indian Institute of Technology Kharagpur (1984) B.E. in Electronics and Communication Engineering, Maharaja Sayajirao University of Baroda (1983) Research Interests Professor Dutt’s research agenda centers on VLSI Computer-Aided Design (CAD) , with particular emphasis on physical design and incremental synthesis targeting both ASICs and FPGAs. He explores discrete optimization techniques to solve placement, routing, and partitioning problems. Another major thrust is FPGA built-in self-test (BIST) and trusted design , ensuring provable diagnosability and security against hardware Trojans. He also investigates fault-tolerant computing at both chip and system levels, and develops parallel and distributed computing algorithms for scalable performance. Scientific Awards 1996 Best Paper Award , ACM/IEEE Design Automation Conference, for “A probability-based approach to VLSI circuit partitioning” 1995 Most Influential Paper Award , Fault-Tolerant Computing Symposium, for “Design and reconfiguration strategies for near-optimal k-fault-tolerant tree architectures” Research Impact and Funding Professor Dutt has published extensively in top-tier journals (IEEE TVLSI, ACM TRETS, IEEE TCAD) and premier conferences (ICCAD, DAC, DATE, FTCS). His work has shaped incremental placement, timing-driven routing, FPGA security, and fault-tolerant multiprocessor architectures. While specific grant numbers are not listed, the breadth and longevity of his publication record indicate sustained funding from NSF, industry, and other agencies. Laboratory and Collaborations Although no formal laboratory name is provided, Professor Dutt’s research is conducted within the ECE department’s VLSI CAD and Fault-Tolerance groups, collaborating with graduate students and colleagues across the US and internationally.
Helen Xu is an Assistant Professor at Georgia Tech's School of Computational Science and Engineering (College of Computing). She holds a Ph.D. from MIT (2022) under Charles E. Leiserson and was a Grace Hopper Postdoctoral Fellow at Lawrence Berkeley National Lab (2022). Her research focuses on parallel algorithms, cache-efficient data structures, and high-performance computing. Xu has interned at Microsoft Research, NVIDIA Research, and Sandia National Laboratories, and her work has been supported by prestigious fellowships including the National Physical Sciences Consortium and Chateaubriand awards. **Education**: Ph.D., Computer Science, MIT, 2022 Postdoctoral Research, Lawrence Berkeley National Lab (2022) **Research Interests**: Parallel and cache-friendly algorithms Dynamic graph and data structure optimization Algorithm performance engineering Sparse matrix/tensor operations **Awards**: Grace Hopper Postdoctoral Scholar (2022), Best Artifact Award (PPoPP 2024), National Physical Sciences Consortium Fellowship, Chateaubriand Fellowship. **Advising & Teaching**: Advises PhD/M.S. students in parallel computing and high-performance systems. Teaches courses like CSE 6220 (Introduction to HPC) and CSE 6230 (HPC Tools). Supervised MIT M.Eng. projects on BP-Trees and parallel prefix sums. **Labs/Teams**: Active in Georgia Tech's High-Performance Computing community, collaborating with researchers like Aydın Buluç and Prashant Pandey on graph containers and dynamic data structures.
Alastair F. Donaldson is a Professor and Director of Research in the Department of Computing at Imperial College London, where he leads the FastPL research group. His work bridges formal methods, software testing, and programming languages, with a focus on enhancing the reliability of high-performance and parallel software systems. He has held key roles including Director of Research (since 2023) and previously served as Lecturer (2011–2014), Senior Lecturer (2014–2017), and Reader (2017–2020) before being promoted to Professor in 2020. His research interests include formal verification, compiler testing, GPU programming, concurrency, and fuzzing. He has made significant contributions to the verification of GPU kernels, metamorphic testing of graphics drivers, and the development of tools like GPUVerify and GraphicsFuzz. His work combines theoretical rigor with practical impact, demonstrated by the acquisition of his startup GraphicsFuzz by Google in 2018 and his subsequent roles as Senior Software Engineer and Visiting Researcher at Google. His recent publications reflect a sustained focus on compiler and system reliability, with trends in fuzzing, formal specification, and automated testing of complex systems such as WebGPU, CXL cache coherence, and large language models for code generation. His work increasingly integrates empirical validation with formal techniques to uncover subtle bugs in real-world systems. Scientific awards and recognitions include: 2017 BCS Roger Needham Award EPSRC Early Career Fellowship Fellow of the British Computer Society Best Paper awards at EuroSys 2024, MET 2021, IISWC 2019, IWOCL 2019, and ICST 2016 Best Industry Paper at ICST 2024 ACM SIGSOFT Distinguished Paper at ISSTA 2023 ACM SIGPLAN Most Influential OOPSLA Paper Award (2012 paper), awarded in 2022 Best Student Paper at PPoPP 2014 He has advised numerous PhD students and leads a vibrant research group. He has secured significant research funding and collaborates extensively with industry and academia. His service includes leadership roles such as General Chair of PLDI 2020, PC Chair of ECOOP 2019, and Steering Committee Chair of PLDI (2022–2025). He also serves on the advisory board of PACM-PL and on program committees for top venues including POPL, OOPSLA, PLDI, ICSE, and ISSTA. He leads the FastPL research group, which focuses on the design and implementation of programming tools and techniques for reliable software. The group conducts cutting-edge research in compiler testing, formal methods, and high-performance systems, fostering collaboration across academia and industry.
Chester Rebeiro is an Associate Professor at the Department of Computer Science and Engineering within the Indian Institute of Technology Madras . His work spans hardware and software security with a focus on cryptographic implementations and microarchitectural vulnerabilities. Research interests include hardware security, applied cryptography, side channel analysis, and operating system security. He develops frameworks for automatic vulnerability detection and mitigation in cryptographic systems. Editorial Board: Associate Editor at Journal of Hardware and Systems Security (Springer, 2021-2024) Conference Leadership: General Co-Chair for SPACE 2024, Program Co-Chair for ATS 2024, and Program Co-Chair for INDOCRYPT 2023 Professional Activities: Organizer of e-CTF Embedded Capture The Flag and contributor to cybersecurity workshops across India and abroad Scientific contributions highlight two major awards: a Distinguished Paper Award at USENIX Security 2024 and a Best Paper Award at IEEE HOST 2020. His research focuses on practical security solutions for processors and cryptographic systems. Advising includes mentoring 11 PhD students and 7 MS by Research candidates, with notable co-guided projects in fault attack detection and side-channel mitigation. He actively contributes to educational initiatives through courses on Secure Processor Microarchitecture and Operating Systems.
Bruno Tiago da Silva Gomes is a Researcher in the Department of Electronics and Informatics at Vrije Universiteit Brussel (VUB), Belgium. His work focuses on FPGA-based hardware acceleration, biomedical signal processing, and embedded systems. He leads several high-impact projects, including ENACT (environmental health interventions) and Tech4Health (future health technologies). His research spans FPGA design, machine learning acceleration, and real-time signal processing. Education: PhD in Electronics and Informatics (2019, VUB), supervised by Professors Touhafi and Braeken. His thesis addressed streaming application acceleration on FPGAs. Research interests include Field-Programmable Gate Arrays (FPGA), biomedical sensors (e.g., photoplethysmography), beamforming, and high-level synthesis. He has co-authored over 60 publications and holds an h-index of 439. Key projects include OZR4103 (power-efficient AI for biomedical applications) and NSIS3 (decarbonisation technologies). His work integrates hardware-software co-design for edge computing and secure TinyML systems. Advising includes a Master’s thesis on PPG signal analysis. He contributes to datasets like the AMIVU Acoustic Map Imaging Dataset.
Nikhil Srivastava is an Associate Professor of Mathematics at the University of California, Berkeley, and a Senior Scientist at the Simons Institute. He received his PhD in Computer Science from Yale University in 2010 under the supervision of Daniel Spielman, following his undergraduate studies at Union College. After postdoctoral positions at the Institute for Advanced Study (Princeton), MSRI, and a research position at Microsoft Research India, he joined UC Berkeley in 2015. His research spans theoretical computer science and mathematics, with particular focus on spectral graph theory, random matrices, the geometry of polynomials, asymptotic convex geometry, and numerical analysis . His work often bridges the gap between pure mathematics and theoretical computer science, developing deep connections between polynomial methods, linear algebra, and combinatorial structures. Srivastava's research has been recognized with several prestigious awards including the SIAM Polya Prize , the NAS Held Prize , and the AMS Foias Prize , highlighting his significant contributions to the field. His most recent work focuses on numerical linear algebra, spectral theory, and computational mathematics, with publications spanning from algorithmic foundations to applications in mathematical physics. He actively mentors graduate students, currently advising Rikhav Shah, Zack Stier, and Isabel Detherage. His past students include Jorge Garza Vargas (co-advised with Dan Voiculescu), Theo McKenzie, Jess Banks, Satyaki Mukherjee, Archit Kulkarni, Nick Ryder, and Aaron Schild (co-advised with Satish Rao). His research has been supported by the NSF and the Sloan Foundation. At Berkeley, Srivastava has been actively involved with the Simons Institute, participating in numerous programs including Complexity and Linear Algebra (Fall 2025), Sublinear Algorithms (Summer 2024), and several others dating back to 2013. He regularly teaches courses in mathematics, including Discrete Mathematics (Math 55) and Multivariable Calculus (Math 53), and runs a seminar on Discrete Analysis in Evans Hall.
Pavel Panchekha is an Assistant Professor in the School of Computing at the University of Utah, where he holds the Warnock Chair for Junior Faculty. His research spans programming languages, web browsers, and numerical analysis, with a focus on developing programming language techniques to address challenges across computer science. Dr. Panchekha received his educational training at prestigious institutions: PhD in Computer Science from the Paul G. Allen School for Computer Science and Engineering at the University of Washington, advised by Michael D. Ernst and Zachary Tatlock BS in Mathematics from MIT Panchekha's research program has two major thrusts. First, he works on web browser internals , with projects including fuzzing layout invalidation, multi-tenant garbage collection, and optimizing 2D graphics. He is also authoring a textbook on web browsers that informs much of this research. Second, he focuses on automatic numerical analysis , with projects such as automatic accuracy improvement, synthesis via term rewriting, scalable static accuracy analysis, and math library implementation. He leads the FPBench and Herbie projects, which are major deployments of his research. His scholarly output demonstrates consistent contributions across programming languages, verification, and numerical methods. Recent work shows a growing emphasis on bidirectional typing systems, layout invalidation in browsers, and robust floating-point error analysis. His publications reveal a trajectory from foundational work on floating-point accuracy (notably the Herbie tool that won a Distinguished Paper Award at PLDI 2015) toward more comprehensive systems for program synthesis, verification, and browser optimization. Panchekha has received significant recognition for his research contributions: NSF Fellowship ARCS Foundation Fellowship Adobe Research Fellowship Wissner-Slivka Foundation Fellowship 2015 PLDI Distinguished Paper Award for work on the Herbie numerical analysis and repair tool As an advisor, Panchekha mentors a substantial group of students across multiple levels. He currently advises six students: Marisa Kirisame (PhD), Bhargav Kulkarni (PhD), Yumeng He (PhD), Artem Yadrov (MS), Jesus Ponce (BS), and Jonas Regehr (BS). Previously, he has advised over twenty students including PhD candidates like Ian Briggs and numerous MS and BS students. His advising spans theoretical topics in programming languages and practical applications in web browsers and numerical computing. Panchekha leads research groups focused on programming languages applications to web browsers and numerical analysis. His work on the Herbie tool for floating-point accuracy improvement has become influential in the programming languages community, and his more recent work on browser internals is shaping how researchers understand and optimize modern web rendering engines. He is currently developing a textbook on web browsers that aims to synthesize knowledge about browser architecture and implementation.
Yingfei Xiong is an active Associate Professor at Peking University, China, specializing in software engineering and programming languages. With a consistent research trajectory from 2013 through 2026, Xiong has established themselves as a prominent figure in the software engineering research community, regularly contributing to top-tier conferences including SPLASH, ICSE, ASE, and PLDI. Dr. Xiong's research primarily focuses on program synthesis, automated program repair, and software analysis techniques. Their work bridges theoretical programming language concepts with practical software engineering applications, particularly in developing novel approaches for code generation, bug fixing, and program optimization. The research demonstrates strong interdisciplinary connections between traditional software engineering, programming languages theory, and emerging AI techniques. Analysis of Xiong's publication trends reveals a clear evolution in research focus, beginning with foundational work in API transformations and program adaptation around 2013-2016, shifting toward program repair techniques from 2017-2020, and most recently incorporating machine learning and neural approaches into program synthesis and repair (2021-2026). The work consistently addresses practical challenges in software development while maintaining theoretical rigor, with increasing integration of AI techniques in recent years. Dr. Xiong has served in various leadership roles across the software engineering conference ecosystem, including program committee membership and session chair positions at major conferences. Their extensive service demonstrates recognition by peers as a subject matter expert in software engineering and programming languages research. While specific grant information isn't detailed in the provided text, the sustained publication record suggests successful research funding.
Thomas Yeh is an Assistant Professor of Teaching in the Department of Computer Science at the University of California, Irvine. His academic background includes a Ph.D. in Computer Science from UCLA and a BS in Electrical Engineering and Computer Science from UC Berkeley. Prior to academia, he gained industry experience across research, architecture, design, verification, marketing, and management roles. His educational credentials: Ph.D. in Computer Science, UCLA BS in Electrical Engineering and Computer Science, UC Berkeley Dr. Yeh's research spans computer architecture, accelerated machine learning, and computer science education. In architecture, he pioneers error-tolerant physics simulation and heterogeneous computing. His ML work focuses on adaptive precision techniques for energy-efficient acceleration. In education, he develops interactive tools for novice programmers and experiential learning frameworks for computer architecture. His cross-disciplinary approach bridges hardware-software co-design with pedagogical innovation. Publication trends reveal consistent focus on computational efficiency across physics simulation, ML acceleration, and educational technology. His work connects real-time systems optimization with emerging AI applications, particularly in interactive environments and physics-based animation. No scientific awards are documented in the provided materials. While advising details and grant funding specifics are absent from available information, his industry-academia transition informs practical research directions. Teaching responsibilities include core courses like Introduction to CS, Data Structures, and Efficient ML Computing. Research infrastructure details remain unspecified, though his publications suggest collaborations in physics simulation and heterogeneous computing environments.
Dr. Christian Zeman serves as a Lecturer at the Department of Environmental Systems Science, ETH Zurich, based at the Institute for Atmospheric and Climate Science (CHN N 17.1) in Zurich, Switzerland. His research focuses on high-resolution atmospheric modeling with emphasis on kilometer-scale climate simulations and deep convection processes. Zeman's work centers on advancing regional climate modeling capabilities through rigorous model verification techniques and convection-resolving simulations. His research addresses critical challenges in simulating complex phenomena like island-induced vortex streets, tropical climate dynamics, and the impacts of reduced floating-point precision on model accuracy. Key methodologies include ensemble-based statistical verification and systematic model calibration for improved predictive reliability. Analysis of his 2020-2025 publications reveals a consistent trajectory toward higher-resolution climate modeling, with significant contributions to model intercomparison frameworks and computational efficiency optimization. His research bridges theoretical atmospheric science with practical applications in regional climate projection, particularly for island systems and tropical regions. Zeman operates within Prof. Christoph Schär's research group at ETH Zurich, contributing to cutting-edge developments in the Consortium for Small-scale Modeling (COSMO) and Integrated Forecasting System (IFS) frameworks. His work supports ETH Zurich's leadership in high-resolution climate simulation and verification methodologies.
Professor Ahmed Hemani is a faculty member at the Division of Electronics and Embedded Systems, KTH Royal Institute of Technology, affiliated with the Digital Futures Faculty. He holds the role of PI for the project 'New Chip Architectures for Industrial Vision' and leads research in reconfigurable computing, memristor-based systems, and hardware acceleration for AI and edge computing. His work bridges theoretical computer science with practical VLSI design and embedded systems development. He actively contributes to cross-disciplinary initiatives at Digital Futures, a joint center with Stockholm University and RISE Research Institutes of Sweden focused on digital innovation. His research emphasizes scalable FPGA/HPC architectures, low-power neuromorphic systems, and optimization techniques for custom silicon solutions. Current projects include a Lego-inspired edge AI framework and memristor-driven MIMO acceleration. Teaching responsibilities span advanced courses in SOC design, digital system verification, and embedded systems. He supervises advanced-level degree projects across computer engineering and ICT innovation specializations, emphasizing hands-on hardware-software co-design methodologies. Recent publications highlight innovations in memristor applications, FPGA-based acceleration, and reconfigurable architectures for neural networks and bioinformatics. His work addresses challenges in dark silicon utilization, energy-efficient computation, and high-performance embedded systems.
Zachary Tatlock is an Associate Professor at the Paul G. Allen School of Computer Science & Engineering at the University of Washington, where he leads the Programming Languages & Software Engineering Group (PLSE) and the SAMPL Group. His research spans programming languages, formal verification, compilers, and computational fabrication. He is also an Amazon Scholar with AWS's Automated Reasoning Group and previously advised OctoML. Tatlock's work bridges theoretical foundations with practical systems, focusing on making it easier to write tricky code while ensuring correctness through rigorous proofs and measurements. PhD in Computer Science & Engineering, University of California, San Diego (2014) Thesis: Reducing the Costs of Proof Assistant Based Formal Verification Advisor: Sorin Lerner BS in Computer Science (Honors) and Mathematics, Purdue University (2007) Professor Tatlock's research focuses on the intersection of programming languages, formal methods, and systems. His work in compilers and formal verification aims to make it easier to write tricky code while ensuring correctness through rigorous proofs. He explores computational fabrication techniques that bridge digital design with physical manufacturing. His recent work on equality saturation (via the egg framework) has transformed program optimization and synthesis. Tatlock also investigates floating-point numerics, distributed systems verification, and hardware/software co-design, always seeking to balance theoretical rigor with practical implementation. Tatlock's recent publications demonstrate a strong focus on equality saturation techniques (egg framework), computational fabrication, and verified systems. His work increasingly integrates machine learning with program analysis and synthesis. There's a clear trajectory toward more practical applications of formal methods in real-world systems, particularly in numerical computing and fabrication. His research group has made significant contributions to e-graph technology, floating-point accuracy, and the verification of distributed systems. Distinguished Paper Award for Rewrite Rule Inference Using Equality Saturation (OOPSLA 2021) Spotlight Paper Award for Dynamic Tensor Rematerialization (ICLR 2021) Distinguished Paper Award for egg: Fast and Extensible Equality Saturation (POPL 2021) Faculty Appreciation for Career Education & Training (FACET) Award (2020) NSF CAREER Award: Verifying Distributed System Implementations (2017) Distinguished Paper Award for Automatically Improving Accuracy for Floating Point Expressions (PLDI 2015) Distinguished Teaching Award Nomination (2015) Professor Tatlock has advised numerous doctoral, master's, and undergraduate students who have gone on to prominent positions in academia and industry, including faculty positions at the University of Utah and Brown University, and leadership roles at companies like OctoML and Certora. His research is supported by significant funding from NSF, DARPA, DOE, and industry partners, totaling millions of dollars. Current grants include projects on computer-aided reasoning, formal verification, computational fabrication, and machine learning systems. He has served on numerous program committees and organized workshops including FPTalks, EGRAPHS, and PNW PLSE. As co-leader of the Programming Languages & Software Engineering (PLSE) research group and affiliate of the SAMPL Group at the University of Washington, Tatlock has developed influential tools including egg (an equality saturation toolkit), Carpentry Compiler, and Odyssey. His group actively collaborates with industry partners including Amazon Web Services, where he serves as an Amazon Scholar. The group has made significant contributions to equality saturation, floating-point accuracy, program synthesis, and computational fabrication, with applications ranging from compiler optimization to 3D printing.
