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Shantanu DuttView profile

Professor

• VLSI CAD
• Discrete Optimization
• FPGA Testing and Trusted Design
• +2 more

Shantanu Dutt is a full Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago , located in Chicago, IL. His office is in 930 SEO at 851 S. Morgan St, and he can be reached at dutt@uic.edu . Education Ph.D. in Computer Science and Engineering, University of Michigan, Ann Arbor (1990) M.Tech. in Computer Engineering, Indian Institute of Technology Kharagpur (1984) B.E. in Electronics and Communication Engineering, Maharaja Sayajirao University of Baroda (1983) Research Interests Professor Dutt’s research agenda centers on VLSI Computer-Aided Design (CAD) , with particular emphasis on physical design and incremental synthesis targeting both ASICs and FPGAs. He explores discrete optimization techniques to solve placement, routing, and partitioning problems. Another major thrust is FPGA built-in self-test (BIST) and trusted design , ensuring provable diagnosability and security against hardware Trojans. He also investigates fault-tolerant computing at both chip and system levels, and develops parallel and distributed computing algorithms for scalable performance. Scientific Awards 1996 Best Paper Award , ACM/IEEE Design Automation Conference, for “A probability-based approach to VLSI circuit partitioning” 1995 Most Influential Paper Award , Fault-Tolerant Computing Symposium, for “Design and reconfiguration strategies for near-optimal k-fault-tolerant tree architectures” Research Impact and Funding Professor Dutt has published extensively in top-tier journals (IEEE TVLSI, ACM TRETS, IEEE TCAD) and premier conferences (ICCAD, DAC, DATE, FTCS). His work has shaped incremental placement, timing-driven routing, FPGA security, and fault-tolerant multiprocessor architectures. While specific grant numbers are not listed, the breadth and longevity of his publication record indicate sustained funding from NSF, industry, and other agencies. Laboratory and Collaborations Although no formal laboratory name is provided, Professor Dutt’s research is conducted within the ECE department’s VLSI CAD and Fault-Tolerance groups, collaborating with graduate students and colleagues across the US and internationally.

• Computer Engineering
• Embedded Systems
• Fault Tolerance
• +4 more

Corrado De Sio is a Fixed-term Researcher at the Department of Control and Computer Science (DAUIN) , Politecnico di Torino , affiliated with the College of Computer, Film, and Mechatronics Engineering . His academic roles include course instruction and collaboration for Reconfigurable Computing , High Performance Computing (HPC) , and Operating Systems for High-Performance Supercomputers across multiple academic years (2020-2025). Research Interests focus on: Reliability of reconfigurable systems and FPGAs under radiation effects Hardware-software co-design for fault tolerance Embedded systems in aerospace and safety-critical applications Machine learning acceleration on reconfigurable hardware Radiation effects on real-time operating systems and CNN implementations Recent publications address: 2025: Selective hardening of RISCV soft-processors for space applications 2025: Real-time 'signal for help' gesture recognition systems 2024: Reliability analysis of RISC-V processors and CNN placement algorithms 2023: Fault tolerance in FPGA-based CNNs and radiation effects on RTOS Patents include: PyXEL - Python Toolkit for Reconfigurable Hardware Surveillance Software for Real-Time Violence Detection Academic Supervision : Co-supervisor for PhD candidate Arash Amini Bardpareh in Computer and Systems Engineering .

• Neuromorphic Computing
• Hardware Accelerators
• VLSI Circuits
• +5 more

Prof. Dr. Tobias Gemmeke is a University Professor at RWTH Aachen University's Faculty of Electrical Engineering and Information Technology, leading the Chair of Integrated Digital Systems and Circuit Design. His work focuses on neuromorphic computing, hardware accelerators, and energy-efficient electronics. He has pioneered advancements in FPGA-based computational neuroscience simulators, neuromorphic processor architectures, and sensor integration for industrial and medical applications. Research interests include time-domain computing, ReRAM reliability, and co-optimization of neural networks with hardware. Notable contributions include the neuroAIx framework for accelerated neuroscience simulations and energy-efficient ASIC designs for post-quantum cryptography. He actively explores memristive devices and domain generalization techniques for edge computing. Recent publications highlight innovations in spiking neural networks, sensor systems for plain bearings, and time-domain compute-in-memory engines. His work bridges theoretical neuroscience with practical hardware implementations, emphasizing scalability and real-time performance.

Ryan KoView profile

Professor

• Cyber Security
• Data Provenance
• Industrial Control Systems (ICS) Security
• +6 more

Professor Ryan Ko is a leading academic in Cyber Security at the University of Queensland (UQ), serving as Chair and Director of the UQ Cyber Research Centre, Director of Research at the School of Electrical Engineering and Computer Science, and a member of UQ's Academic Board. He holds a BEng (Computer Engineering) and PhD from Nanyang Technological University, Singapore. His research focuses on data provenance, industrial control systems (ICS) security, privacy-preserving technologies, and AI-driven cybersecurity solutions. Ko has pioneered initiatives such as the UQ Cyber Centre, interdisciplinary cybersecurity education programs (MCyber, PGDipCyber), and the Oceania Cybersecurity Challenge. He has attracted over AUD 20 million in competitive grants as lead investigator, including the NZ$12.2M STRATUS project. Ko’s work spans industry and policy, including advisory roles with INTERPOL, governments, and NGOs. He has authored over 100 publications, contributed to ISO standards (e.g., ISO/IEC 21878), and co-founded cybersecurity startups. Awards include Fellowships from the Australian Computer Society and Queensland Academy of Arts and Sciences, and the CSA Ron Knode Service Award. Education: Bachelor of Engineering (Computer Engineering) (Hons.), Nanyang Technological University (2005) PhD in Computer Science, Nanyang Technological University (2011) Awards: Fellow, Australian Computer Society (2016) Fellow, Queensland Academy of Arts and Sciences (2020) Young Professional Award, Singapore Government (2018) Grants & Leadership: AUD 20M+ lead investigator grants; NZ$12.2M STRATUS project (2014–2018) Established UQ Cyber Centre (2019) and NZ’s first cybersecurity graduate program (2012) His research emphasizes returning data control to users, with applications in agriculture, energy, and critical infrastructure. Ko’s contributions include patents, open-source tools (e.g., Kali Linux), and frameworks like TrustCloud for cloud accountability.

Vyas SekarView profile

Professor

• Networking
• Cybersecurity
• Network Security
• +9 more

Vyas Sekar is the Tan Family Professor of Electrical and Computer Engineering at Carnegie Mellon University (CMU), with a courtesy appointment in the Computer Science Department. He is affiliated with CyLab and co-directs the Future of Enterprise Security initiative. His research focuses on networking, cybersecurity, distributed systems, and IoT security, with an emphasis on data-driven approaches and network verification. Education: Ph.D. in Computer Science (2010) from CMU; B.Tech. from IIT Madras (President of India Gold Medal recipient). Professional roles include Chief Scientist at Conviva and co-founder of Rockfish Data. Research Interests: Cybersecurity, network security, software-defined networking (SDN), IoT security, DDoS defense, privacy-preserving data sharing, and network performance optimization. Recent work includes developing tools like Pigasus (FPGA-accelerated intrusion detection), Nomad (cloud side-channel mitigation), and frameworks for anomaly detection in IoT networks. Articles Trends: Recent publications address advanced threats like LLM-driven network attacks, stealthy automotive network exploits (CANDid), and optical-layer DDoS defenses. Emphasis on practical solutions (e.g., SketchPlan for telemetry, Pryde for firewall evasion detection). Awards: ACM SIGCOMM Test of Time Award (2022), IIT Madras Young Alumni Achiever Award (2022), Intel Outstanding Researcher Award (2021), and NSF CAREER Award (2016). Recognized for contributions to intrusion prevention, network security, and IoT resilience. Grants & Projects: Led NSF-funded ONSET project (optical-layer DDoS defense), CyLab's Secure IoT Initiative, and collaborations with industry partners like Intel, Facebook, and Nokia Bell Labs. Advises graduate students in cybersecurity and networking. Labs & Teams: Active contributor to CyLab, co-developer of frameworks like Lumos (hidden IoT device detection) and KalKi (IoT security platform). Engages in interdisciplinary research across CMU’s Robotics Institute and Software Engineering Institute.

• Global Navigation Satellite Systems (GNSS)
• Avionics Systems
• Wireless Communication
• +7 more

René Jr Landry is a full Professor in the Department of Electrical Engineering at École de technologie supérieure (ETS), Université du Québec, specializing in Global Navigation Satellite Systems (GNSS), avionics, and wireless communication technologies. His academic journey includes a B.Ing. from Polytechnique Montréal, M.Sc. from University of Surrey (UK), and Ph.D. from SupAréo in Toulouse. He maintains active research leadership through two key laboratories: LASSENA (Laboratory of Space Technologies, Embedded Systems, Navigation and Avionics) and LACIME (Communications and Microelectronic Integration Laboratory). His research spans critical aerospace navigation domains including GNSS signal processing, inertial navigation systems, software-defined radio for avionics, radio frequency interference mitigation, and indoor positioning technologies. Landry's work addresses real-world challenges in satellite navigation robustness, precision positioning in urban/denied environments, and next-generation avionic system security. His current projects focus on blockchain-enhanced IoT security, AI-driven GNSS disruption analysis, and adaptive RF front-ends for multi-band avionics applications. Analysis of his recent publications reveals strong emphasis on resilient positioning systems through multi-constellation integration (particularly Iridium-NEXT), blockchain applications for navigation security, and explainable AI techniques for GNSS signal quality assessment. His work increasingly bridges traditional navigation engineering with cutting-edge security and machine learning paradigms. 2014 Prix d'excellence du c.a. pour les services à la collectivité Landry has supervised over 100 graduate students across doctoral, master's, and research projects since 2005, with current supervision extending through Summer 2025. His research funding supports multiple industry partnerships focused on avionics certification, software-defined radio implementations, and next-generation navigation systems. The LASSENA laboratory under his leadership develops certified avionic products from open-source SDR platforms and advances multi-sensor fusion techniques for challenging navigation environments. His research infrastructure includes specialized facilities for GNSS signal simulation, avionics hardware testing, and multi-sensor integration. Current work emphasizes flight-tested validation of RF front-end technologies, blockchain-secured navigation data, and real-time interference mitigation systems for aviation applications.

Patrick MitranView profile

Professor

• 5G/6G Communication Systems
• Millimeter-wave and Sub-THz Technologies
• Digital Predistortion
• +3 more

Patrick Mitran is a full-time Professor at the University of Waterloo's Department of Electrical and Computer Engineering, within the Faculty of Engineering. His research focuses on advanced wireless communication systems, including 5G/6G technologies, millimeter-wave and sub-THz communication, digital predistortion techniques, MIMO systems, and beamforming architectures. He leads projects addressing challenges in transmitter linearization, network resource allocation, and hardware-efficient signal processing. Key research interests include optimizing frequency multiplier-based transmitters, mitigating inter-cell interference in massive MIMO networks, and developing algorithms for reconfigurable intelligent surfaces (RIS). His work often intersects hardware design, signal processing, and network optimization, with applications in next-generation wireless infrastructure. Recent publications highlight innovations in ultrawideband signal generation for 6G testing, practical RIS configurations, and FPGA-based real-time digital predistortion implementations. His contributions emphasize both theoretical advancements and practical system-level solutions. Dr. Mitran's research group collaborates on cutting-edge topics such as hybrid NOMA in multi-cell networks, adaptive coding modulation for Gaussian channels, and interference decoding strategies. His work has been published in top-tier journals and conferences, reflecting a sustained impact on modern wireless communication technologies.

Jeffrey KrolikView profile

Professor

• Signal Processing
• Sensor Array Processing
• Radar Systems
• +4 more

Jeffrey Krolik is a Professor of Electrical and Computer Engineering at Duke University's Pratt School of Engineering. He holds a Ph.D. in Electrical Engineering from the University of Toronto (1987) and previously served as an Assistant Professor at Concordia University and Assistant Research Scientist at Scripps Institution of Oceanography. Ph.D. University of Toronto (1987) M.A. University of Toronto (1983) B.A. University of Toronto (1980) His research focuses on physics-based and statistical signal processing with applications in radar, sonar, microwave remote sensing, and medical imaging. Key projects include adaptive beamforming for ocean acoustic waveguides, aircraft height finding via HF radar, and motion-robust fMRI algorithms. Recent publications cover multipath mitigation in sonar arrays, vibrational radar backscatter communication, and CNN implementations for radar signal processing. His work spans underwater acoustics, urban radar tracking, and distributed sensor networks. He teaches advanced courses in sensor array signal processing, digital audio systems, and radar applications. His research has been supported through collaborations with institutions like Scripps and consulting roles with ONR, DARPA, and Air Force Rome Laboratories. Key contributions include waveguide invariant processing, matched-field beamforming, and novel approaches to radar clutter suppression in urban and maritime environments. His work integrates statistical signal processing with physical propagation models across diverse domains.

Lin ZhongView profile

Professor

• Computer Science
• Quantum Computing
• Operating Systems
• +3 more

Lin Zhong is the Joseph C. Tsai Professor of Computer Science at Yale University, leading the Efficient Computing Lab. He holds a Ph.D. from Princeton University and M.S./B.S. degrees from Tsinghua University. Previously, he served at Rice University from 2005 to 2019. His research focuses on optimizing computing efficiency, quantum error correction, operating systems, and mobile systems. Education: Ph.D., Princeton University M.S., Tsinghua University B.S., Tsinghua University Research Interests: His work spans quantum computing (e.g., decoding algorithms for surface codes), operating systems (safety, correctness, and lightweight kernels), and mobile/networking systems (massive MIMO, energy-efficient designs). Recent trends include integrating large language models (LLMs) into robotics and securing cloud-based AI workflows. Awards: NSF CAREER Award ACM SIGMOBILE RockStar (2014) and Test of Time (2022) Fellowships from IEEE and ACM Best Paper Awards at ACM MobileHCI, IEEE PerCom, ACM MobiSys, and more Lab & Teams: His Efficient Computing Lab explores systems for quantum error correction (e.g., FPGA-based decoders), secure embedded systems, and LLM-driven robotics. Projects include TimelyLLM (real-time LLM serving) and Blindfold (confidential memory management).

Danial ChitnisView profile

Lecturer

• Microelectronics
• Biomedical Engineering
• Quantum Technology
• +3 more

Dr. Danial Chitnis is a Chancellor's Fellow and Lecturer in Electronics at the School of Engineering, University of Edinburgh. He holds a DPhil in Engineering Science from the University of Oxford (2013) and has expertise in microelectronics, biomedical engineering, and quantum imaging. His research focuses on SPAD arrays, time-of-flight sensors, and wearable optical systems for biomedical applications. Education: BSc in Electronics Engineering, Chamran University of Ahvaz (2002–2007) MSc in Advanced Microelectronics Systems Engineering, University of Bristol (2007–2008) DPhil in Engineering Science, University of Oxford (2009–2013) Research Interests: Single-Photon Avalanche Diode (SPAD) arrays for optical communications and biomedical imaging Quantum-enhanced imaging via QuantIC Hub Wearable sensors for near-infrared spectroscopy (NIRS) AI-driven automation in test and measurement systems Articles Trends: Recent work emphasizes AI integration in electronics design, photon-counting receivers for 6G networks, and portable biomedical devices. Notable contributions include SYCL-based acceleration of circuit simulations and FPGA-driven time-to-digital converters. Grants & Collaborations: Principal Investigator of multiple grants, including EPSRC-funded projects on AI-enhanced human-machine interfaces and quantum technology applications. Collaborates with UCL, QuantIC, and industry partners like Keysight Technologies. Labs/Teams: Co-investigator at QuantIC, the UK Quantum Technology Hub in Quantum Enhanced Imaging. Leads interdisciplinary research on detector arrays and systems for quantum physics and consumer cameras.

Brendan Dolan-GavittView profile

Associate Professor

• Cybersecurity
• Program Analysis
• Virtualization Security
• +5 more

Brendan Dolan-Gavitt is an Associate Professor in the Computer Science and Engineering Department at NYU Tandon School of Engineering and part of the NYU Center for Cybersecurity (CCS). He holds a Ph.D. in Computer Science from Georgia Tech (2014) and a BA in Math and Computer Science from Wesleyan University (2006). His research spans cybersecurity, program analysis, virtualization security, memory forensics, and embedded/cyber-physical systems, focusing on automating the understanding of large software systems to develop novel defenses. Research interests include developing techniques for static and dynamic analyses of real-world software to reveal hidden design assumptions. His work has been presented at top security conferences like USENIX Security, ACM CCS, and IEEE Security & Privacy. He led the development of the open-source PANDA platform for dynamic analysis. His publications primarily focus on AI-driven security solutions, vulnerability discovery, and automated testing tools. Recent work explores LLMs in offensive security, fuzzing enhancements, and secure code generation, emphasizing practical applications in cybersecurity. Scientific Awards: NSF CAREER Award for improving software vulnerability testing and education He leads the OSIRIS Lab, a student-run cybersecurity group, and collaborates on interdisciplinary projects addressing emerging security challenges through grants and industry partnerships.

Gushu LiView profile

Assistant Professor

• Quantum Compiler
• Quantum Programming Language
• Quantum Algorithm Optimization
• +5 more

Dr. Gushu Li is an Assistant Professor at the University of Pennsylvania's School of Engineering and Applied Science, affiliated with the Computer and Information Science Department (primary) and Electrical and Systems Engineering Department (secondary). He leads the Penn Quantum System Lab, focusing on quantum computing software-hardware co-design. University: University of Pennsylvania School: School of Engineering and Applied Science Department: Computer and Information Science Academic Rank: Assistant Professor His research spans quantum compilers, programming languages, algorithm optimization, computer architecture, and electronic design automation. He develops techniques for quantum error correction verification, qubit mapping, and hybrid quantum-classical systems, with work integrated into IBM's Qiskit and Quantinuum's TKET frameworks. The 15 most recent publications highlight advancements in quantum simulation , bosonic quantum computing , fermion-to-qubit mapping , and NISQ-era architectures . Key methodologies include symbolic Hamiltonian compilation, adaptive tree structures, and runtime assertions for quantum program testing. 2024: NSF CAREER Award, NVIDIA Academic Grant Program Award, Intel Rising Star Faculty Award 2021-2022: QISE-NET Triplet Fellow, ACM SIGPLAN Distinguished Paper Award, multiple travel grants 2015-2017: Fellowships from UCSB, UChicago, and DAC Dr. Li advises four PhD students and actively recruits candidates with FPGA/digital design skills for 2025. His lab emphasizes interdisciplinary backgrounds to tackle quantum system challenges.

Nicola NicoliciView profile

Professor

• Digital Integrated Circuit Design
• Hardware Testing
• Post-Silicon Validation
• +7 more

Nicola Nicolici is a Professor in the Department of Electrical and Computer Engineering at McMaster University. His research focuses on methods and algorithms for the design of digital integrated circuits and systems, with significant contributions in manufacturing test, post-silicon validation and debug. His work has expanded to include embedded systems, low-energy computing, and custom hardware-accelerated computing systems. Professor Nicolici's research interests span multiple areas of digital system design and validation. His early work focused on manufacturing test methodologies and power-aware testing strategies for integrated circuits. More recently, he has made significant contributions to post-silicon validation techniques, including constrained-random stimuli generation, trace signal selection, and bit-flip detection. His research has evolved to address emerging challenges in embedded computing systems, low-energy design, and specialized hardware acceleration for various applications including deep neural networks and signal processing. His recent publications reveal a strong trend toward hardware acceleration for specialized computing tasks. The research spans matrix multiplication algorithms (Strassen and Karatsuba), memory system optimization (DDR5 calibration), FPGA-based radar processing, and neural network acceleration. His work consistently bridges theoretical algorithm development with practical hardware implementation considerations, particularly focusing on precision analysis, fault tolerance, and energy efficiency. The research demonstrates a clear progression from traditional digital circuit testing to more complex system-level validation and acceleration techniques. Professor Nicolici has been actively involved in teaching courses related to system-on-chip design and test, digital systems, and embedded systems. His teaching portfolio includes advanced courses such as System-on-Chip (SOC) Design and Test and Digital Systems Design , reflecting his expertise in the field. While specific grant information isn't detailed in the provided text, his extensive publication record suggests ongoing research funding support. His research has contributed significantly to the fields of digital circuit testing, post-silicon validation, and hardware acceleration. The work has practical applications in semiconductor manufacturing, embedded systems design, and specialized computing architectures. His recent focus on neural network acceleration and memory system optimization reflects the evolving landscape of computer architecture research.

David WentzlaffView profile

Professor

• Computer Architecture
• Green Computing
• Cloud Computing
• +6 more

David Wentzlaff is a Professor of Electrical and Computer Engineering at Princeton University, with associated faculty roles in Computer Science and the High Meadows Environmental Institute (HMEI). He leads research in computing architecture, green computing, and sustainable system design. As Director of Undergraduate Studies, he shapes educational programs in his field. Education: Ph.D., Electrical Engineering, MIT (2012) M.S., Electrical Engineering and Computer Science, MIT (2002) B.S., Electrical Engineering, University of Illinois at Urbana-Champaign (2000) Research Focus: Future Computing Systems: Designing manycore architectures, cloud computing infrastructure, and chiplet-based systems for exascale computing. Sustainability: Developing energy-efficient hardware, recyclable computing systems, and eco-friendly decommissioning strategies. Hardware-Software Co-Design: Exploring FPGA integration, in-memory computing, and parallel processing frameworks. Advising & Grants: Advises 8 current graduate students, focusing on topics like chiplet design, neural acceleration, and sustainable computing. Recipient of NSF grants for projects like OpenPiton (open-source manycore research platform) and CAREER awards for energy-efficient architectures. Labs & Collaborations: Leads the Wentzlaff Research Group at Princeton. Develops open-source frameworks like PRGA (FPGA prototyping) and OpenPiton (manycore processor).

John WawrzynekView profile

Professor

• Computer Architecture
• Reconfigurable Computing
• Wireless Systems
• +3 more

John Wawrzynek is a Professor of Electrical Engineering and Computer Sciences at the University of California, Berkeley. He is affiliated with the Department of Electrical Engineering and Computer Sciences in the College of Engineering and serves as Co-Director of the Berkeley Wireless Research Center and Co-PI of the CONIX Research Center, one of the six centers in the Joint University Microelectronics Program sponsored by DARPA. Dr. Wawrzynek received his B.S. in Electrical Engineering from SUNY, Buffalo (1977), M.S. in EE from the University of Illinois, Urbana/Champaign (1979), and Ph.D. in Computer Science from Caltech (1987). Before joining the Berkeley faculty in 1988, he worked as a consultant at Schlumberger Palo Alto Research. His research focuses on Computer Architecture, Reconfigurable Computing, Wireless Systems, and Integrated Circuit and System Design . His work spans both theoretical foundations and practical implementations, with particular emphasis on FPGA-based computing systems, reconfigurable architectures, and wireless communication systems. His research group has made significant contributions to the field of reconfigurable computing, including the development of the Garp architecture and various tools for reconfigurable computing systems. Analysis of his recent publications (2022-2025) reveals continued focus on reconfigurable computing, FPGA design, wireless networking, and formal methods for hardware verification. His work shows an evolution from traditional computer architecture towards specialized hardware acceleration, machine learning for EDA, and wireless systems research, with particular emphasis on SAT sampling, differentiable computing, and efficient FPGA implementation of neural networks. DAC's Most Influential Paper Award (2025) NSF Presidential Young Investigator (PYI) (1989) Charles Lee Powell Fellowship (1985) NASA Certificate of Recognition (1983) Rensselaer Engineering and Science Medal (1975) Professor Wawrzynek has advised numerous graduate students throughout his career, many of whom have gone on to prominent positions in both industry and academia including Google, Xilinx, and MIT Lincoln Laboratory. His research has been supported by various grants from NSF, DARPA, and industry partners. He leads the Berkeley Wireless Research Center, which focuses on next-generation wireless communication systems and technologies, and is actively involved in the CONIX Research Center which explores connected intelligence at the network's edge.