Find Academic Supervisors

Chengmo YangView profile

Professor

• Embedded Systems
• Design Automation
• Computer Architecture
• +6 more

Dr. Chengmo Yang is a Professor in the Department of Electrical and Computer Engineering at the University of Delaware, with a joint appointment. She received her PhD and MSc in Computer Science from the University of California, San Diego, and a BSc in Microelectronics from Peking University, China. PhD, University of California, San Diego MSc, University of California, San Diego BSc, Peking University, China Her research focuses on enhancing security, reliability, non-volatility, and energy efficiency in embedded systems, cyber-physical systems (CPS), and Internet-of-Things (IoT). She leads the Computer Architecture, Reliability, and Security (CARES) group and has authored over 70 peer-reviewed publications. Recent publications emphasize neural network accelerators, non-volatile memory (NVM) optimization, and security frameworks for embedded systems. Her work explores fault tolerance, wear leveling, and side-channel attack mitigation in NVM-based FPGAs, STT-RAM, and SSDs. National Science Foundation Career Award (2013) University of Delaware Mid-Career Faculty Excellence in Scholarship Award (2020) Best paper award at ICESS (2019) Three best paper nominations at DAC, DATE, and GLSVLSI (2019) Dr. Yang serves as Associate Editor for IEEE TCAD and ACM TODAES. She is the Diversity & Inclusion Representative for IEEE CEDA and has organized numerous conferences including Technical Program Chair for CODES-ISSS 2022. Her lab has hosted current and former students like Fanruo Meng (PhD candidate), Fateme Hosseini (Qualcomm), and Patrick Cronin (Intel), focusing on graduate-level research in hardware security and reliability.

Tianqi ChenView profile

Assistant Professor

• Machine Learning
• Deep Learning Systems
• Compiler Optimization
• +6 more

Tianqi Chen is an Assistant Professor at the Machine Learning Department and Computer Science Department of Carnegie Mellon University (CMU), with a courtesy appointment as a Professor in the Electrical and Computer Engineering Department within the College of Engineering. His research focuses on scalable machine learning systems, compiler optimization, and efficient deep learning frameworks. He holds a PhD from the Paul G. Allen School of Computer Science & Engineering at the University of Washington. Key contributions include the creation of XGBoost, Apache TVM, and MLC-LLM—widely adopted systems for machine learning and large language models. His work bridges algorithmic innovation with high-performance computing, emphasizing efficient deployment, quantization, and edge computing. Recent publications highlight advancements in LLM serving (e.g., WebLLM, Flashinfer), compiler-driven optimizations (e.g., TVM, Relax), and low-latency inference techniques (e.g., Magicdec, Tilus). These efforts address scalability, energy efficiency, and cross-platform compatibility in modern AI systems. Chen’s research has been applied to diverse domains, including music AI, browser-based inference, and microservice architectures for LLMs. His work underscores the importance of system-level thinking in advancing AI capabilities.

Yingyan LinView profile

Associate Professor

• Efficient Machine Learning
• Cross-Layer Innovations
• Green AI
• +7 more

Yingyan (Celine) Lin is an Associate Professor in the School of Computer Science at Georgia Institute of Technology, leading the Efficient and Intelligent Computing (EIC) Lab. Her work focuses on cross-layer innovations in machine learning systems, from algorithms to chip design, aiming to advance green AI and ubiquitous machine learning. She holds a Ph.D. in Electrical and Computer Engineering from the University of Illinois at Urbana-Champaign (2017). Research interests include efficient machine learning, neural rendering (e.g., NeRF), hardware-software co-design for AI acceleration, and graph neural networks. Her lab has pioneered projects like RTML and 3DML, funded by NSF, NIH, DARPA, and industry partners (Qualcomm, Intel, Meta). Awards: NSF CAREER Award (2021), ACM SIGDA Outstanding Young Faculty (2022), Meta Faculty Research Award (2022) Grants: Multi-university projects funded by NSF, NIH, DARPA, SRC, ONR, and industry Recognition: First-place wins at DAC 2022 and TinyML Design Contest 2022, IEEE Micro Top Pick 2023 Her research bridges algorithmic innovation with hardware implementation, emphasizing energy efficiency and real-time performance for applications in AR/VR, computer vision, and neuro-symbolic AI systems.

• Data Science
• Machine Learning
• Blockchain
• +4 more

Halil Ali is a Lecturer in Data Science (Education Focused) at the School of Computing Technologies, RMIT University. His research spans privacy-preserving machine learning, blockchain technologies, and cybersecurity. Key research areas include federated learning , quantum-enhanced AI , secure biometrics , edge unlearning , and privacy in healthcare data . His recent publications focus on resilient AI systems , blockchain applications , and ethical data handling in emerging technologies. His work demonstrates expertise in integrating machine learning with blockchain security across domains like IoT, smart grids, and metaverse healthcare. He contributes to practical frameworks for zero-trust architectures , lightweight consensus protocols , and quantum-classical hybrid models .

Hyesoon KimView profile

Professor

• Computer Architecture
• GPU
• Compilers and Runtime Systems
• +3 more

Hyesoon Kim is a Professor at the Georgia Institute of Technology , affiliated with the College of Computing and leading the HPArch research group . She co-directs the Center for Research into Novel Computing Hierarchies (CRNCH) . Her research focuses on Computer Architecture , GPU , Compilers and Runtime Systems , and Hardware Security , particularly for heterogeneous systems. Contact : hyesoon@cc.gatech.edu Location : 266 Ferst Drive, KACB 2344, Atlanta, GA Research Trends Her recent work spans RISC-V extensions for security, CUDA optimization on softcore GPUs, memory safety techniques, and energy-efficient deep learning architectures. Articles emphasize heterogeneous computing , GPU performance scaling, and IoT -oriented neural network methods. Open Source Projects She leads development of Macsim (heterogeneous architecture simulator) and Vortex (open-source GPU platform).

Tushar KrishnaView profile

Associate Professor

• Computer Architecture
• Interconnection Networks
• Networks-on-Chip
• +4 more

Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology, with a courtesy appointment in the School of Computer Science. He earned his PhD in Electrical Engineering and Computer Science from MIT in 2014, an MSE in Electrical Engineering from Princeton University in 2009, and a B.Tech in Electrical Engineering from IIT Delhi in 2007. His research spans computer architecture, interconnection networks, networks-on-chip (NoC), and AI/ML accelerator systems, with a focus on optimizing data movement in modern computing platforms. His work is funded by NSF, DARPA, IARPA, SRC, Department of Energy, Intel, Google, Meta, Qualcomm, and TSMC. His papers have been cited over 17,000 times, with three receiving IEEE Micro's Top Picks recognition, one earning an honorable mention, and four winning best paper awards. Dr. Krishna leads the Synergy Lab at Georgia Tech and has developed several influential tools including ASTRA-sim for distributed AI/ML training, MAESTRO and SCALE-sim for accelerator design space exploration, and Garnet2.0 for NoC simulation. His recent work focuses on large language model acceleration, distributed training systems, and neuro-symbolic AI architectures. He has received numerous teaching and research awards including induction into the HPCA Hall of Fame (2022), the Class of 1940 Teaching Effectiveness Award (2018), and the Roger P. Webb Outstanding Mid-career Faculty Award (2024). HPCA Hall of Fame Inductee (2022) Roger P. Webb Outstanding Mid-career Faculty Award (2024) Richard M. Bass/Eta Kappa Nu Outstanding Junior Teacher Award (2023) Roger P. Webb Outstanding Junior Faculty Award (2021) Class of 1940 Course Survey Teaching Effectiveness Award (2018) Dr. Krishna currently serves as Associate Director for the Center for Research into Novel Computing Hierarchies (CRNCH) and co-chair of the Chakra Execution Traces and Benchmarks Working Group. He has held the ON Semiconductor (Endowed) Junior Professorship at Georgia Tech (2019-2021) and has been a visiting professor at MIT EECS, Harvard University CS, and a researcher at Intel's VSSAD group.

Priyanka RainaView profile

Assistant Professor

• Domain-Specific Architectures
• Hardware/Software Co-design
• Energy-Efficient Computing
• +3 more

Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University, with a courtesy appointment in Computer Science. She leads the Stanford Accelerate research group, focusing on domain-specific hardware architectures and agile hardware-software co-design. Her work emphasizes high-performance, energy-efficient accelerators for emerging technologies. Education: B.Tech. from IIT Delhi (2011), M.S. and Ph.D. from MIT (2013/2018). Postdoctoral experience includes NVIDIA Research (2018) and Amazon Visiting Academic (2023–present). Awards include the Sloan Research Fellowship (2024), NSF CAREER Award (2023), and Terman Faculty Fellowship (2018). Research Interests: Domain-specific architectures, near-memory computing, design productivity, and machine learning acceleration. Her group develops frameworks like AHA (Agile Hardware) for efficient accelerator design and compilers. Awards: Over 10 major awards, including best paper recognitions at VLSI, MICRO, and JSSC. Active roles as Associate Editor for IEEE JSSC and Program Chair for IEEE Hot Chips (2020). Advising & Teaching: Supervises multiple PhD and MS students in hardware design, CGRAs, and ML accelerators. Teaches VLSI design courses (EE271/272/372) and oversees independent studies in embedded systems and chip design. Labs & Collaborations: Affiliated with Stanford PORTAL Center, AHA Center, and SystemX Alliance. Projects include MINOTAUR (edge AI accelerator), Amber (CGRA-based SoC), and EMBER (RRAM macros).

Sarita V AdveView profile

Professor

• Computer Architecture
• Extended Reality Systems
• Heterogeneous Computing
• +4 more

Sarita V Adve is the Richard T. Cheng Professor of Computer Science at the University of Illinois at Urbana-Champaign, where she conducts research spanning hardware, programming languages, operating systems, and applications with a focus on domain-specific systems. Her work bridges theoretical foundations and practical implementations, particularly in extended reality and heterogeneous computing. Her educational background includes a Ph.D. and M.S. in Computer Science from the University of Wisconsin-Madison (1993, 1989) and a B.Tech in Electrical Engineering from the Indian Institute of Technology Bombay (1987). Prior to joining Illinois, she served on the faculty at Rice University from 1993 to 1999. Adve's research centers on generalizable and scalable specialization for domain-specific systems, with current emphasis on extended reality (XR) systems including virtual, augmented, and mixed reality. She chairs the ILLIXR consortium to democratize XR research and developed the first fully open-source XR system (ILLIXR). Her foundational contributions include memory consistency models for C++ and Java programming languages, the Spandex coherence framework for heterogeneous systems, and software-driven approaches for hardware reliability. Her work spans hardware reliability (SWAT and RAMP projects), power management (GRACE system), and instruction-level parallelism. Recent publications reveal a strong focus on energy-efficient XR systems, hardware-software co-design for AI workloads, and resilience analysis. Her team explores rendering offload, visual-inertial odometry optimization, and compositional error injection frameworks, often targeting tradeoffs between energy, latency, and accuracy in mobile and edge environments. Fellow of the American Academy of Arts and Sciences Fellow of the ACM and IEEE ACM/IEEE-CS Ken Kennedy Award Anita Borg Institute Woman of Vision in Innovation Award ACM SIGARCH Maurice Wilkes Award Alfred P. Sloan Research Fellowship UIUC University Scholar University of Illinois Campus Award for Excellence in Graduate Student Mentoring Adve actively mentors students and has received multiple teaching awards. She co-founded the CARES movement to address discrimination in CS research events and chairs CS@Illinois CARES. Her service includes leadership roles in ACM SIGARCH (2015-2019), DARPA/ISAT study group, ACM Council, and Computing Research Association. She has secured significant funding including DARPA initiatives and Google Faculty Research Awards. She leads the ILLIXR consortium and has established collaborative research programs such as the $8.3M DARPA Joint University Microelectronics Program. Her lab focuses on open-source XR development, heterogeneous system architectures, and reliability-aware designs, with strong industry and government partnerships.

Bahar AsgariView profile

Assistant Professor

• Computer Architecture
• Domain-Specific Architecture Design
• Near Memory Processing
• +3 more

Bahar Asgari is an Assistant Professor in the Department of Computer Science at the University of Maryland, College Park. She holds appointments in CS, UMIACS, and ECE, and directs the Computer Architecture and Systems Lab (CASL). Her research focuses on domain-specific architecture design, near memory processing, and reconfigurable computing. Before joining UMD, she worked at Google, contributing to system optimization and memory utilization strategies. Education: Ph.D., Georgia Institute of Technology, 2021. Research Interests: Developing energy-efficient architectures for sparse problems, scientific computing acceleration, FPGA optimizations, and reconfigurable hardware systems. Her work addresses challenges in memory efficiency, parallelization, and hardware-software co-design across domains like machine learning and IoT. Key Awards: 2024 UMD Excellence in Teaching Award 2023 DOE Early Career Award Advising & Grants: Supervises 9 graduate students and leads projects sponsored by NSF, DOE, and industry partnerships. Her lab explores systolic arrays, near-data processing, and fault-tolerant computing. Labs/Teams: Directs CASL, which builds next-generation computing systems through hardware innovation and algorithm-architecture co-design.

Ana KlimovicView profile

Assistant Professor

• Cloud Computing
• Operating Systems
• Distributed Systems
• +4 more

Ana Klimovic is an Assistant Professor at the Department of Computer Science, ETH Zürich, and Deputy Head of the Institute for Computing Platforms. She leads the Efficient Architectures and Systems Lab (EASL) and focuses on optimizing cloud computing performance and resource efficiency. Education: Ph.D. in Electrical Engineering (Stanford University), M.S. in Electrical Engineering (Stanford), B.A.Sc. in Engineering Science (University of Toronto) Previous Roles: Research Scientist at Google Brain Her research spans cloud computing, operating systems, distributed systems, and their intersection with machine learning. Key areas include cloud-native programming models, elastic storage, GPU sharing, and data pipeline optimization. The 2025-2024 articles highlight trends in serverless computing, large language model (LLM) serving, GPU optimization, and data-centric ML systems. Themes include elasticity, resource multiplexing, heterogeneous computing, and infrastructure for AI/ML workloads. Scientific Awards: Microsoft Research PhD Fellowship, Stanford Graduate Fellowship She has led research projects on ephemeral storage, distributed training automation, and cost-efficient ML preprocessing, with grants from Microsoft Research and Stanford.

• Distributed Computing
• Wireless Networks
• Distributed Systems
• +4 more

Prof. Roger Wattenhofer is a Full Professor at the Department of Information Technology and Electrical Engineering, ETH Zurich, Switzerland, and Deputy head of the Computer Engineering and Networks Lab. He holds a doctorate in Computer Science from ETH Zurich (1998) and has held positions at Brown University and Microsoft Research before returning to ETH. His research focuses on distributed computing, wireless networks, and algorithmic systems design, with contributions to Byzantine agreement protocols, blockchain technologies, and neural network architectures. He teaches courses such as Distributed Systems and Computational Thinking. Education: Ph.D. in Computer Science (ETH Zurich, 1998). Research interests include distributed systems, network algorithms, and the intersection of machine learning with distributed computing. His work spans both theoretical foundations and practical implementations, addressing challenges in fault tolerance, consensus mechanisms, and algorithmic efficiency. Recent publications explore topics like adversarial robustness in voting systems, privacy in reinforcement learning, and generative music models. He actively contributes to open-source frameworks and benchmarks for neural algorithmic reasoning.

Subhasish MitraView profile

Professor

• Robust Computing
• NanoSystems
• Electronic Design Automation (EDA)
• +3 more

Subhasish Mitra is the William E. Ayer Professor of Electrical Engineering and Computer Science at Stanford University, holding dual appointments in both departments. He leads the Stanford Robust Systems Group and serves on the leadership team of the Microelectronics Commons AI Hardware Hub under the US CHIPS and Science Act. His research spans Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences, with breakthroughs in X-Compact test compression, carbon nanotube computing, and 3D integration. He has held international roles like the Carnot Chair at CEA-LETI and Visiting Professorships globally. Education & Honors: Recipient of over 40 awards including the IEEE Computer Society’s Harry H. Goode Memorial Award, ACM/IEEE’s A. Richard Newton Technical Impact Award, and the Intel Achievement Award. He earned top academic accolades from IIT Kharagpur and Jadavpur University, and is a Fellow of ACM and IEEE. Research Impact: Pioneered first-of-their-kind systems like the carbon nanotube computer and monolithic 3D integration. His work on robust computing techniques like QED validation and X-Compact compression has industry-wide adoption, saving billions in manufacturing costs. Collaborates with industry leaders like Intel, Google, and Samsung. Publications & Grants: Over 400 publications, including award-winning papers in DAC, ISSCC, and IEEE journals. Leads grants from NSF, DoE, and industry partnerships. His lab explores cutting-edge topics like neuromorphic computing, 3D thermal scaffolding, and AI hardware acceleration. Administration & Outreach: Serves as Associate Chair (Faculty Affairs) for Stanford’s Computer Science Department. Recognized by students for mentorship, and frequently invited to global forums like the World Economic Forum and National Academy of Engineering.

• Nanoelectronic devices
• Integrated circuits
• AI hardware
• +5 more

Haitong Li is an Assistant Professor in the School of Electrical and Computer Engineering at Purdue University's College of Engineering, joining the faculty in 2022. His research bridges nanoelectronic devices, integrated circuits, and nanotechnology-inspired AI hardware to address critical challenges in energy-efficient artificial intelligence systems. Education: Ph.D. in Electrical Engineering, Stanford University Research Interests: Dr. Li pioneers emerging memory technologies—particularly Resistive RAM (RRAM)—for in-memory computing and neuromorphic systems. His work focuses on 3D monolithic integration of RRAM and gain cell memory with CMOS to enable edge AI, with recent breakthroughs in hardware acceleration for large language models and sustainable computing. Key innovations include carbon footprint prediction for LLMs and zeroth-order fine-tuning techniques. Publication Trends: Dr. Li's 2023-2025 publications reveal a strategic shift toward sustainable AI hardware, emphasizing carbon-aware LLM inference and edge deployment. His research consistently targets data movement reduction through memory-centric architectures, spanning photonic accelerators, neuro-symbolic computing, and heterogeneous 3D integration. Awards: No scientific awards were documented in the provided sources. Advising and Grants: Current advisees and grant funding details were not specified in the available materials. Labs and Teams: Research group composition and laboratory facilities were not described in the source text.

Vijay RaghunathanView profile

Professor

• Embedded Systems
• Internet of Things (IoT)
• Wearable and Implantable Electronics
• +4 more

Vijay Raghunathan is a Professor in the Department of Electrical and Computer Engineering at Purdue University's College of Engineering. His work focuses on hardware and software architectures for embedded systems, wireless sensors for IoT, and wearable/implantable electronics with emphasis on low power design, energy harvesting, emerging memory technologies, and secure system design. Academic Rank: Professor Department: Electrical and Computer Engineering University: Purdue University Research Focus: Energy-efficient embedded systems, IoT, wearable devices His research explores low power design at both board-level and system-on-chip scales, micro-scale energy harvesting , and reliable/secure system design for medical devices. Recent work focuses on Processing-in-Sensor/Memory for battery-free AIoT devices, state space models for neural processing units, and security coprocessor integration in autonomous systems. Analysis of his publications reveals trends in energy-efficient neural network acceleration , approximate computing for edge inference , and compute-in-memory architectures . Key subfields include collaborative edge-cloud partitioning , sparse DNN accelerators , and security frameworks for medical devices. Vijay's work also addresses energy-accuracy tradeoffs in multimodal cognitive systems and intermittent computing using non-volatile memory technologies. His contributions span from microcontroller energy management to security protocols for implantable electronics.

Rakesh KumarView profile

Professor

• Computer Architecture
• System-Level Design Automation
• Low Power Computing
• +3 more

Rakesh Kumar is a Professor and John Bardeen Faculty Scholar in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign. His work focuses on computer architecture, system-level design automation, and low-power computing. PhD in Computer Engineering from University of California, San Diego BS in Electrical Engineering from IIT Kharagpur His research spans all layers of the computing stack, with key contributions to flexible computer systems , waferscale computing , error-resilient architectures , and approximate computing . He has pioneered work on voltage-reliability tradeoffs and peak power management techniques. Recent publications highlight trends in space microdatacenters , printed microprocessors , and neural graph accelerators . His work on plastic chips was recognized as one of the three biggest semiconductor headlines of 2022 by IEEE Spectrum. IEEE Fellow (2024) ISCA Influential Paper Award MICRO Test-of-Time Award ICCAD Ten Year Retrospective Most Influential Paper Award Best Paper Awards at CASES, SELSE, HPCA He has received teaching accolades including the Stanley H. Pierce Faculty Award and Ronald W. Pratt Outstanding Teaching Award . His research group explores hardware-software co-design for emerging applications in AI, IoT, and sustainable computing.