Bahar Asgari is an Assistant Professor in the Department of Computer Science at the University of Maryland, College Park. She holds appointments in CS, UMIACS, and ECE, and directs the Computer Architecture and Systems Lab (CASL). Her research focuses on domain-specific architecture design, near memory processing, and reconfigurable computing. Before joining UMD, she worked at Google, contributing to system optimization and memory utilization strategies. Education: Ph.D., Georgia Institute of Technology, 2021. Research Interests: Developing energy-efficient architectures for sparse problems, scientific computing acceleration, FPGA optimizations, and reconfigurable hardware systems. Her work addresses challenges in memory efficiency, parallelization, and hardware-software co-design across domains like machine learning and IoT. Key Awards: 2024 UMD Excellence in Teaching Award 2023 DOE Early Career Award Advising & Grants: Supervises 9 graduate students and leads projects sponsored by NSF, DOE, and industry partnerships. Her lab explores systolic arrays, near-data processing, and fault-tolerant computing. Labs/Teams: Directs CASL, which builds next-generation computing systems through hardware innovation and algorithm-architecture co-design.
Xupeng Miao is a Visiting Assistant Professor in the Department of Computer Science at Purdue University, holding the Kevin C. and Suzanne L. Kahn New Frontiers Assistant Professorship. Previously, he was a Postdoctoral Fellow at Carnegie Mellon University's Catalyst Group under Professors Zhihao Jia and Tianqi Chen. He earned his Ph.D. in Computer Science from Peking University (2022) and a Bachelor’s degree from Northeastern University. His research focuses on machine learning systems, distributed computing, and data management, with notable contributions to systems like Hetu (a distributed deep learning framework) and innovations in large language model (LLM) serving (e.g., SpotServe, SpecInfer). He has received awards including the 2024 WAIC Yunfan Award and an Outstanding Paper Award at ACL 2024. Current projects emphasize efficient systems for generative AI, including optimizing LLM training and inference on heterogeneous hardware, fault-tolerant distributed training, and scalable graph-based machine learning. He teaches CS 59200-MLS: Machine Learning Systems at Purdue and actively mentors students in PhD/MS programs and internships. Key achievements include NVIDIA Academic Awards, IEEE Micro Top Picks recognition, and leadership in international conference roles (e.g., Artifact Evaluation Co-Chair for KDD 2025 and MLSys 2025). His work bridges system design, algorithmic innovation, and hardware-aware optimizations to advance scalable AI infrastructure.
Prof. Alois Christian Knoll is a full professor at the Technical University of Munich (TUM) in the School of Computation, Information and Technology. His academic career includes roles at Bielefeld University and leadership in major EU initiatives like the Human Brain Project and ECHORD++. He specializes in robotics, AI, and autonomous systems, with a focus on medical robotics, sensor-based systems, and neuromorphic engineering. Knoll has supervised over 100 doctoral theses and authored/co-authored over 1,000 publications. Education: Diploma in Electrical Engineering (University of Stuttgart, 1985); PhD in Computer Science (Technical University of Berlin, 1988); Habilitation (TU Berlin, 1993). He has been at TUM since 2001, leading the Robotics, AI, and Real-Time Systems department. Research interests span autonomous systems, neuro-IT integration, and traffic simulation. Key projects include fortiss (Bavarian State Institute for Computer Science) and TUM-CREATE (Singapore collaboration). Awards include IEEE Fellow, University of Tokyo Fellow, and the Carl-Ramsauer-Prize (1990). Current roles include editorships in robotics journals, leadership in EU flagship projects, and teaching across multiple programs. His work bridges computer science, neuroscience, and engineering, with applications in healthcare, automotive systems, and urban mobility.
Prof. Roger Wattenhofer is a Full Professor at the Department of Information Technology and Electrical Engineering, ETH Zurich, Switzerland, and Deputy head of the Computer Engineering and Networks Lab. He holds a doctorate in Computer Science from ETH Zurich (1998) and has held positions at Brown University and Microsoft Research before returning to ETH. His research focuses on distributed computing, wireless networks, and algorithmic systems design, with contributions to Byzantine agreement protocols, blockchain technologies, and neural network architectures. He teaches courses such as Distributed Systems and Computational Thinking. Education: Ph.D. in Computer Science (ETH Zurich, 1998). Research interests include distributed systems, network algorithms, and the intersection of machine learning with distributed computing. His work spans both theoretical foundations and practical implementations, addressing challenges in fault tolerance, consensus mechanisms, and algorithmic efficiency. Recent publications explore topics like adversarial robustness in voting systems, privacy in reinforcement learning, and generative music models. He actively contributes to open-source frameworks and benchmarks for neural algorithmic reasoning.
Shweta Shinde is an Assistant Professor at ETH Zürich's Department of Computer Science. She leads the Secure & Trustworthy Systems (SECTRS) group and is affiliated with the Institute of Information Security and the ZISC Center. Her research focuses on foundational and practical aspects of trusted computing, system security, and program analysis to protect devices ranging from smartphones to cloud servers. Key areas include AMD SEV-SNP, Arm CCA, Intel SGX, and hardware-software co-design for security. Dr. Shinde has made significant contributions to confidential computing, including frameworks like OpenCCA and tools for analyzing hardware vulnerabilities. Her work has been recognized with Best Paper Awards and Distinguished Paper Awards at top venues. She advises a group of PhD students, including Mark Kuhne, Supraja Sridhara, and Benedict Schlüter. Her service includes program committee roles at IEEE Security & Privacy, USENIX Security, and as Track Co-Chair for AsiaCCS 2026.
Vijay Raghunathan is a Professor in the Department of Electrical and Computer Engineering at Purdue University's College of Engineering. His work focuses on hardware and software architectures for embedded systems, wireless sensors for IoT, and wearable/implantable electronics with emphasis on low power design, energy harvesting, emerging memory technologies, and secure system design. Academic Rank: Professor Department: Electrical and Computer Engineering University: Purdue University Research Focus: Energy-efficient embedded systems, IoT, wearable devices His research explores low power design at both board-level and system-on-chip scales, micro-scale energy harvesting , and reliable/secure system design for medical devices. Recent work focuses on Processing-in-Sensor/Memory for battery-free AIoT devices, state space models for neural processing units, and security coprocessor integration in autonomous systems. Analysis of his publications reveals trends in energy-efficient neural network acceleration , approximate computing for edge inference , and compute-in-memory architectures . Key subfields include collaborative edge-cloud partitioning , sparse DNN accelerators , and security frameworks for medical devices. Vijay's work also addresses energy-accuracy tradeoffs in multimodal cognitive systems and intermittent computing using non-volatile memory technologies. His contributions span from microcontroller energy management to security protocols for implantable electronics.
Rakesh Kumar is a Professor and John Bardeen Faculty Scholar in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign. His work focuses on computer architecture, system-level design automation, and low-power computing. PhD in Computer Engineering from University of California, San Diego BS in Electrical Engineering from IIT Kharagpur His research spans all layers of the computing stack, with key contributions to flexible computer systems , waferscale computing , error-resilient architectures , and approximate computing . He has pioneered work on voltage-reliability tradeoffs and peak power management techniques. Recent publications highlight trends in space microdatacenters , printed microprocessors , and neural graph accelerators . His work on plastic chips was recognized as one of the three biggest semiconductor headlines of 2022 by IEEE Spectrum. IEEE Fellow (2024) ISCA Influential Paper Award MICRO Test-of-Time Award ICCAD Ten Year Retrospective Most Influential Paper Award Best Paper Awards at CASES, SELSE, HPCA He has received teaching accolades including the Stanley H. Pierce Faculty Award and Ronald W. Pratt Outstanding Teaching Award . His research group explores hardware-software co-design for emerging applications in AI, IoT, and sustainable computing.
Michael O'Boyle is a Professor at the University of Edinburgh's School of Informatics, where he serves as Director of the ARM Research Centre of Excellence and the EPSRC Centre for Doctoral Training in Pervasive Parallelism. Holding an EPSRC Established Career Research Fellowship, he leads pioneering work in compiler technology for heterogeneous architectures, bridging theoretical advances with practical high-performance computing applications. Professor O'Boyle's research spans multiple cutting-edge areas including heterogeneous code discovery and optimization, neural machine translation for program synthesis, deep neural network system stack optimization, software-defined hardware, and compiler/architecture co-design. His approach integrates constraint analysis, program synthesis, and machine learning to address complex challenges in high-performance computing across diverse hardware platforms. His recent publications reveal a strong trend toward integrating machine learning with traditional compiler techniques, particularly in neural program synthesis, tensor optimization, and architecture-aware compilation. This work represents a paradigm shift in compiler design, moving from rule-based systems to learning-based approaches that can automatically adapt to diverse hardware targets. IEEE/ACM CGO 2025 Distinguished Paper Award for 'Tensorize: Fast Synthesis of Tensor Programs from Legacy Code' IEEE/ACM CGO 2024 Test of Time Award ACM GPCE 2023 Best Paper Award for 'C2TACO: Lifting Tensor Code to TACOM' ACM ASPLOS 2021 Distinguished Paper Award IEEE HPCA 2021 Best Paper Award for 'Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads' Professor O'Boyle has successfully mentored numerous PhD students who have secured prominent positions in academia (including at Cambridge, Edinburgh, Leeds, and McGill) and industry (including Meta, NVIDIA, Qualcomm, Huawei, and Microsoft). His research is supported by significant funding from EPSRC, ARM, and European projects including Bonseyes and Transmuter, demonstrating strong international recognition and industry impact. He leads the influential Compiler and Architecture Design (CArD) Group at the University of Edinburgh and is a founder of the HiPEAC Network of Excellence, which has grown into a major European initiative connecting researchers and practitioners in high-performance and embedded computing.
Prof. Dr. Timothy Roscoe is a Full Professor in the Department of Computer Science at ETH Zurich. His research focuses on operating systems, networking, and distributed systems. He was inducted as an ACM Fellow in 2014 for contributions to these fields. Previously, he worked at Intel Research Berkeley, UC Berkeley (Adjunct Professor), and Sprint Labs. His work includes foundational contributions to systems like PlanetLab, P2 Declarative Networking, and the Nemesis OS. Roscoe holds a PhD from the University of Cambridge and has led projects in cloud computing, wide-area network measurement, and secure systems design. His current research emphasizes hardware-software co-design, formal verification of systems, and scalable memory architectures. Education: PhD in Computer Science, University of Cambridge (1995) Key Roles: Principal Researcher at Intel Berkeley Lab, Visiting Researcher at National ICT Australia Research Highlights: Contributions to distributed systems (PlanetLab), declarative networking (P2), and secure microkernels (seL4 integration). Current projects address challenges in disaggregated memory systems, coherent interconnects, and trustworthy embedded systems. Awards: ACM Fellow (2014), numerous grants and industry collaborations. Labs/Teams: Systems Group at ETH Zurich, focusing on OS design, hardware architectures, and formal methods.
Professor Hanumant Singh leads the Electrical and Computer Engineering department at Northeastern University, with a joint appointment in Mechanical and Industrial Engineering , and serves as Program Director for the Master of Science in Robotics. He earned his Ph.D. from MIT/WHOI Joint Program in 1995 and has conducted over 60 expeditions globally, focusing on marine geology, polar studies, and coral reef ecology. His research emphasizes field robotics , including SLAM, underwater manipulation, and imaging in extreme environments. He developed the Seabed AUV and Jetyak ASV , widely used in scientific research. His labs include the Field Robotics Lab and the Institute for Experiential Robotics . Research Interests: Machine Learning for Fisheries SLAM with dynamic objects Underwater imaging and manipulation Autonomous surface and aerial systems Polar and marine robotics Awards: ICRA Best Student Paper Award, IEEE Oceanic Engineering Society Distinguished Faculty Award (2025), Lifetime Achievement Award (2022), and IEEE Fellow status. His work has been featured in Nature Geoscience , Polar Biology , and media outlets like WGBH. Students & Collaborations: Advises students like Srinidhi Pattala (MS Robotics) and Dennis Giaya (PhD Computer Engineering). Collaborates with institutions on projects such as Antarctic sea ice thickness estimation and deep-sea submersible missions.
Alanson Sample is an Associate Professor in the Department of Electrical Engineering and Computer Science at the University of Michigan (since 2018), leading the Interactive Sensing and Computing Lab. His research focuses on Human-Computer Interaction, Cyber-Physical Systems, and wireless technology innovations. He holds a PhD in Electrical Engineering from the University of Washington (2011), with prior postdoctoral work there developing implantable medical devices. Before academia, Sample held senior roles at Disney Research (2013-2018) as Executive Lab Director and Principal Research Scientist, leading teams in Robotics, AI, Computer Vision, and HCI. Earlier, he worked at Intel Labs (2008-2013) on energy harvesting for wearables and IoT. Key research themes include wireless power systems, embedded sensing, and privacy-aware technologies. Over 150+ publications span topics like magnetic sensing (MagDesk), acoustic gesture recognition (HandSAW), and privacy-preserving activity tracking (PrivacyMic). His work bridges academic and industry innovation, particularly in scalable interactive systems and medical technology. Notable projects include the Quasistatic Cavity Resonance wireless charging system, RFID-based sensing platforms (WISP), and wearable health monitoring devices. His lab develops hardware-software co-design frameworks for energy-efficient embedded systems. Current research emphasizes medical applications, smart infrastructure, and ubiquitous computing interfaces.
Muhannad S. Bakir is the Dan Fielder Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology and serves as the Director of the 3D Systems Packaging Research Center. His research focuses on heterogeneous integration of microsystems, including 2.5D and 3D ICs and packaging technologies, with significant contributions to advanced cooling systems, electrical and photonic interconnects, and biosensor integration with CMOS. Dr. Bakir's research interests span heterogeneous microsystem design and integration, advanced cooling and power delivery for emerging architectures, electrical and photonic interconnect technologies, biosensor technologies, and nanofabrication. His work addresses critical challenges in next-generation electronics, enabling polylithic integration that concatenates heterogeneous ICs of various functionalities while mimicking monolithic-like densities. His research particularly focuses on co-design of thermal technologies, power delivery networks, and signaling networks for silicon nanoelectronic systems. His recent publications demonstrate strong trends in fused-silica stitch-chip technology for heterogeneous integration, with particular emphasis on RF and mm-wave applications, power delivery for AI accelerators, and thermal management solutions. His work bridges electrical engineering, materials science, and thermal management to solve critical bottlenecks in computing performance and efficiency. 2013 Intel Early Career Faculty Honor Award 2012 DARPA Young Faculty Award 2011 IEEE CPMT Society Outstanding Young Engineer Award 2012 National Academy of Engineering Frontiers of Engineering Symposium Invited Participant 2015 IEEE CPMT Society Distinguished Lecturer 2014 Best Paper of the IEEE Transactions on Components Packaging and Manufacturing Technology More than 25 conference and student paper awards Twelve issued US Patents Dr. Bakir leads the Integrated 3D Systems Lab (I3DS) at Georgia Tech, which is actively researching advanced packaging, interconnects, electrical and thermal design, and system integration. His team has received significant recognition for their work, including multiple best paper awards from major conferences like ECTC, IITC, and CICC. The lab is currently seeking postdoctoral researchers and research faculty to advance next-generation electronics through collaborative research. His lab focuses on enabling the next phase of Moore's Law through polylithic integration, which concatenates heterogeneous ICs of various functionalities (digital, analog, photonic, and mm-wave) using advanced off-chip '2.5D' and '3D' heterogeneous interconnects and packaging. This work impacts applications in high-performance computing, machine learning, edge intelligence, autonomous vehicles, augmented/virtual reality, and healthcare.
Sumeet Kumar Gupta is an Associate Professor in the Department of Electrical and Computer Engineering at Purdue University. His academic career spans from his current role to a prior Assistant Professorship at Pennsylvania State University (2014-2017) and an engineering position at Qualcomm Inc. (2012-2014). He holds a PhD in Electrical and Computer Engineering from Purdue University (2012), an M.S. from the same institution (2008), and a B.Tech in Electrical Engineering from IIT Delhi (2006). B.Tech, Electrical Engineering, IIT Delhi (2006) M.S., Electrical and Computer Engineering, Purdue University (2008) PhD, Electrical and Computer Engineering, Purdue University (2012) Dr. Gupta's research focuses on neuromorphic computing, low power variation-aware VLSI design in emerging nanotechnologies, device-circuit co-design, and nano-scale device modeling/simulations. His work addresses challenges in ferroelectric materials, crossbar arrays for deep neural networks, and energy-efficient AI hardware. Recent publications (2025-2024) highlight trends in: Ferroelectric HfO2/HZO thin films Compute-in-memory architectures Variability/stochasticity analysis Machine learning for device optimization Interconnect resistance/temperature effects AI hardware fault tolerance Scientific Awards & Recognitions: DARPA Young Faculty Award (2016) Early Career Professorship, Penn State (2014) 6th TSMC Outstanding Student Research Bronze Award (2012) Magoon Award (Purdue) Outstanding Teaching Assistant Award (Purdue, 2007) Intel PhD Fellowship (2009) His professional journey includes academic appointments at Purdue University (2020-present, Associate Professor) and Pennsylvania State University (2014-2017, Assistant Professor) after industry experience at Qualcomm Inc. (2012-2014). He maintains IEEE and EDS membership while publishing over 100 refereed works.
Ming-Syan Chen is a distinguished academic holding dual roles as a Distinguished Research Fellow and Director of the Research Center for Information Technology Innovation (CITI) at Academia Sinica, Taiwan, and a Distinguished Professor jointly appointed across multiple departments at National Taiwan University (NTU), including Electrical Engineering (EE), Computer Science and Information Engineering (CSIE), and the Graduate Institute of Communication Engineering (GICE). His career spans academia and industry, with prior roles as a research staff member at IBM Watson Research Center and leadership positions in Taiwan's technology sector. Education: He earned a B.S. in Electrical Engineering from National Taiwan University, followed by M.S. and Ph.D. degrees in Computer, Information, and Control Engineering from the University of Michigan, Ann Arbor. Research Interests: Chen's work focuses on databases, data mining, machine learning, multimedia networking, and cloud computing. He has authored over 350 papers and holds numerous patents, contributing to foundational advancements in query processing, data management, and networked systems. Award Highlights: Recipient of ACM and IEEE Fellowships, National Chair Professorship (lifetime honor), Teco Award, Pan Wen Yuan Distinguished Research Award, and IBM's Outstanding Innovation Award. His contributions span research, teaching, and technology commercialization. Leadership & Service: Former Dean of NTU's College of Electrical Engineering and Computer Science, CEO of Taiwan's Networked Communication Program, and Editor-in-Chief of the International Journal of Electrical Engineering. He has chaired international conferences and served on editorial boards of journals like IEEE TKDE and VLDB. Labs & Teams: Leads the Network Database Laboratory and collaborates on national initiatives in information and communication technologies. His research groups focus on data science, distributed systems, and social network analysis.
Matteo Sonza Reorda is a Full Professor at the Polytechnic University of Turin, affiliated with the Department of Automatic Control and Computer Science (DAUIN). He holds roles such as Partnership Agreement Coordinator with SMAT and has served as Vice-Rector for Research (2021–2024). His research focuses on fault tolerance, hardware reliability, and AI acceleration, with contributions to GPU/CNN reliability, self-test libraries, and defect-oriented testing. Education: M.S. in Electronics Engineering, Politecnico di Torino (1986) Ph.D. in Computer Engineering, Politecnico di Torino (1990) Research Interests: His work spans automatic test equipment, circuit reliability, GPU fault tolerance, neural network hardening, and embedded systems safety . He leads the Electronic CAD & Reliability Group and collaborates with institutions like the ISI Foundation and the National Research Council (CNR). Publications & Impact: With over 180 publications, his recent work emphasizes AI accelerator reliability, fault injection techniques, and safety-critical systems. Key trends include GPU resilience for CNNs, self-test library optimization, and radiation fault modeling in neural networks. Awards & Recognition: IEEE Fellow (2016–) Multiple best-paper awards at IEEE conferences (DDECS, DATE, etc.) Grants & Collaborations: Coordinator of EU projects (RESCUE, TUTORIAL) Partnerships with EDF, Marelli Europe, and SMAT Lead on National HPC/Quantum Computing Spoke 1 (2022–2025) Labs/Teams: Leads the CAD Group and collaborates with the French-Italian LIA LAFISI lab on hardware-software integration.
