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Tushar KrishnaView profile

Associate Professor

• Computer Architecture
• Interconnection Networks
• Networks-on-Chip
• +4 more

Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology, with a courtesy appointment in the School of Computer Science. He earned his PhD in Electrical Engineering and Computer Science from MIT in 2014, an MSE in Electrical Engineering from Princeton University in 2009, and a B.Tech in Electrical Engineering from IIT Delhi in 2007. His research spans computer architecture, interconnection networks, networks-on-chip (NoC), and AI/ML accelerator systems, with a focus on optimizing data movement in modern computing platforms. His work is funded by NSF, DARPA, IARPA, SRC, Department of Energy, Intel, Google, Meta, Qualcomm, and TSMC. His papers have been cited over 17,000 times, with three receiving IEEE Micro's Top Picks recognition, one earning an honorable mention, and four winning best paper awards. Dr. Krishna leads the Synergy Lab at Georgia Tech and has developed several influential tools including ASTRA-sim for distributed AI/ML training, MAESTRO and SCALE-sim for accelerator design space exploration, and Garnet2.0 for NoC simulation. His recent work focuses on large language model acceleration, distributed training systems, and neuro-symbolic AI architectures. He has received numerous teaching and research awards including induction into the HPCA Hall of Fame (2022), the Class of 1940 Teaching Effectiveness Award (2018), and the Roger P. Webb Outstanding Mid-career Faculty Award (2024). HPCA Hall of Fame Inductee (2022) Roger P. Webb Outstanding Mid-career Faculty Award (2024) Richard M. Bass/Eta Kappa Nu Outstanding Junior Teacher Award (2023) Roger P. Webb Outstanding Junior Faculty Award (2021) Class of 1940 Course Survey Teaching Effectiveness Award (2018) Dr. Krishna currently serves as Associate Director for the Center for Research into Novel Computing Hierarchies (CRNCH) and co-chair of the Chakra Execution Traces and Benchmarks Working Group. He has held the ON Semiconductor (Endowed) Junior Professorship at Georgia Tech (2019-2021) and has been a visiting professor at MIT EECS, Harvard University CS, and a researcher at Intel's VSSAD group.

Joey PaquetView profile

Associate Professor

• Design and implementation of programming languages
• Context-driven computing
• Demand-driven computing

Dr. Joey Paquet is a Tenured Associate Professor and Department Chair in the Department of Computer Science and Software Engineering at Concordia University in Montreal, Canada. He holds a PhD and specializes in research areas including Design and Implementation of Programming Languages, Context-Driven Computing, and Demand-Driven Computing. His work focuses on advancing programming paradigms and their applications in cybersecurity, distributed systems, and autonomic computing. Dr. Paquet is actively involved in thesis supervision across Computer Science and Software Engineering programs at both master's and doctoral levels. Research interests are centered around programming language design, particularly in demand-driven and context-aware systems. His contributions include frameworks like GIPSY and OpenISS, enabling scalable data processing and forensic computing. Recent work explores autonomic intent-driven networking, real-time gesture recognition, and IoT forensics. These efforts highlight his expertise in both theoretical constructs and practical implementations. His advising role supports students in MCompSc, MASc, and PhD programs. While specific grants are not detailed, his projects often involve interdisciplinary collaboration. Dr. Paquet is affiliated with platforms like LinkedIn and ResearchGate, reflecting an active academic presence. Key technical contributions include pioneering work on forensic computing backends, intent expression languages, and multimodal interaction systems. His research addresses challenges in cybersecurity, distributed systems, and service composition, with a focus on resilience and scalability.

Marco PlatznerView profile

Professor

• Reconfigurable Computing
• Approximate Computing
• Self-Aware Computing
• +7 more

Marco Platzner is a Professor for Computer Engineering at Paderborn University , Germany. He serves as the Dean of Research for the Faculty of Computer Science, Electrical Engineering and Mathematics and heads the Department of Computer Science. Previously, he held research positions at ETH Zurich, Stanford University, GMD (now Fraunhofer IAIS), and Graz University of Technology. Education: Diploma and PhD in Telematics (Graz University of Technology, 1991 and 1996), Habilitation in Hardware-Software Co-Design (ETH Zurich, 2002) Research Interests focus on reconfigurable computing, approximate computing, self-* computing, and embedded systems. His work addresses hardware security, FPGA design, and sustainable AI in data centers. Current projects include energy-efficient AI through deep neural network approximation for FPGAs (EKI-App) and lifecycle sustainability of socio-technical systems (SAIL). Publication Trends show expertise in FPGA security, approximate circuit synthesis, robotics, and hardware acceleration. Collaborations span robotics (ROS 2 integration), AI (transformer optimization), and cybersecurity (Trojan detection). Scientific Awards: ACM SIGDA Hall of Fame (2020) Significant Paper Award (FPL 2015) Best Paper Awards at IEEE ISVLSI (2024), ARC (2018), IEEE ReConFig (2015), and others Weierstraß Prize for Teaching (2008) Leadership Roles include membership in the board of Paderborn Center for Parallel Computing (PC2) and the Jenny Aloni Centre for Early Career Researchers. He has contributed to EU FP7 FET project EPiCS and German priority programs on embedded systems and organic computing.

Tulika MitraView profile

Professor

• Hardware-Software Co-design
• Real-Time Embedded Systems
• Energy-Efficient Computing
• +7 more

Professor Tulika Mitra is the Dean of the School of Computing and Vice Provost (Special Projects) at the National University of Singapore (NUS). She holds the Provost’s Chair Professor in the Department of Computer Science and has been instrumental in shaping academic policies and strategic initiatives at NUS since joining in 2001. PhD in Computer Science, Stony Brook University (2000) M.E. in Computer Science, Indian Institute of Science (1997) B.E. in Computer Science, Jadavpur University (1995) Her research focuses on hardware-software co-design for energy-efficient computing systems, particularly in real-time embedded systems, heterogeneous architectures, and AI accelerators. She leads major research programs such as the NRF Competitive Research Programme on Low-Power Edge Accelerators and the MOE Tier-3 Programme on Green AI , collaborating with industry leaders like ARM, AMD, and Meta. Her recent publications highlight innovations in CGRA optimization , sparse attention mechanisms , photonic-digital hybrid architectures , and low-power ML inference . These works often integrate compiler techniques, architectural design, and real-time constraints for edge computing applications. Scientific Awards : ESWEEK Test-of-Time Award (2022), ACM SIGDA Distinguished Service Award, IEEE CEDA Outstanding Service Recognition Award, Teaching Excellence Award (2006), and multiple best paper recognitions. Education Leadership : Spearheaded the Computer Engineering (CEG) Programme at NUS, a joint initiative between Engineering and Computing. As a mentor , she has supervised over 25 PhD students , many now in prominent academic or industrial roles. Her research group eCO Lab focuses on embedded computing challenges, while her grant collaborations include projects on 5G base stations, reconfigurable architectures, and IoT-optimized SoCs.

• High-Performance Computing
• Reconfigurable Computing
• FPGA Acceleration
• +7 more

Carlos Alvarez Martinez is a faculty member at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture at the Barcelona School of Informatics (FIB). He is a key member of the Programming Models (PM) research group and collaborates closely with the Barcelona Supercomputing Center (BSC). His research focuses on high-performance computing, FPGA acceleration, task-based programming models like OmpSs, and hardware-software co-design for heterogeneous systems. His research interests center on advancing parallel computing through innovative programming models and hardware acceleration. He investigates efficient task scheduling, resource management in multicore and FPGA-based systems, and runtime support for dataflow models. His work enables high-performance execution of complex applications in domains such as scientific computing and cyber-physical systems. He actively contributes to European initiatives like TEXTAROSSA and AXIOM, aiming to develop next-generation exascale supercomputing technologies. The trend in his recent publications shows a strong focus on leveraging FPGAs for HPC, optimizing SpMV operations, improving task scheduling with hardware support, and developing frameworks for multi-FPGA clusters. His work consistently bridges theoretical models with practical implementations, emphasizing performance, scalability, and energy efficiency in heterogeneous computing environments. Scientific Awards: Premi UPC al Compromís Social 2019 Premi Disseny per al Reciclatge 2013 Alvarez Martinez has advised or collaborated with several doctoral students, including Jaume Bosch, Xubin Tan, and Fahimeh Yazdanpanah. He has been involved in numerous competitive R&D projects, often related to high-performance computing and parallel programming models. His work includes significant contributions to educational innovation, particularly in active learning methodologies and formative assessment using interactive systems. He leads and participates in research labs and teams focused on programming models and computer architecture, notably the PM group at UPC/BSC. These teams develop runtime systems, compilers, and hardware accelerators to push the boundaries of parallel computing efficiency and programmability.

Muhammad Ali GulzarView profile

Assistant Professor

• Fault Localization
• Big Data systems
• Data Intensive scalable computing
• +5 more

Muhammad Ali Gulzar is an Assistant Professor in the Computer Science Department at Virginia Tech and an Amazon Scholar at Amazon Web Services. His research focuses on improving developer productivity through automated debugging and testing for applications in emerging domains, including data-intensive software such as dataflow programs, ML/AI applications, and computational notebooks. Education Ph.D. in Computer Science from University of California, Los Angeles (Google Ph.D. Fellow 2017-2020) Research Interests Gulzar's research spans three primary areas: (1) automated tracking-code localization techniques in web applications, (2) re-engineering testing and debugging for data-intensive applications, and (3) advancing current testing and debugging practices in Federated Learning Applications. His work addresses the challenges of debugging in complex systems where traditional approaches fail due to the scale and distributed nature of modern applications. His research has significant implications for improving software quality, developer productivity, and accessibility in web applications. Research Trends Recent publications demonstrate a strong focus on debugging and testing challenges in emerging application domains. His work bridges traditional software engineering with machine learning, data-intensive systems, and web technologies. Notably, he has made significant contributions to Federated Learning debugging (FedDebug), accessibility challenges in ad-driven web applications, and semantic caching for Large Language Models. His approach often combines novel algorithmic insights with practical implementations that address real-world challenges in software development and maintenance. Scientific Awards Google Ph.D. Fellow (2017-2020) $1.1 million NSF award for Federated Learning research ACM CCS 2024 Distinguished Artifact Award Advising and Grants Gulzar leads a productive research group with multiple students contributing to publications in top-tier venues. His NSF-funded research on Federated Learning demonstrates his ability to secure competitive funding for innovative projects. His advising style appears to emphasize practical impact alongside theoretical contributions, with students often taking lead roles in publications. Current research directions include debugging techniques for Large Language Models, accessibility challenges in modern web applications, and novel testing approaches for distributed data processing systems.

• Embedded Systems
• Hardware-Software Co-Design
• Invasive Computing
• +7 more

Prof. Dr.-Ing. Jürgen Teich is a full Professor and Chair for Hardware-Software Co-Design at the Department of Computer Science, Friedrich Alexander University Erlangen-Nuremberg (FAU). He serves as Head of Department Computer Science and Vice Dean of the Technical Faculty since August 2024, and has been Speaker of the FAU Research Center Embedded System Initiative (FAU ESI) since 2023. His educational background includes: Diploma degree in Electrical Engineering, University of Kaiserslautern (1989) Dr.-Ing. degree in Electrical Engineering, University of Saarland (1993) Habilitation (PD Dr.-Ing.) entitled "Synthesis and Optimization of Digital Hardware/Software Systems" (1996) Prof. Teich's research focuses on Embedded Systems , Invasive Computing , Hardware-Software Co-Design , and Reconfigurable Computing . His work spans from theoretical foundations to practical implementations, with particular emphasis on resource-constrained systems, many-core architectures, and energy-efficient computing. He has pioneered research in invasive computing paradigms that enable more efficient use of many-core processors by allowing applications to dynamically claim resources. His recent publications reveal a strong trend toward energy-efficient AI deployment on embedded devices , security of embedded systems , and novel memory technologies . There's a clear focus on practical implementations of machine learning on microcontrollers (TinyML), hardware acceleration for data processing, and innovative approaches to power management in self-powered systems. Among his notable scientific awards are: IEEE Fellow (since 2018) Member of Academia Europaea, Section Informatics (since 2011) Member of the National Academy of Science and Engineering (acatech) (since 2018) Member of the German Society of Humboldtians (since 2021) Prof. Teich has been Principal Investigator for numerous DFG-funded projects including SFB/Transregio 89 "Invasive Computing" (2010-2022), SFB 694, and multiple priority programs. He has coordinated large collaborative research efforts across Germany and internationally, with significant funding from DFG and other sources. His research group has produced influential work in embedded systems design and co-design methodologies. He leads the Hardware-Software Co-Design research group at FAU, which focuses on innovative approaches to embedded system design, invasive computing architectures, and efficient implementation of machine learning on resource-constrained devices. The group maintains strong collaborations with industry partners including Intel, Xilinx, and automotive companies.

Ahmed HemaniView profile

Professor

• Computer Engineering
• Embedded Systems
• Hardware Acceleration
• +5 more

Professor Ahmed Hemani is a faculty member at the Division of Electronics and Embedded Systems, KTH Royal Institute of Technology, affiliated with the Digital Futures Faculty. He holds the role of PI for the project 'New Chip Architectures for Industrial Vision' and leads research in reconfigurable computing, memristor-based systems, and hardware acceleration for AI and edge computing. His work bridges theoretical computer science with practical VLSI design and embedded systems development. He actively contributes to cross-disciplinary initiatives at Digital Futures, a joint center with Stockholm University and RISE Research Institutes of Sweden focused on digital innovation. His research emphasizes scalable FPGA/HPC architectures, low-power neuromorphic systems, and optimization techniques for custom silicon solutions. Current projects include a Lego-inspired edge AI framework and memristor-driven MIMO acceleration. Teaching responsibilities span advanced courses in SOC design, digital system verification, and embedded systems. He supervises advanced-level degree projects across computer engineering and ICT innovation specializations, emphasizing hands-on hardware-software co-design methodologies. Recent publications highlight innovations in memristor applications, FPGA-based acceleration, and reconfigurable architectures for neural networks and bioinformatics. His work addresses challenges in dark silicon utilization, energy-efficient computation, and high-performance embedded systems.

• Computer Science
• Electrical Engineering
• Machine Learning
• +4 more

Marian Verhelst is a Professor at KU Leuven's Faculty of Engineering Science, renowned for her research in hardware-efficient computing and dedication to STEM education. Her work spans hardware acceleration for machine learning, edge AI, and in-memory computing, with a focus on energy optimization and algorithm-hardware co-design. Her research interests include: Designing flexible hardware for ultra-low-power edge AI systems Optimizing sparsity-aware architectures for deep learning workloads Advancing chiplet-based and 3D memory technologies Co-designing algorithms and hardware for probabilistic AI Pioneering STEM outreach through KU Leuven InnovationLab Recent publications (2023–2025) demonstrate strong trends in: Hardware-software co-optimization for edge ML systems Efficient data movement in heterogeneous accelerators Low-precision and sparse computation techniques RISC-V based customizable SoCs Sustainable AI accelerator design Awards & Honors: Young Academy of Europe Award (2021) for science communication and STEM advocacy She leads significant educational initiatives, including the KU Leuven InnovationLab which has engaged 150 schools and 13,000 students since 2014. The program develops hands-on STEM projects (e.g., AI-powered wheelchairs, sustainable energy systems) and provides teacher training to inspire youth in engineering.

• Model-Based Design
• Design Automation
• Optimization
• +4 more

Marc C.W. Geilen is an Associate Professor at the Electronic Systems group , Eindhoven University of Technology. He leads the Model-Based Design Lab and contributes to the CompSOC Lab and High Tech Systems Center . His work focuses on model-based design methods, design automation, and optimization for real-time and embedded systems. Research Keywords: Cyber-Physical Systems, Real-Time Systems, Embedded Systems, Performance Analysis, Design Automation Key Collaborations: EU ECSEL TRANSACT project, SAM-FMS project, Arrowhead Tools initiative His recent publications address weakly-hard timing constraints in server-based systems, hybrid performance modeling for cyber-physical systems, and neural network optimization for communication. Article trends span Real-Time Scheduling , Trustworthy Modeling , Neural Network Efficiency , and Resource Allocation in distributed environments. Scientific Awards : Partial-Order Reduction for Performance Analysis (2018) Teaching activities include courses in Computational Modeling , Embedded Signal Processing , and Discrete Mathematics . He collaborates across projects like TRANSACT, SAM-FMS, and Arrowhead Tools, focusing on flexible manufacturing and cloud-to-edge transitions.

• Compilers
• Automatic Software Verification
• Compiler Optimization
• +7 more

Nuno Pereira Lopes is an Associate Professor at Instituto Superior Técnico , part of Universidade de Lisboa , and a researcher at INESC-ID . He also serves as an advisor at FuriosaAI , focusing on tensor contraction processors for AI workloads. Research Interests : Compilers, formal verification of LLVM optimizations, machine learning frameworks, undefined behavior exploitation, probabilistic model checking, blockchain security, and many-core code generation. Teaching : Compilers and Computer/Informatics Engineering projects. Funding : Supported by Google, Matter Labs, NLnet, Oracle, PRACE, RNCA, and Woven by Toyota. Recent Publications focus on LLVM backend validation , PyTorch pipeline parallelism , C++ dynamic cast optimization , undefined behavior in C/C++ , and AI tensor processors . His work bridges compiler design, formal methods, and AI hardware. Academic Service includes representing Portugal in ISO/IEC JTC 1/SC 22 (C++), organizing FLoC'26 , and serving on program committees for PLDI, EuroLLVM, and CGO.

Brandon LuciaView profile

Professor

• Intermittent Computing
• Energy-harvesting Systems
• Concurrency
• +7 more

Brandon Lucia is a Full Professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University's College of Engineering. He leads the abstract research group focusing on the intersection of computer architecture, systems, and programming languages. His work bridges theoretical foundations with practical implementations in energy-constrained environments. Lucia's research centers on intermittent computing systems and edge computing in extreme environments. His work on energy-harvesting systems has established fundamental principles for batteryless computing, while his orbital edge computing research pioneers computational intelligence for nanosatellite constellations. These research thrusts address critical challenges in reliability, efficiency, and programmability for systems operating under severe power constraints. His publication record shows a clear evolution from foundational work on intermittent computing models to sophisticated applications in space computing and edge intelligence. Recent publications demonstrate increasing integration of dataflow architectures with energy-harvesting constraints, particularly in satellite constellations where computational resources must be managed across distributed, power-constrained platforms operating in extreme environments. NSF CAREER Award (2017) IEEE TCCA Young Computer Architect Award (2019) Sloan Foundation Fellowship (2021) ASPLOS Best Paper Awards (2018, 2020) OOPSLA Distinguished Paper and Artifact Awards (2015) Lucia actively mentors numerous PhD students including Brad Denby, Zhuo Cheng, and Emily Ruppel, many of whom contribute significantly to his research program. His abstract research group maintains strong industry connections while pursuing fundamental advances in computing systems. The group has developed multiple open-source tools including Legerdemain for program analysis and MultiCacheSim for cache coherence simulation. His laboratory work spans from theoretical foundations of intermittent computing to practical implementations in space systems. Current projects include computational nanosatellite constellations, energy-minimal dataflow architectures, and secure edge computing systems that operate reliably despite frequent power failures.

Twan BastenView profile

Professor

• Embedded Systems
• Cyber-Physical Systems
• Model-Driven Engineering
• +3 more

Twan Basten is a Full Professor in the Electronic Systems group at Eindhoven University of Technology (TU/e). He leads research on embedded and cyber-physical systems, focusing on model-driven design, computational models, and system dependability. He holds an MSc (1993) and PhD (1998) in Computing Science from TU/e, advancing from Assistant to Full Professor by 2009, and became the Electronic Systems group chair in 2013. His research spans international projects (FP5-7, H2020, ECSEL) and Dutch initiatives (STW, NWO, RVO), with over 200 publications and seven best paper awards. He has co-supervised 21 PhD students and actively participates in program committees and conferences. His work contributes to UN Sustainable Development Goals through innovations in smart systems. Education: MSc in Computing Science, TU/e (1993) PhD in Computing Science, TU/e (1998) Research Interests: Explores design methodologies for embedded systems, including scenario-based design, real-time scheduling, and performance analysis. Specializes in model-driven engineering and computational models to ensure system dependability. Active in projects like TRANSACT (real-time systems) and SAM-FMS (flexible manufacturing). Key Contributions: Co-author of 1 book and over 200 scientific publications Recipient of seven best paper awards Co-supervised 21 PhD degrees Senior member of IEEE and lifetime member of ACM Labs & Teams: Leads the Model-Based Design Lab and contributes to EAISI High Tech Systems initiatives. Collaborates on tools like TRACE4CPS for execution trace analysis and CReTS for vehicle platooning simulation.

Jaakko Timo Henrik JärviView profile

Professor

• Generic Programming
• Programming Language Design
• Graphical User Interfaces (GUI)
• +7 more

Jaakko Timo Henrik Järvi is a Professor in the Department of Informatics at the University of Bergen, Norway, with additional affiliations at the University of Turku, Finland. His research focuses on programming language design, generic programming, and human-computer interaction, particularly in GUI frameworks and software reuse. His research interests include generic programming, programming language design (especially the Magnolia language), high-performance computing, array programming, and GUI engineering. He emphasizes formal methods and algebraic specifications to build reusable and efficient software systems. His work bridges theoretical foundations with practical applications in software development and education. The recent publications highlight a strong trend in declarative GUI frameworks, multi-selection models, and generic programming. His work explores domain-specific languages for GUI structure manipulation, reusable selection semantics across platforms, and optimizing array computations using the Mathematics of Arrays. These efforts reflect a consistent focus on software abstraction, correctness, and reusability. Jaakko Järvi has supervised doctoral students, including Tetiana Yarygina, whose dissertation explored microservice security. While no specific grants are detailed, his work on VisAST was supported by the Research Council of Norway (Project 250683), indicating active external funding. He frequently collaborates with researchers like Magne Haveraaen, Knut Anders Stokke, and Sean Parent. He contributes to tools and frameworks such as the MultiselectJS library and the VisAST educational tool. These are outcomes of collaborative research teams focused on improving software development practices and computer science education.

Nectarios KozirisView profile

Professor

• Parallel and Distributed Systems
• Computer Architecture
• Systems Software
• +10 more

Nectarios Koziris is a Professor at the Department of Computer Science , National Technical University of Athens (NTUA) , and former Dean of the School of Electrical and Computer Engineering . His research focuses on Parallel and Distributed Systems , Computer Architecture , and Cloud Computing . Key Research Themes: Compiler-OS-Architecture Interaction, Datacenter Hyperconvergence, Sparse Matrix Optimization, Quantum Computing, FPGA Virtualization Leadership: Founder of ~okeanos (Europe's largest public Cloud IaaS), Co-founder of GFOSS , Member of IEEE Computer Society Greece, Advisor to Arrikto Inc. His work has led to over 180 publications with 5800+ citations (h-index 33) , including two Best Paper Awards (IPDPS 2001, CCGRID 2013) and Intel Recognition (2015). He has supervised 12 PhD students and participated in 15+ EU projects as coordinator or consortium partner. Scientific Leadership: Program Co-Chair for Europar 2012 , Organizer for IPDPS , ICPP , SC conferences, and active member in Cloud Computing Expert Groups for the European Commission.