Ahmed Sherif is an Associate Professor specializing in cybersecurity and privacy-preserving systems, likely affiliated with the University of Southern Mississippi. He holds a Ph.D. from Tennessee Technological University (2017) and M.S. from Egypt Japan University of Science & Technology (2014). His research focuses on cryptographic solutions for autonomous vehicles, IoT networks, and smart grid security. Research interests span privacy-preserving systems across transportation and critical infrastructure, with emphasis on authentication protocols and hardware security. Teaches courses including Digital Logic, Network Security, and Advanced Security Techniques. Publications show strong focus on privacy engineering in emerging technologies (2021-2025), particularly in vehicular/drone networks and medical AI. No awards listed. Research includes federated learning for medical diagnosis and hardware-accelerated security frameworks.
R.K. Shyamasundar is a Professor at the Indian Institute of Technology Bombay , with a focus on Real-Time and Reactive Programming, Logic Programming, Pi-Calculus, and Parallel Programs. Research spans formal verification, concurrency, and distributed systems. Key contributions include RT-CDL semantics, Esterel language extensions, and hybrid system controller synthesis. Scientific awards include JC Bose National Fellow, Fellowships at Indian Academy of Sciences and Indian National Science Academy, and Senior Membership in IEEE. His work involves collaborations with institutions like TCS Group and researchers such as Basant Rajan, N. Raja, and Deepak Kapur.
Nele Mentens is a full professor at both KU Leuven and Leiden University, where she leads cutting-edge research in applied cryptography, hardware security, and secure embedded systems. At KU Leuven, she is affiliated with the Faculty of Engineering Technology and the Electrical Engineering Department (ESAT), leading the Emerging Technologies, Systems & Security (ES&S) research group at the Diepenbeek campus. Simultaneously, she holds a full professorship at Leiden University’s Leiden Institute of Advanced Computer Science (LIACS), focusing on applied cryptography and security. She has been instrumental in numerous national and international research initiatives, including Horizon Europe and NWO-funded projects. Full Professor, KU Leuven (since 2023) Full Professor, Leiden University (since 2020) Associate Professor, KU Leuven (2014–2023) Post-doctoral Researcher & Lecturer, KHLim / KU Leuven (2007–2014) Ph.D. in Engineering Science, KU Leuven (2007) M.Sc. in Electrical Engineering, KU Leuven (2003) Her research focuses on secure and efficient hardware design, particularly for cryptographic applications on FPGAs, reconfigurable architectures, IoT security, and neuromorphic computing. She explores physical attack resistance, side-channel analysis protection, and trusted computing architectures, with applications in healthcare, industrial monitoring, and endpoint AI. Her work bridges theoretical cryptography with practical hardware implementations, emphasizing energy efficiency and real-time performance. The 15 most recent publications reflect a strong trend toward secure, energy-efficient, and intelligent embedded systems. Topics include neuromorphic AI accelerators, trusted IoT architectures, dynamic reconfiguration for side-channel protection, and secure medical data processing. These works span disciplines such as computer architecture, cybersecurity, digital design, and embedded systems, with a focus on hardware-software co-design and real-world deployment. Nele Mentens has received recognition for her contributions, including: Best Paper Award, DATE'16 Best Paper Nomination, AsianHOST'17 Best Paper Award, CHES'19 She has supervised over 15 Ph.D. students and post-docs, both current and former, and has served as principal investigator in approximately 25 funded research projects. Her work has attracted significant grants from Horizon Europe, NWO, FWO, and national innovation programs. She actively contributes to the academic community through editorial roles in top journals and leadership in major conferences. Nele Mentens leads the ES&S research group at KU Leuven and collaborates closely with LIACS at Leiden University. Her team includes Ph.D. students, post-docs, and research experts working on projects like NimbleAI, NeuroSoC, and TrustedIoT. She has also established secure electronics labs through infrastructure grants and maintains strong international ties with institutions such as EPFL, Ruhr University Bochum, and ETH Zurich.
Jia Di serves as Professor and Department Head of the Department of Electrical Engineering and Computer Science at the University of Arkansas, holding the Rodger S. Kline Endowed Leadership Chair. He has been with the institution since 2004, progressing from Assistant Professor to his current leadership position within the College of Engineering. Education: B.S. in Automatic Control, Tsinghua University (1997) M.S. in Automatic Control, Tsinghua University (2000) Ph.D. in Electrical and Computer Engineering, University of Central Florida (2004) Research Focus: Dr. Di's work centers on asynchronous integrated circuit design and hardware security , with emphasis on Multi-threshold Null Convention Logic (MTNCL) for ultra-low-power secure systems. His research spans hardware Trojan detection, polymorphic logic gates, extreme environment electronics, and security solutions for IoT infrastructure. His Trustable Logic Circuit Design Lab has pioneered techniques for side-channel attack mitigation and cold boot attack prevention through self-destructive memory mechanisms. Publication Trends: Recent publications reveal a strategic shift toward hardware security applications for renewable energy systems and IoT edge devices, while maintaining core expertise in asynchronous circuit design. His work increasingly integrates machine learning (e.g., graph neural networks for hardware Trojan detection) and cross-platform verification frameworks, demonstrating evolution from pure circuit design to holistic cybersecurity solutions for critical infrastructure. Scientific Recognition: Senior Member of IEEE Eminent Member of Tau Beta Pi Elected Member of the National Academy of Inventors Research Leadership: Dr. Di has secured over $23 million in research funding for his Trustable Logic Circuit Design Lab, supporting development of 6 U.S. patents and two authoritative books. His lab collaborates with federal agencies and industry partners on hardware security challenges, with recent grants focusing on photovoltaic system protection and extreme-environment electronics. While specific student names aren't documented here, his extensive publication record indicates significant graduate mentorship in hardware security and asynchronous design. Lab Infrastructure: The Trustable Logic Circuit Design Lab maintains specialized capabilities for testing circuits in extreme environments (high temperature/radiation) and developing polymorphic security mechanisms. Current projects include RF aperture security, hardware-based IoT verification systems, and digital twin implementations for power electronics with integrated trust verification.
Pascal Sasdrich is a Researcher at Ruhr University Bochum, Germany, affiliated with the Faculty of Computer Science and the Security Engineering department. He holds a PhD in IT-Security/Information Technology from the same university (2018), following M.Sc. (2015) and B.Sc. (2012) degrees in the same field. His research focuses on Hardware Security, Secure Processor Design, Computer-Aided Security, and Security by Design. He has extensive experience in cryptographic hardware implementations, including countermeasures against side-channel and fault attacks. Teaching includes courses on Processor Security and Implementation of Cryptographic Schemes. His work bridges theoretical security models with practical hardware implementations, emphasizing automated tools and formal verification for secure embedded systems. Key projects include contributions to Project HEP (open-source hardware security chip design) and development of methodologies like EASIMASK for automated masking in hardware. Publications span cryptographic hardware implementations, fault and side-channel countermeasures, and formal security verification. Notable works include combined threshold implementations, secure processor extensions, and automated generation of masked hardware circuits. Current research emphasizes securing embedded systems through holistic design approaches, including ISA extensions and automated EDA tools.
Prof. Mohammed Khalid is a Professor in the Department of Electrical and Computer Engineering at the University of Windsor. He specializes in FPGA-based systems, network-on-chip architectures, and hardware acceleration for signal processing applications. His leadership roles include serving on the executive committee of IEEE Canada. His research focuses on optimizing cryptographic hardware, automotive embedded systems, and efficient algorithm implementations on FPGAs. Key contributions include advancements in PUF-based security mechanisms, high-speed elliptic curve processors, and FPGA-accelerated machine learning algorithms. He has led projects in automotive radar systems and AUTOSAR configuration tools. His work emphasizes practical applications of hardware-software co-design principles. Research Highlights : Development of novel FPGA architectures for real-time signal processing Innovative approaches to resource-efficient cryptographic hardware Pioneering work on hybrid NoC architectures for multi-FPGA systems Awards : IEEE Windsor Section Award (2019) for group leadership Best Student Paper Award (2024) for supervised research by Mohit Sharma Prof. Khalid's 150+ publications span FPGA design methodologies, adaptive signal processing, and embedded systems security. His research group collaborates with industry partners to advance automotive electronics and IoT applications.
Diego F. Aranha is an Associate Professor in the Department of Computer Science at Aarhus University . His research focuses on cryptographic systems, cybersecurity, and privacy-preserving technologies with applications in voting systems, post-quantum cryptography, and secure computation. He has contributed extensively to homomorphic encryption, secure multiparty computation (MPC), and cryptanalysis of cryptographic implementations. Key projects include: MPCC (2025-2028) : Multi-Party Computation in the Confidential Cloud SCI (2024-2027) : Secure Computation Infrastructures for the Retail Industry RENAIS (2021-2026) : Residue Number Systems for Cryptography His work emphasizes practical efficiency and formal verification of cryptographic protocols. Recent publications highlight advancements in lattice-based cryptography, secure voting schemes, and mitigating side-channel vulnerabilities in post-quantum algorithms. He actively collaborates on open-source cryptographic libraries and standards, with a focus on bridging theoretical security and real-world implementation challenges.
Renaud Pacalet is a Researcher at Institut Mines-Télécom – Télécom Paris , affiliated with the Communications and Electronics (Comelec) Department and the System on Chip (LabSoc) research team under the Information Processing and Communication Laboratory (LTCI). His work spans hardware security, embedded systems, and software-defined radio (SDR) architectures. Current Research: Hardware security, side-channel attacks (power, timing, fault injection), RISC-V security analysis using gem5, FPGA scheduling for cloud data centers, and model-driven design methodologies. Past Research: Hardware acceleration for ray tracing, SDR front-end processing, SoC security, and memory bus protection (SecBus project). Teaching: Courses on Digital Systems, Computer Architecture, and Hardware Security at EURECOM, including lab sessions on side-channel attacks and fault analysis. Email: renaud.pacalet@telecom-paris.fr Contact: Télécom ParisTech, Campus SophiaTech, 450 route des Chappes 06410 Biot, France
Tanvir Arafin serves as an Assistant Professor in the Department of Cyber Security Engineering at George Mason University, where his research focuses on hardware security and trust mechanisms for emerging computing platforms. With publications in premier venues including IEEE Transactions on Very Large Scale Integration Systems, IEEE Transactions on Computers, and ACM International Conference on Computer-Aided Design, he addresses critical security challenges in next-generation systems through rigorous hardware-software co-design approaches. His research portfolio spans Hardware Security, Trusted Computing, and IoT Security, with specialized expertise in Side-Channel Attacks and Secure Hardware Design. Dr. Arafin investigates electromagnetic side-channel vulnerabilities in O-RAN networks, develops countermeasures for autonomous vehicle cybersecurity, and pioneers RRAM-based security solutions for memory-constrained devices. His work bridges theoretical security models with practical implementations, emphasizing real-world applicability in edge computing environments and autonomous navigation systems. Current projects explore machine learning integration for anomaly detection in connected vehicles and secure acceleration of cryptographic operations. Analysis of Dr. Arafin's 2022-2025 publications reveals strategic focus areas: electromagnetic fingerprinting for radio units in O-RAN (2025), spatial acceleration of Kolmogorov-Arnold Networks (2025), and NTT-based cryptography accelerators (2024). His research demonstrates consistent innovation in securing autonomous navigation systems and edge devices, with emerging work on in-memory computing architectures using resistive memory technologies. Key trends include hardware-centric defense against model inversion attacks, voltage overscaling for lightweight authentication, and robust multi-robot coordination in dynamic environments. Scientific Awards: No scientific awards, fellowships, or medals were documented in the source materials. Dr. Arafin leads significant collaborative research, including the NSF CISE-MSI grant (DP: CNS) for edge-based robust multi-robot systems. His educational initiatives feature Capture-the-Flag competitions targeting underrepresented students in cybersecurity. Current grant activities emphasize practical security solutions for autonomous navigation, multi-robot coordination, and IoT edge devices, with demonstrated focus on translating research into deployable countermeasures for real-world threats in dynamic operational environments.
Megumi Ando serves as the Minnie McNeal Kenny Assistant Professor in the Department of Computer Science within Tufts University's School of Engineering. She joined Tufts in August 2023 as a full-time Assistant Professor after serving as a Visiting Assistant Professor from May to July 2023, with her named professorship awarded in February 2024. Previously, she was Lead Cybersecurity Research Scientist at MITRE Corporation where she consulted for federal agencies including the Department of Commerce. Her educational background includes: Ph.D. in Computer Science, Brown University (2020) M.Eng. in Electrical Engineering & Computer Science, MIT (2010) B.S. in Electrical Engineering & Computer Science, MIT (2010) B.S. in Mathematics, MIT (2007) Dr. Ando's research centers on the theoretical foundations of anonymous communication systems. Her work develops cryptographic protocols for onion routing with emphasis on resilience against network churn, asynchronous operations, and quantum threats. She investigates formal models for information leakage and composable security, aiming to build practical systems with provable privacy guarantees. Her research bridges theoretical computer science with real-world security applications. Analysis of her publication record reveals a cohesive trajectory from foundational cryptographic theory (2016) toward increasingly complex anonymity challenges. Early work established provable security for onion routing, evolving to address network churn (2022) and asynchronous models (2025). Her research consistently integrates quantum-resistance considerations and formal verification methods, demonstrating progression from theoretical constructs to practical implementations while maintaining cryptographic rigor. Her recognition includes: Four MITRE Innovation Program Awards (2013-2014, 2021-2022) ICALP Student Travel Award (2018) Brown University Graduate Fellowship (2016-2020) MITRE Accelerated Graduate Degree Fellowship (2014-2016) Dr. Ando has secured significant research funding including MITRE Innovation Program Awards and collaborative NSF grants for foundational anonymous communication research. She previously advised graduate students at Brown University and currently mentors students through her lab at Tufts. Her teaching portfolio includes Computation Theory, Cryptography, and specialized Data Infrastructure courses across multiple semesters. The Ando Lab at Tufts focuses on advancing theoretical frameworks for anonymous communication, with active projects in asynchronous anonymity protocols, churn-resistant network designs, and quantum-safe cryptographic systems. The lab maintains collaborations with federal security agencies and academic research groups specializing in network security and formal verification.
Uwe Meyer-Baese is an Associate Professor in the Electrical and Computer Engineering Department at the FAMU-FSU College of Engineering. He holds a Ph.D. (Dr.-Ing. habil) from Darmstadt University of Technology, Germany. His research focuses on Digital Signal Processing with FPGAs, VLSI design, and medical imaging applications. He has authored over 100 publications, 5 books, and holds 3 patents. He has been recognized with awards such as the Humboldt Fellowship (2009) and the FAMU-FSU Teaching Award (2007). Education History: Dr.-Ing. habil (Venia Legendi), Darmstadt University of Technology, Germany, 2003 Ph.D. (Dr. Ing.), Darmstadt University of Technology, Germany, 1995 M.S., Darmstadt University of Technology, Germany, 1989 Research Interests: FPGA-based embedded systems and real-time DSP Low-power VLSI architectures Medical image processing (e.g., breast MRI, brain tumor analysis) Hardware security and intellectual property protection Graph theory applications in biological networks Recent work includes advancements in FPGA implementations for microprocessor systems, brain network controllability studies, and AI-driven medical diagnostics. His lab focuses on bridging hardware design with biomedical applications, emphasizing practical implementations through FPGA platforms. Awards: Max-Kade Award in Neuroengineering (1997) ECE Department Research Award (2005) Humboldt Fellowship (2009) FAMU-FSU Teaching Award (2007) He has advised over 60 master’s theses and contributed to major grants in FPGA-based medical systems. His book Digital Signal Processing with Field Programmable Gate Arrays is a widely used textbook in the field.
Francesc Moll Echeto is an Associate Professor at the Universitat Politècnica de Catalunya (UPC), affiliated with the Departament d'Enginyeria Electrònica and the Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona. He leads the HIPICS research group focused on high-performance integrated circuits and systems design. His expertise spans energy harvesting, low-power electronics, process variability management, and secure circuit design. He coordinates the Doctorat en Enginyeria Electrònica program and has coordinated EU-funded projects like the European Processor Initiative (EPI). Education: M.S. in Physics, Universitat de les Illes Balears, 1991 Ph.D. in Electronic Engineering, Universitat Politècnica de Catalunya, 1995 Research Focus: His work addresses energy-efficient computing, including: - Design of circuits tolerant to manufacturing variability - Energy harvesting from mechanical and RF sources - Secure hardware countermeasures against side-channel attacks - RISC-V architecture implementations in advanced technologies - Edge computing and autonomous sensor systems Grants & Collaborations: Coordinator of R&D projects like 'ARQUITECTURA DE COMPUTADORES DE ALTAS PRESTACIONES' (PID2023-146511NB-I00) Part of the Barcelona Zettascale Lab consortium Collaborations with Barcelona Supercomputing Center and industry partners Awards: HiPEAC Paper Award (2023, 2024) for innovations in vector processing and DNN acceleration Labs/Teams: Leads the HIPICS group and the EFRICS subgroup, collaborating on EU-funded initiatives like the European Processor Initiative. Active in open-source silicon projects (e.g., Sargantana RISC-V processor).
Konstantinos Markantonakis is a Professor of Information Security in the Department of Information Security at Royal Holloway, University of London, where he also serves as Director of the Smart Card and IoT Security Centre and the Transformative Digital Technologies, Security and Society Catalyst. He is a leading figure in embedded systems and IoT security, with extensive research and consultancy experience. BSc (Hons) in Computer Science, Lancaster University, 1995 MSc in Information Security, Royal Holloway, 1996 PhD in Smart Card Security, Royal Holloway, 2000 MBA in International Management, Royal Holloway, 2005 His research focuses on securing embedded and cyber-physical systems, including smart cards, mobile devices, drones, automotive systems, and IoT. He investigates trusted execution environments, side-channel analysis, secure protocols, and hardware-software binding. His work bridges theoretical security and practical implementation, often uncovering zero-day vulnerabilities in consumer devices. The recent publications highlight a strong trend in trusted computing, remote attestation, secure embedded systems, and privacy-preserving technologies. His research integrates blockchain for secure energy trading, develops frameworks for edge machine learning, and advances forensic techniques for damaged storage media. He also explores covert channels in mobile and cloud environments, demonstrating a deep understanding of both offensive and defensive security. Best Paper Award Markantonakis has led major research projects such as EXFILES (forensic extraction from encrypted smartphones), Future TPM (quantum-resistant trusted modules), and the Academic Centre of Excellence in Cyber Security Research. He has supervised numerous PhD students and delivered keynotes at international conferences. His consultancy work has impacted financial institutions, transport operators, and mobile platform security. He leads the Smart Card and IoT Security Centre, a research hub focusing on practical security for connected devices. The centre conducts cutting-edge research in side-channel attacks, secure application execution, and forensic analysis, contributing significantly to both academic and industrial advancements in cybersecurity.
Glenn Gulak is a Professor in the Department of Electrical and Computer Engineering at the University of Toronto's Faculty of Applied Science and Engineering. He holds the Canada Research Chair in Signal Processing Microsystems and the Edward S. Rogers Sr. Chair in Engineering. A Senior IEEE Member and Professional Engineer in Ontario, he received his Ph.D. from the University of Manitoba. His research spans: Digital Communication Systems: VLSI implementations of MIMO detectors, lattice reduction algorithms, and homomorphic encryption accelerators Lab-on-Chip Microsystems: CMOS biosensors for rapid pathogen detection and integrated fluorescence imaging Recent publications (2019-2025) demonstrate a dominant focus on privacy-enhancing technologies, with 73% concentrated in cryptographic hardware and homomorphic encryption. This reflects industry-aligned work on confidential computing and secure data processing. Awards & Honors: IEEE Millennium Medal (2001) Canada Research Chair in Signal Processing Systems (Tier 1, 2005-2012) Edward S. Rogers Sr. Chair (2005-2010) RBC Research Prize L. Lau Chair (1999-2004) Teaching Award (1999) He has supervised 44+ graduate students (PhD/MASc) with thesis topics spanning VLSI communication systems, CMOS biosensors, and cryptographic accelerators. Notable industry collaboration includes serving as CTO of a semiconductor startup (2001-2003). His lab develops hardware for quantum cryptography and secure medical computation.
Dr. Arish Sateesan serves as Professor and Chair of the Institute for Networked Systems at RWTH Aachen University's Faculty of Electrical Engineering and Information Technology, located at Kackertstrasse 9 in Aachen, Germany. His research group operates from House C (Room C046) with direct contact via asa@inets.rwth-aachen.de. His primary research domains center on hardware-accelerated network security solutions, specializing in FPGA implementations for high-speed networking. Key focus areas include: Real-time network monitoring and intrusion detection systems Hardware-optimized cryptographic and non-cryptographic algorithms Machine learning integration for wireless beamforming and LiDAR processing Ultra-high-speed flow measurement architectures His work bridges theoretical computer science with practical hardware constraints, emphasizing throughput optimization for security-critical applications. Analysis of his 15 most recent publications (2021-2025) reveals a pronounced shift toward hardware-software co-design for next-generation networks. The research trajectory shows increasing integration of quantized neural networks with traditional security primitives, particularly for mm-Wave and 5G/6G applications. A consistent theme across all publications is the prioritization of hardware friendliness through algorithmic simplification and architectural innovation. As Institute Chair, he leads a research ecosystem focused on developing deployable security solutions for modern network infrastructures, with current projects targeting autonomous vehicle communication systems and infrastructure protection against distributed denial-of-service attacks.
