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Adriana SchulzView profile

Assistant Professor

• Computational Design
• Computer-Aided Design (CAD)
• Digital Fabrication
• +4 more

Adriana Schulz is an Assistant Professor in the Department of Computer Science & Engineering at the University of Washington's College of Engineering. She leads a research group focused on computational design, computer-aided design (CAD), and digital fabrication. Her work bridges computer science with practical applications in manufacturing, robotics, and sustainable design. Dr. Schulz received her Ph.D. in Computer Science from MIT in 2018 under the supervision of Professor Wojciech Matusik. Prior to her doctoral studies, she earned a Master's degree in Mathematics from IMPA (Instituto Nacional de Matemática Pura e Aplicada) in Rio de Janeiro, where she worked with Professor Luiz Velho, and a Bachelor's degree in Electronics Engineering from UFRJ (Federal University of Rio de Janeiro). Her research interests center around computational tools that enhance design and manufacturing processes. She develops novel algorithms for CAD systems, computational fabrication techniques, and sustainable design approaches. Her work spans multiple domains including robotics, textiles, electronics, and architecture, with a strong emphasis on creating practical tools that designers and engineers can use in real-world applications. She explores how machine learning, particularly neurosymbolic approaches, can improve design workflows and enable new capabilities in computational design systems. Analysis of her recent publications reveals a strong trend toward more intelligent and user-centered design tools. Her research increasingly integrates machine learning with traditional CAD systems to create more intuitive interfaces, supports sustainable design practices with computational tools, and develops novel fabrication techniques that push the boundaries of what's possible with digital manufacturing. She has made significant contributions to zero-waste fashion design, immersion cooling for high-performance computing, and CAD program understanding through novel representation learning techniques. Innovators Under 35 - MIT Technology Review Bolsa Aluno Nota 10 from FAPERJ Engineer 20000 award Dr. Schulz actively mentors several PhD students and postdoctoral researchers, including Haisen Zhao, Ben Jones, Yuxuan Mei, and others, often in collaboration with colleagues across different departments. Her research has attracted significant media attention, with coverage in major outlets including MIT News, BBC, IEEE Spectrum, Wired, and TechCrunch. Her work on Interactive Robogami was noted as the most read article in the International Journal of Robotics Research in its publication year. She leads a vibrant research group at the University of Washington that focuses on computational design systems, with particular emphasis on creating tools that bridge the gap between digital design and physical fabrication. Her team develops novel algorithms for CAD systems, computational fabrication techniques, and sustainable design approaches that have practical applications across multiple industries.

• High-speed data converters
• Wireless transceivers
• Digital phase-locked loops
• +7 more

Shiyu Su is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. His research focuses on high-speed data converters, wireless transceivers, digital phase-locked loops (PLL), and AI-assisted analog/mixed-signal design automation. He holds a Ph.D. from the University of Southern California (2019) and teaches courses such as ECE 340 (Electronic Circuits 2) and ECE 432 (Radio Frequency Integrated Devices and Circuits). Education: B.S. from Beijing University of Post and Telecommunication (China) and Queen Mary, University of London (UK), 2011; M.S. and Ph.D. from USC, 2013 and 2019, all in electrical engineering. Research Interests: High-speed ADCs/DACs RF/mm-wave transceivers Time-approximation filters (TAF) Analog/mixed-signal design automation Memristor-based computing Biomedical interfaces Key Awards: IEEE SSCS Predoctoral Achievement Award (2017–2018) Best Student Paper Award at IEEE RFIC (2022) Ming Hsieh Institute Scholar (2019–2020) Lab Focus: The Shiyu Su Lab develops integrated circuits for communications, sensing, and computing, with a focus on AI-driven methodologies and digital-analog co-design. Collaborations include work with Prof. Wei Wu (USC) on memristor-based systems.

Levent Burak KaraView profile

Professor

• Machine Learning
• Artificial Intelligence
• Computational Design
• +12 more

Levent Burak Kara is a Professor in the Department of Mechanical Engineering at Carnegie Mellon University (CMU), with a courtesy appointment in the Robotics Institute. He is a leading researcher in AI-driven computational design, additive manufacturing, and intelligent engineering systems, leading the Visual Design and Engineering Lab (VDEL) at CMU. Education: B.S., Mechanical Engineering, Middle East Technical University (1998) M.S., Mechanical Engineering, Carnegie Mellon University (2000) Ph.D., Mechanical Engineering, Carnegie Mellon University (2005) His research focuses on integrating machine learning, optimization, and geometric modeling to revolutionize engineering design and manufacturing. Key areas include topology optimization, CAD intelligence, digital twins, generative design, bioengineering, and electronic design automation. His work enables automation of traditionally labor-intensive design processes using deep learning and reinforcement learning. His recent publications reveal a strong trend toward physics-informed surrogate modeling, real-time simulation, manufacturability prediction, and AI-driven automation in mechanical, biomedical, and electronic systems. These works frequently appear in top journals such as Journal of Mechanical Design and Journal of Applied Mechanics , and at premier conferences like NeurIPS and DAC. Scientific Awards: National Science Foundation CAREER Award ASME Design Automation Society Young Investigator Award Google AI for Social Good Impact Scholar Kara advises several Ph.D. students and has secured significant funding from federal agencies such as the NSF and the U.S. Army Research Laboratory, as well as collaborations with industrial leaders including Cadence Design Systems and NVIDIA. His research is also supported by CMU’s NextManufacturing Center and the Critical Technology Initiative. He is actively involved in developing intelligent design systems that leverage AI to automate product design, optimize manufacturing processes, and improve medical diagnostics, particularly in oral cancer screening and organ preservation. His lab, VDEL, is a hub for innovation in AI-enabled engineering.

• Combinatorial optimization
• Design and analysis of algorithms
• Field-programmable systems
• +7 more

Martin D F Wong serves as the Edward C. Jordan Professor of Electrical and Computer Engineering and Executive Associate Dean for the College of Engineering at the University of Illinois at Urbana-Champaign. He is affiliated with the Coordinated Science Laboratory and has been instrumental in advancing electronic design automation research. His educational background includes: B.Sc. in Mathematics, University of Toronto (1979) MS in Mathematics, University of Illinois at Urbana-Champaign (1981) Ph.D. in Computer Science, University of Illinois at Urbana-Champaign (1987) Wong's research centers on combinatorial optimization and algorithm design for VLSI systems, with particular expertise in lithography-aware physical design, field-programmable systems, and electronic packaging. His work bridges theoretical algorithms with practical semiconductor manufacturing challenges as feature sizes shrink below 20 nanometers. Current research focuses on integrating chip design with next-generation lithography technologies including triple-patterning, self-aligned double patterning, directed self-assembly, and extreme ultraviolet processes. His publication record shows consistent contributions to electronic design automation, with emphasis on manufacturing-aware physical design algorithms and circuit optimization techniques. Recent work addresses the critical interface between circuit layout and lithography processes as semiconductor technology advances to 14nm and beyond. Scientific recognition includes: Fellow of IEEE and ACM 2000 IEEE Donald O. Peterson Best Paper Award Multiple Best Paper Awards at DAC, ICCD, and ICCAD conferences IBM Faculty Awards (2000, 2004) NSF Research Initiation Award Wong has secured significant research funding including a $450,000 NSF grant for lithography-aware physical design and has supervised over 49 PhD students. His work continues the legacy of integrated circuit innovation at Illinois, building on foundational contributions like Jack Kilby's integrated circuit invention. Current research initiatives focus on optimizing chip design for next-generation manufacturing processes where optical interference challenges require co-design of layout and fabrication. He leads research within the Coordinated Science Laboratory, focusing on electronic design automation algorithms that address the growing complexity of semiconductor manufacturing at nanometer scales.

Shantanu DuttView profile

Professor

• VLSI CAD
• Discrete Optimization
• FPGA Testing and Trusted Design
• +2 more

Shantanu Dutt is a full Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago , located in Chicago, IL. His office is in 930 SEO at 851 S. Morgan St, and he can be reached at dutt@uic.edu . Education Ph.D. in Computer Science and Engineering, University of Michigan, Ann Arbor (1990) M.Tech. in Computer Engineering, Indian Institute of Technology Kharagpur (1984) B.E. in Electronics and Communication Engineering, Maharaja Sayajirao University of Baroda (1983) Research Interests Professor Dutt’s research agenda centers on VLSI Computer-Aided Design (CAD) , with particular emphasis on physical design and incremental synthesis targeting both ASICs and FPGAs. He explores discrete optimization techniques to solve placement, routing, and partitioning problems. Another major thrust is FPGA built-in self-test (BIST) and trusted design , ensuring provable diagnosability and security against hardware Trojans. He also investigates fault-tolerant computing at both chip and system levels, and develops parallel and distributed computing algorithms for scalable performance. Scientific Awards 1996 Best Paper Award , ACM/IEEE Design Automation Conference, for “A probability-based approach to VLSI circuit partitioning” 1995 Most Influential Paper Award , Fault-Tolerant Computing Symposium, for “Design and reconfiguration strategies for near-optimal k-fault-tolerant tree architectures” Research Impact and Funding Professor Dutt has published extensively in top-tier journals (IEEE TVLSI, ACM TRETS, IEEE TCAD) and premier conferences (ICCAD, DAC, DATE, FTCS). His work has shaped incremental placement, timing-driven routing, FPGA security, and fault-tolerant multiprocessor architectures. While specific grant numbers are not listed, the breadth and longevity of his publication record indicate sustained funding from NSF, industry, and other agencies. Laboratory and Collaborations Although no formal laboratory name is provided, Professor Dutt’s research is conducted within the ECE department’s VLSI CAD and Fault-Tolerance groups, collaborating with graduate students and colleagues across the US and internationally.

Wenjing RaoView profile

Associate Professor

• VLSI Test
• Fault-Tolerance
• Reliability
• +3 more

Wenjing Rao is an Associate Professor at the Department of Electrical and Computer Engineering, College of Engineering, University of Illinois at Chicago (UIC). Her research focuses on VLSI test, fault-tolerance, reliability, and hardware security in emerging nanoelectronic systems. Education: Ph.D. in Computer Science from University of California, San Diego (2008) B.S. in Computer Science from Peking University (2001) Her work explores novel computation paradigms through physical unclonable functions (PUFs), defect-tolerant logic implementation, and scalable fault tolerance in many-processor arrays. Publications emphasize hardware security, reconfiguration strategies, and reliability challenges in nanoscale architectures. Notable honors include the 2017 Harold A. Simon Award for Excellence in Teaching and the 2012 NSF CAREER Award. She has contributed to key journals like IEEE Transactions on Computer-Aided Design and conferences including DATE, ASPDAC, and NANOARCH.

David Zhigang PanView profile

Professor

• Electronic Design Automation
• Machine Learning
• Hardware Acceleration
• +5 more

David Zhigang Pan is a Professor in the Department of Electrical & Computer Engineering at The University of Texas at Austin. He also holds the Silicon Laboratories Endowed Chair. Prior to joining UT Austin, he was a Research Staff Member at IBM T. J. Watson Research Center from 2000 to 2003. His academic journey began with a B.S. from Peking University, followed by M.S. and Ph.D. degrees from UCLA. Research Areas: Electronic Design Automation (EDA), Machine Learning Hardware, FPGA Prototyping, Optical Computing, Hardware Security, and CAD for Emerging Technologies Academic Timeline: Assistant Professor (2003-2008), Associate Professor (2008-2013), Full Professor (2013-present) His research focuses on design automation for mixed-signal circuits , GPU-accelerated EDA tools , and hardware-software co-design for AI . Recent work explores FFT-based optical neural networks and deobfuscation techniques for integrated circuits , reflecting his interdisciplinary approach at the intersection of machine learning , computer architecture , and semiconductor manufacturing . Key publication trends reveal expertise in: VLSI design , lithography optimization , and deep learning applications for EDA tools. His work has been recognized with multiple Best Paper Awards at top conferences including DAC , ASP-DAC , and HOST . Awards: IEEE Fellow (2014), SPIE Fellow (2017), ACM SRC Graduate Category Honors for students Patents: 8 U.S. Patents in electronic design and hardware optimization Prof. Pan has mentored 40 PhDs and postdocs who now hold key positions in academia and industry. He leads research initiatives involving GPU acceleration frameworks and optical computing architectures . His lab focuses on vertical integration of architecture, CAD tools, and fabrication technologies for next-generation hardware solutions.

Serdar ÖzoğuzView profile

Professor

• Active RC Filters
• Nonlinear Electronic Circuits
• Analog IC Design
• +3 more

Professor Serdar Özoğuz is a full faculty member at the Department of Electronics and Communication Engineering , Istanbul Technical University . Holding a Ph.D. from ITU (2000) and a M.Sc. from ITU (1993) , he has taught courses like Active Network Synthesis , Basics of Electrical Circuits , and Scientific Research Ethics since 2014. His research focuses on Active RC filters Nonlinear electronic circuits Analog integrated circuit design Network synthesis . His recent publications emphasize machine learning applications in RF/microwave design , quantum computing for CAD tools , and emerging memory devices . The department's Devreler ve Sistemler Laboratuvarı Çok Geniş Ölçekli Tümdevre (VLSI) Tasarımı Laboratuvarı likely support his work. Despite no explicit awards listed, his 15+ recent articles in high-impact journals underscore his technical contributions.

Giovanni De MicheliView profile

Professor

• Computer Architecture
• Electrical Engineering
• Integrated Systems
• +5 more

Giovanni De Micheli is a Professor of Electrical Engineering and Computer Science at EPF Lausanne, Switzerland. He also serves as Director of the Integrated Systems Centre and the Institute of Electrical Engineering at EPFL, and chairs the Scientific Committee of CSEM in Neuchatel. Previously, he held academic roles at Stanford University for 18 years, including Full Professor, Associate Professor, and Assistant Professor in the Department of Electrical Engineering. His research spans synthesis of digital circuits, hardware/software co-design, low-power design, and Networks on Chip (NoC) technology. 2003: IEEE Emanuel Piore Award 2000: Golden Jubilee Medal of the IEEE CAS Society 2000: ACM Fellow 1994: IEEE Fellow 1990: IEEE/CS Distinguished Service Award 1988: NSF Presidential Young Investigator Award His seminal contributions include pioneering C-based synthesis and Boolean matching algorithms for digital circuits, foundational work in dynamic power management using stochastic control, and the development of Network-on-Chip (NoC) technology. His publications, such as "Networks on Chips: A New SoC Paradigm" and "Dynamic Power Management for Portable Systems" , have shaped modern SoC design practices. With over 400 technical articles, 9 books, and an H-index of 56, his work remains highly influential.

• Analog and mixed-signal integrated circuit design
• Computer-aided design (CAD) of electronic circuits
• Design automation (EDA)
• +5 more

Georges Gielen is Full Professor in the Department of Electrical Engineering (ESAT) at KU Leuven, Belgium, and part-time Research Director at imec. He has held multiple leadership roles including Chair of ESAT Department (2012-2013, 2020-2024) and Vice-Rector for Science, Engineering & Technology (2013-2017). His academic career spans over 30 years at KU Leuven, progressing from Assistant to Full Professor. His research focuses on analog and mixed-signal integrated circuit design automation , with expertise in CAD tools, design optimization, sensor interfaces, and neuromorphic systems. His work bridges hardware design with machine learning, particularly in hardware-efficient AI implementations and biomedical applications. He has pioneered techniques for automated analog circuit sizing, topology synthesis, and reliability-aware design in nanometer CMOS. Gielen has received numerous accolades including the IEEE CAS Mac Van Valkenburg Award (2015), IEEE CAS Charles Desoer Award (2020), and EDAA Achievement Award (2021). He holds an ERC Advanced Grant AnalogCreate and is an IEEE Fellow since 2002. As a prolific scholar, he has chaired major conferences including DATE (2006), ICCAD (2007), and ESSCIRC (2017). He has graduated over 55 PhD students through the MICAS research group at KU Leuven, currently supervising 13 doctoral candidates. His research team collaborates extensively with imec and industry partners on cutting-edge projects in carbon-aware AI accelerators, uncertainty-aware design, and neuromorphic sensor interfaces.

Vidya A. ChhabriaView profile

Assistant Professor

• Computer-aided design (CAD) for VLSI systems
• Machine learning (ML) for electronic design automation (EDA)
• VLSI design
• +3 more

Vidya A. Chhabria is an Assistant Professor at Arizona State University's School of Electrical, Computer and Energy Engineering. She holds a Ph.D. and M.Sc. in Electrical and Computer Engineering from the University of Minnesota (2022, 2018) and a B.E. in Electronics and Communication Engineering from M.S. Ramaiah Institute of Technology (2016). Education Ph.D. Electrical and Computer Engineering, University of Minnesota (2022) M.S. Electrical Engineering, University of Minnesota (2018) B.E. Electronics and Communication Engineering, M.S. Ramaiah Institute of Technology (2016) Her research focuses on computer-aided design (CAD) for VLSI systems, particularly addressing physical design challenges through optimization and analysis algorithms. She also explores intersections between machine learning (ML) and electronic design automation (EDA), with emphasis on sustainable computing solutions. Scientific recognition includes the ICCAD Best Paper Award (2021), the University of Minnesota Graduate School's Best Dissertation Award (2024), and a Doctoral Dissertation Fellowship (2021). She mentors students through honors directed study, thesis supervision, and doctoral research courses (EEE 525 VLSI Design, EEE 598 Special Topics). Scientific Awards ICCAD Best Paper Award (2021) University of Minnesota Graduate School Best Dissertation Award (2024) Doctoral Dissertation Fellowship (2021) Her industry experience includes internships at Qualcomm (2017) and NVIDIA Research's ASIC VLSI Research Group (2020-2021). She maintains active research through the VLSI Design and Automation (VDA) Lab at ASU.

Gary GrewalView profile

Associate Professor

• Computer-Aided Design (CAD) Tools
• Field Programmable Gate Arrays (FPGAs)
• Machine Learning
• +5 more

Gary Grewal is an Associate Professor at the School of Computer Science , University of Guelph. His research focuses on developing intelligent Computer-Aided Design (CAD) tools for Field Programmable Gate Arrays (FPGAs) , integrating classical optimization techniques with machine learning and deep learning to address challenges in placement and routing for heterogeneous devices. He has received the Michal Servit Award (2017, 2018) for outstanding FPGA research and the University of Guelph Faculty Association Distinguished Professor Award for Excellence in Teaching (2017) . Grewal has held NSERC Discovery Grants annually from 1999 to 2023. Co-founder of the Guelph FPGA CAD Group Key collaborator with institutions like Ryerson University , University of Toronto , and University of British Columbia His work extends to health technology through the IronTracker mobile app , developed with Andrew Hamilton-Wright and students (A. D'Angelo, J. Carter, F. Liu, R. Pattison) to manage Hereditary Hemochromatosis (HHC) . The app, available in four languages and adopted in 100+ countries, was recognized at Parliament Hill and the Ontario Legislature. Scientific Awards : Michal Servit Award (2018) Michal Servit Award (2017) Distinguished Professor Award for Teaching (2017) NSERC Discovery Grants (1999-2023) His recent publications highlight trends in machine learning for FPGA CAD , including reinforcement learning for partitioning, deep learning for congestion estimation, and adaptive algorithms for placement. Grewal remains active in teaching courses like Discrete Optimization (CIS*6070) and Digital Systems I (CIS*3120).

Zoran J. StankovicView profile

Professor

• Antenna Design and Optimization
• Direction of Arrival (DoA) Estimation
• Artificial Neural Networks in Electromagnetics
• +7 more

Zoran J. Stankovic is a Full Professor at the Faculty of Electronics, University of Niš, Serbia, in the Department of Telecommunications. He has been an integral part of the institution since earning his PhD in 2007, progressing from Assistant to Associate Professor (2020) and Full Professor (2024). He is actively involved in research, education, and academic leadership. Education: PhD in Telecommunications, Faculty of Electronics, University of Niš (2007) Master's in Telecommunications, Faculty of Electronics, University of Niš (2002) Bachelor's in Electronics and Telecommunications, Faculty of Electronics, University of Niš (1994) His research focuses on applying artificial neural networks to solve complex problems in electromagnetics and wireless systems. Key areas include antenna design optimization , direction-of-arrival (DoA) estimation , microwave cavity modeling , and smart textile antennas . His work bridges machine learning with electromagnetic theory, enabling efficient and adaptive RF system design. The analysis of his recent publications reveals a strong trend in using deep and hybrid neural networks for electromagnetic modeling and signal processing. His research emphasizes real-world applications such as wearable antennas, mobile source tracking, and intelligent antenna systems, often published in high-impact IEEE and Wiley journals. Scientific Awards: Commemorative Plaque from the Yugoslav Society for Microwave Techniques and Technologies (2005) for outstanding scientific results in microwave engineering Advising and Grants: While specific students are not listed, he has supervised numerous academic works. He has participated in 17 research projects (13 national, 4 international including DAAD, NATO, COST) and 8 educational development projects (including ERASMUS+, TEMPUS, WUS). These reflect sustained funding and academic collaboration. Labs and Teams: He is the founder and head of the Laboratory for Antennas and Propagation at the Faculty of Electronics, Niš. He is actively involved in organizing and leading the international conferences TELSIKS and ICEST , serving on their program and organizational committees, demonstrating strong leadership in the academic community.

Azadeh DavoodiView profile

Professor

• Electronic Design Automation (EDA)
• Integrated Circuit Design
• Machine Learning in Hardware
• +5 more

Azadeh Davoodi is a Vilas Distinguished Achievement Professor and Associate Chair of Undergraduate Studies in the Department of Electrical and Computer Engineering at the University of Wisconsin-Madison. Her research focuses on Electronic Design Automation (EDA), integrated circuit debug, and machine learning applications in VLSI design. She holds editorial roles in journals like IEEE TCAD and ACM TRETS, and has chaired major conferences such as ISPD 2015 and served on technical program committees for DAC, ICCAD, and others. Education: PhD in Electrical Engineering, University of Maryland-College Park (2006) Research Interests: Machine learning for VLSI chip design VLSI design automation for machine learning IC-CAD for emerging nanotechnologies Hardware security Recent Research Trends: Her work bridges machine learning and hardware design, with publications on neural network optimization, distributed inference, and explainable AI for circuit design. She emphasizes energy-efficient CNNs, latency reduction in edge computing, and security in split manufacturing. Awards: 2025 DATE Best Paper Candidate 2024 Vilas Distinguished Achievement Professor 2015 ACM Best Paper Award 2011 NSF CAREER Award Service and Grants: Leads NSF-funded projects on explainable ML for CAD and holds grants for distributed neural network synthesis. Her service includes roles as IEEE HKN member and editorial board positions. Labs/Teams: Engages in interdisciplinary research teams at UW-Madison, focusing on EDA innovation and hardware-software co-design.

Luca SterponeView profile

Professor

• Reconfigurable computing
• Computer-aided design algorithms
• Fault tolerance and reliability
• +7 more

Luca Sterpone is a Full Professor at the Department of Control and Computer Science (DAUIN), Politecnico di Torino. He serves as Head of the Control and Computer Engineering Department (2023-2027), coordinates the Aerospace and Safety Computing Lab, and is a member of the Academic Senate and Power Electronics Innovation Center (PEIC). His research spans reconfigurable computing, fault tolerance, and radiation effects analysis in electronic systems. Professor since 2021 Department Head (DAUIN) since 2023 Coordinates international collaborations with ESA, AMD Xilinx, NVIDIA, and Thales Alenia Space Develops radiation-hardened FPGA tools (SETA, VERI-Place, PyXEL) 2007 EDAA Outstanding Dissertation Award and 2005 IEEE Best Paper Award Research Focus : Designing radiation-tolerant systems for aerospace, including fault-tolerant AI accelerators, FPGA reliability, and software-based error mitigation. He investigates soft error propagation in nanoscale circuits and develops tools for radiation sensitivity analysis in VLSI. His work integrates hardware-software co-design for mission-critical applications. Awards : EDAA Outstanding Dissertation Award (2007) IEEE European Test Symposium Best Paper (2005) SMACD Best EDA Tool Award (2018) ARC Best Paper candidate (2018) Teaching : He leads courses in Reconfigurable Computing (PhD level), GPU Programming , and Operating Systems . He has formal responsibility for teaching roles across 9 bachelor's and 7 master's years, and mentors multiple PhD students. Collaborations : Coordinates with the European Space Agency (ESA), University of Bielefeld, Universidad de Sevilla, and industrial partners like AMD Xilinx, NVIDIA, and General Motors. He leads projects such as RESCHIP4EU, VEGAS, and TERRAC for radiation-hardened computing solutions.