Find Academic Supervisors

George DarzanosView profile

Researcher

• Network Economics
• Pricing
• Game Theory
• +11 more

George Darzanos is a researcher affiliated with the Department of Computer Science at Athens University of Economics and Business (AUEB), actively contributing to the fields of network economics, game theory, cloud computing, and 5G network services. His work focuses on resource allocation, pricing strategies, and socially-aware traffic management in federated environments. Education: Ph.D. in Computer Science from AUEB (2013-2022), MSc in Computer Science from AUEB (2011-2013), and BSc in Informatics and Telecommunications from National and Kapodistrian University of Athens (2005-2011). Research Interests: Network economics, game theory, cloud federations, edge computing, 5G, and socially-aware traffic management. His publications and projects emphasize decentralized governance models, IoT federations, and optimization in multi-provider environments. He has collaborated on initiatives like IoT Federations (IoTFeds), 5G Vertical Innovation Infrastructure (5G-VINNI), and 5G Exchange (5GEx), contributing to business models, resource management, and network slicing. His contact information includes an office in the Theory, Economics and Systems Laboratory at AUEB, with an email address ntarzanos@aueb.gr .

Ioannis DimitriouView profile

Assistant Professor

• Queueing Theory
• Applied Probability
• Stochastic Processes
• +6 more

Ioannis Dimitriou is an Assistant Professor at the Department of Mathematics, University of Patras, Greece, since August 2019. Previously, he held academic positions at Imperial College London, FORTH Greece, Aristotle University of Thessaloniki, and INRIA Sophia Antipolis. Research Interests: His work focuses on Queueing theory Applied probability Stochastic processes Stochastic performance modeling Wireless network analysis Recent Publications: His recent work explores multidimensional queueing models, stability analysis in cooperative networks, and stochastic resource allocation with applications in IoT and 5G networks. Key trends include Retrial queue systems Markov-modulated random walks Network-level cooperation Power-saving mechanisms Stable throughput regions Scientific Awards: Marie Curie Fellow (ERCIM ABCDE program) Postdoctoral 'Research Excellence' Fellowship at Aristotle University Travel Grant for StochMod 2018 Teaching & Mentorship: He teaches Probability, Stochastic Processes, and Queueing Theory at both undergraduate and MSc levels. Mentored 9 MSc/BSc students, focusing on queueing applications in wireless networks, stochastic models, and performance evaluation.

• Programming Languages
• Compiler Optimization
• Data Movement Analysis
• +2 more

Auguste Olivry is a researcher at the French Institute for Research in Computer Science and Automation (Inria), France, specializing in programming languages and compiler optimization with focus on data movement analysis for computational workloads. Research interests include: Data Movement Lower Bounds Derivation I/O Complexity Analysis for Affine Programs Polyhedral Model Applications Memory Hierarchy Optimization Compiler Techniques for Data Locality Olivry's work addresses fundamental challenges in optimizing memory access patterns in nested loop programs, with significant implications for high-performance computing and compiler design. The research develops formal methods to automatically derive bounds on data movement and I/O complexity, helping establish theoretical limits for program optimization. Recent publications demonstrate expertise in creating analytical frameworks that characterize data movement requirements in programs with affine loop structures and array accesses, contributing to the theoretical foundations of compiler optimization.

Fabrice RastelloView profile

Researcher

• Automatic Parallelization
• Compiler Back-End Optimization
• Static Single Assignment (SSA)
• +4 more

Fabrice Rastello is a leading researcher at Inria, France, where he serves as the leader of the CORSE (Compiler Optimization and Runtime SystEms) research team. His expertise spans automatic parallelization and compiler back-end optimization, with significant contributions to Static Single Assignment (SSA) form theory and register allocation techniques. Affiliated with University Grenoble Alpes - Inria - CNRS - Grenoble INP - LIG, he maintains an active research profile with continuous publications in top-tier conferences including PLDI, CGO, and PPoPP. His research interests focus on combining theoretical foundations with practical applications in compiler design. Key areas include automatic parallelization techniques (building on his PhD work on tiling as a loop transformation), compiler back-end optimization, and the emerging field of hybrid compilation that bridges static compilation with runtime techniques. He has made significant contributions to register allocation for JIT compilation in the context of SSA properties, advising three PhD students on related topics. Analysis of his recent publications reveals a strong trend toward data movement optimization, with numerous papers on I/O complexity bounds, cache modeling, and microarchitectural performance analysis. His work spans both theoretical computer science and practical applications, including contributions to healthcare technology during the pandemic with the eSpiro ventilator project. He has also explored intersections between compiler techniques and machine learning, particularly in using ML for performance modeling. Fabrice Rastello serves on program committees for major conferences in the field, including PLDI, CGO, and CC, demonstrating his standing in the research community. His 2022 book 'SSA-based Compiler Design' as editor further establishes his authority in compiler theory and practice. His recent work shows continued innovation in compiler techniques, with publications in 2024 demonstrating ongoing research activity across multiple domains including cache modeling, program analysis, and machine learning applications.

John D. GarofalakisView profile

Professor

• Performance Modeling
• Web Technologies and Systems
• Distributed Systems
• +7 more

John D. Garofalakis is a Professor at the University of Patras , Greece, within the Department of Computer Engineering and Informatics . He also serves as the Vice President of the Computer Technology Institute and Press "Diophantus" (CTI) . His expertise spans performance modeling , web technologies , distributed systems , mobile computing , and semantic web . Education: Diploma in Electrical Engineering, National Technical University of Athens, 1983 Ph.D. in Computer Engineering and Informatics, University of Patras, 1990 Research Interests: His research focuses on performance modeling of computer systems , particularly multistage interconnection networks and multicast traffic . He has contributed significantly to web technologies , including web optimization , semantic analysis of web usage , and personalized web search . In mobile computing , his work includes Bluetooth-based indoor positioning , context-aware mobile applications , and mobile commerce systems . He has also explored e-learning technologies , developing intelligent tutoring systems and adaptive virtual learning environments. Scientific Awards: Best Paper Award at the IEEE International Conference on Big Knowledge (ICBK 2017) Best Paper Award at the 14th European Conference on Ambient Intelligence (AmI 2018) Research Contributions and Labs: He has published extensively in top-tier journals and conferences, with over 100 peer-reviewed papers and book chapters. His work on web search personalization and mobile user positioning has been influential. He leads research teams in ubiquitous computing and web engineering , fostering interdisciplinary collaborations in smart environments and digital divide solutions .

Xenofontas DimitropoulosView profile

Associate Professor

• Internet Measurements
• Software Defined Networks
• Wireless Networks
• +3 more

Xenofontas Dimitropoulos is an Associate Professor at the University of Crete's Computer Science Department and Affiliated Researcher at Foundation for Research and Technology Hellas (FORTH), where he leads the INSPIRE research group focusing on Internet security, privacy, and intelligence. His research examines software defined networks, Internet measurements, and cybersecurity frameworks. Education: PhD in Electrical and Computer Engineering, Georgia Institute of Technology (2006) MSc in Electrical and Computer Engineering, Georgia Institute of Technology (2002) BS in Physics, Aristotle University of Thessaloniki (2001) His research focuses on developing novel approaches to Internet routing security, privacy-preserving network monitoring, and SDN-based infrastructure optimization. Recent work explores BGP hijacking mitigation, IXP architectures, and mobile edge caching systems. Publications demonstrate consistent focus on network security and Internet measurements, with recent studies concentrating on practical solutions for routing vulnerabilities, colocation facility disruptions, and mobile edge computing optimizations. Earlier foundational work established privacy-preserving computation frameworks for multi-domain networks. Scientific Awards: ERC Proof of Concept Grants (2018, 2019) IEEE Security Symposium Best Paper Award (2013) ACM CoNEXT General Chair (2018) Marie Curie Reintegration Grant (2007) Fulbright Fellowship (2001) Research Leadership: Directs the INSPIRE research group with over 15 members including postdocs, PhD students, and research engineers. Secured €1.41M ERC Starting Grant for innovative Internet routing research. Current projects include RAVEN (BGP vulnerability assessment) and PHILOS (hijacking detection system).

Polyvios PratikakisView profile

Associate Professor

• Parallel Programming
• Distributed Systems
• Programming Languages
• +2 more

Polyvios Pratikakis is Associate Professor in the Computer Science Department at University of Crete and Visiting Researcher at FORTH-ICS. Research develops tools for parallel/distributed software execution, focusing on programming languages, runtimes, and static analysis for modern hardware. Current projects include EuroEXA (programming models for exascale applications) and ETAK (earthquake simulation deployment in cloud environments). Past projects include ASAP (big data workflows), Myrmics/BDDT/PARTEE (task-parallel runtimes), and GreenVM (JVM for non-cache-coherent architectures). Additional research examines software fault tolerance and static analysis for parallel programs. Teaching includes undergraduate/graduate courses on Parallel Programming, Type Systems, Multicore Programming, and Computer Science fundamentals. Supervises multiple MSc/PhD students in compiler design, runtime systems, and social network analytics. Service includes program committees (EuroPar, CF), HiPEAC organization, and faculty committees at University of Crete.

Aristides EfthymiouView profile

Assistant Professor

• Microarchitecture of Computer Systems
• Digital Systems Design
• VLSI Circuits
• +2 more

Aristides Efthymiou is an Assistant Professor at the Department of Computer Engineering and Informatics, University of Ioannina. He holds a PhD from the University of Manchester (2002) and has held academic positions at the University of Edinburgh (2004–2011) and research roles at the Institute of Microelectronics, National Center for Scientific Research 'Demokritos,' and Integrated Systems Development SA. His research focuses on microarchitecture, digital systems design, and VLSI circuits. Education: Bachelor's and postgraduate diploma in Computer Science, University of Crete (1993–1995) PhD in Computer Science, University of Manchester (2002) Research interests include approximate computing, visible light communications (VLC), and energy-efficient circuit design. He is a member of the VLSI Systems and Computer Architecture Laboratory (VCAS), contributing to projects like the Artemis Program on supply chain traceability. His work spans over 25 international publications, emphasizing hardware optimization and signal processing in VLC systems. Awards: None explicitly mentioned. Lab and Team: Leads the VCAS lab, collaborating with faculty members like Professors George Tsiatouchas and Chrysovalantis Kavousianos. Supervises doctoral candidates in areas like approximate multipliers and VLC systems.

Yannis KotidisView profile

Professor

• Data Management
• Sensor Networks
• Complex Event Processing
• +4 more

Yannis Kotidis is a Professor at the Department of Informatics of the Athens University of Economics and Business (AUEB). He holds a Diploma in Electrical Engineering and Computer Science from the National Technical University of Athens (1995), and an M.Sc. (1997) and Ph.D. (2000) in Computer Science from the University of Maryland. Prior to joining AUEB, he worked as a Senior Technical Specialist at AT&T Labs-Research (1995–2006). Research Interests: Data Management, Sensor Networks, Complex Event Processing, Blockchain Technology, Time Series Analysis, and Distributed Systems. Projects: Led initiatives like DBSENSE (sensor network data management), RECOST (real-time stream processing), and INFORE (cross-platform analytics). Collaborated on Smart-Views (blockchain-based OLAP systems) and EasyFlinkCEP (streaming analytics). Recent publications focus on HPC resource allocation (RATS), time-series compression (Chimp/Sim-Piece), and decentralized data management using blockchain. His work emphasizes scalable solutions for big data challenges in distributed and sensor environments. Collaborations include teams at Siemens and Statoil, and academic partnerships addressing semantic data integration. He contributes to open-source tools like FlinkCEP, enhancing accessibility of big data analytics.

Pelekis ChristosView profile

Assistant Professor

• Game Theory
• Probability Theory
• Combinatorics
• +3 more

Christos Pelekis is an Assistant Professor in the Department of Mathematics at Aristotle University of Thessaloniki. He holds a PhD in Mathematics from Delft University of Technology (2014), focusing on Probability and Game Theory with a thesis titled Search Games on Hypergraphs . His academic journey includes postdoctoral research at institutions like the Czech Academy of Sciences, KU Leuven, and NTUA. His research interests span Game Theory, Probability Theory, Combinatorics, Discrete Mathematics, Measure Theory, and Optimization. Education: PhD in Mathematics (Delft University of Technology, 2014), Master's in Applied Mathematical Sciences (NTUA, 2008), and a Bachelor's in Mathematics (University of Crete, 2005). Research focuses on probabilistic methods in combinatorics, game-theoretic models for resource allocation, and optimization in networked systems. Notable work includes contributions to search games, concentration inequalities, and distributed network algorithms. His publications address topics ranging from Turán-type theorems to 5G wireless power allocation using game theory. Professional experience includes roles at The American College of Greece – Deree (2022–2023) and postdoctoral positions at NTUA (2020–2023), the Czech Academy of Sciences (2017–2019), and KU Leuven (2014–2016). Key research trends in his articles include applying game theory to network optimization, analyzing probabilistic inequalities, and exploring combinatorial structures in Euclidean geometry. His work bridges theoretical foundations with practical applications in telecommunications and distributed systems.

Foivos ZakkakView profile

Researcher

• Process Virtual Machines
• Managed Runtime Systems
• Garbage Collection Systems
• +3 more

Foivos Zakkak is a Software Engineer at Red Hat’s Java platform team, focusing on Mandrel, GraalVM, and Quarkus. Previously, he held academic roles including Research Associate and Research Software Engineer at the Advanced Processor Technologies (APT) group at the University of Manchester, and Postdoctoral Researcher at the Computer Architecture and VLSI Systems Laboratory (CARV) of FORTH-ICS. He holds a PhD, MSc, and BSc in Computer Science from the University of Crete. His research interests center around Process Virtual Machines, Managed Runtime Systems, Garbage Collection, and Systems Software. Key projects include leading the Maxine VM (a metacircular Java-in-Java VM), developing DiSquawk (a JVM for non-cache-coherent architectures), and contributions to task-based runtime systems like TPC, BDDT, and PARTEE. His work spans optimizing managed applications for NUMA architectures and reducing memory pressure in big data frameworks. Publications include studies on NUMA system performance, memory analysis of Java benchmarks, and JIT compilation on ARM architectures. His technical expertise extends to system software development and performance engineering.

Tobias GrosserView profile

Associate Professor

• Compilers
• Programming Language Design
• Performance Programming
• +8 more

Tobias Grosser is an Associate Professor in the Department of Computer Science and Technology at the University of Cambridge. His research focuses on compiler technology, programming language design, and performance programming, with applications spanning hardware design, climate science, and quantum computing. He leads a research group developing innovative compiler frameworks and tools that bridge theoretical foundations with practical applications. Dr. Grosser completed his undergraduate studies in Computer Science at the University of Passau in Germany and pursued his PhD at École Normale Supérieure Paris as a Google PhD Fellow. Prior to joining Cambridge, he served as a Reader at the University of Edinburgh and held an Ambizione Fellowship at ETH Zurich. His research program centers on rethinking performance programming by re-connecting developers and compilers. He aims to make compilation more modular, predictable, automatic, and trustworthy while bringing open-source compiler innovation to increasingly diverse targets from GPUs to FPGAs and custom hardware. His work spans multiple domains including polyhedral compilation, constraint solving, quantum computing, and hardware design automation. Dr. Grosser is particularly interested in breaking down barriers between compilers and programmers by enabling their interaction through the programming language environment. His recent publications demonstrate a strong focus on compiler infrastructure development, particularly around the MLIR framework. He has pioneered work on Presburger arithmetic optimization with the FPL library, developed new intermediate representations for hardware description and quantum computing, and created tools for compiler education and prototyping like xDSL. His research shows a consistent theme of creating practical, high-performance compiler technologies that address real-world challenges across multiple domains. HiPEAC Technology Transfer Award 2021 for "Fast linear programming through transprecision computing on small and sparse data" OOPSLA 2021 Distinguished Paper Award for "FPL: Fast Presburger arithmetic through transprecision" Dr. Grosser actively mentors PhD students and postdoctoral researchers, currently supervising a team of over a dozen researchers working on various aspects of compiler technology. His group collaborates with industry partners including ARM and Xilinx, and maintains strong ties with the LLVM and MLIR open-source communities. He has secured funding for multiple research projects including work on verified compilation with Lean-MLIR, quantum compiler development, and hardware design automation. His research group operates at the intersection of multiple projects including Open-Source Electronic Design Automation, Seamless design of Smart Edge Processors, Lean-MLIR for verified compilation, FPL for fast Presburger arithmetic, and compilation frameworks for quantum computers. They maintain strong community engagement through regular Compiler Social events in Cambridge and active participation in LLVM developer meetings.

• Compilers
• Computer Architecture
• High-Performance Storage
• +5 more

Mahmut Taylan Kandemir is a Professor in the Department of Computer Science at Pennsylvania State University. His research spans optimizing compilers, runtime systems, embedded systems, I/O, high-performance storage, and power-aware computing. He leads the Microsystems Design Lab and collaborates with institutions like Argonne National Lab, Microsoft, and Intel. Education: B.S. Computer Engineering, Istanbul Technical University (1988) M.S. Computer Engineering, Istanbul Technical University (1992) Ph.D. Computer Science, Syracuse University (1999) Research Focus: Dr. Kandemir's work integrates hardware-software co-design to address challenges in multi-core architectures, non-volatile memory systems, and energy efficiency. His recent projects explore 3D NAND flash optimization, near-data computing, and reliability in heterogeneous systems. Key themes include reducing data movement overhead, enhancing storage longevity, and developing compiler-directed solutions for emerging hardware. Publications: His articles frequently appear in premier venues (PLDI, ASPLOS, HPCA) and emphasize memory hierarchy optimization, security, and parallelism. Trends include hardware-assisted resilience, approximate concurrency, and energy-efficient VR streaming. Awards: Premier Research Award, Penn State Engineering Society (2017) IEEE Fellow NSF CAREER Award (2000) Best Paper Awards (IPDPS 2008, ICPADS 2006) Top ACM Digital Library Download (2006) Advising & Grants: He has graduated 32 Ph.D. and 20 master's students, with 15 Ph.D. and 5 master's students currently advised. His research is funded by NSF, DARPA, DOE, and industry partners. Active projects include: NSF/OAC: Re-Engineering Galaxy for Performance (2019-2023) NSF/SHF: 3D NAND Flash Optimization (2019-2022) NSF/SPX: Heterogeneous Intermittent Accelerators (2018-2022) Labs & Teams: Leads the Microsystems Design Lab, focusing on architecture-compiler co-design. Collaborates with the Storage Systems Research Center and heterogeneous computing groups at Penn State.

Saday SadayappanView profile

Professor

• Compiler Optimization
• High-Performance Computing
• Sparse/Dense Matrix Computations
• +3 more

P. (Saday) Sadayappan is a Professor at the University of Utah's School of Computing, specializing in high-performance computing and compiler optimizations. His research focuses on performance optimization for parallel systems, particularly for tensor computations, sparse matrix operations, and machine learning workloads. He leads multiple NSF and DARPA-funded projects focused on GPU optimization, tensor computations, and scalable machine learning frameworks. Research Interests: Dr. Sadayappan's work spans compiler optimizations for high-performance systems, optimization of sparse/dense matrix/tensor computations, scalable machine learning, and algorithm-architecture co-design. His recent projects include developing performance-portable frameworks for tensor applications and optimizing data locality for scientific computing. Publication Trends: His recent publications (2020-2022) predominantly focus on GPU acceleration of machine learning workloads (especially CNNs), automated I/O complexity analysis, and optimization techniques for sparse matrix/tensor operations. Earlier work (2018-2019) established foundations in GPU code generation for tensor contractions and cache optimization. Awards and Honors: ACM SIGPLAN Most Influential PLDI Paper Award (2018) for A Practical Automatic Polyhedral Parallelizer and Locality Optimizer Active Grants and Projects: NSF: A Comprehensive Framework for Efficient, Scalable, and Performance-Portable Tensor Applications (2022-2027) NIH SBIR: Enabling next generation machine learning for large scale image analysis (2023-2025) NSF: AI Institute for Intelligent CyberInfrastructure (ICICLE) (2021-2026) NSF: Data Locality Optimization for Sparse Matrix/Tensor Computations (2020-2024) DARPA SBIR: Performance Portable Framework for Developing Graph Applications (2017-2022) Teaching: He currently teaches CS 4230/6230 (Parallel and High-Performance Computing) at the University of Utah.

Manuel SerranoView profile

Research Professor

• Programming Languages
• Web Programming
• JavaScript
• +5 more

Manuel Serrano is a Research Professor at Inria Sophia-Antipolis, France, affiliated with Université Côte d'Azur. He is a leading researcher in programming languages, specializing in web programming, JavaScript compilation, and synchronous reactive systems. His work bridges theoretical computer science with practical applications, particularly in the development of innovative programming languages and tools. Dr. Serrano's research interests focus on programming language design and implementation, with particular emphasis on web technologies. He is the creator of several influential systems including Hop (a language for multitier web programming), HipHop.js (a synchronous reactive language for JavaScript), and Bigloo (an optimizing Scheme compiler). His work addresses fundamental challenges in making web programming more structured, efficient, and reliable, while maintaining the flexibility required by modern web applications. His publication record reveals a consistent focus on improving JavaScript performance through ahead-of-time compilation techniques, exploring novel concurrency models for web applications, and developing practical tools for real-world programming challenges. His recent work shows increasing interest in applying synchronous reactive programming to interactive music systems and IoT applications, demonstrating the versatility of his language design approaches. Dr. Serrano actively contributes to the academic community through service on program committees for major conferences including PLDI, ICFP, ECOOP, and SPLASH. He has served as General Chair for Programming 2018 and Scheme 2001, and is a member of the steering committees for the Scheme and Functional Programming workshop and the Dynamic Language Symposium. He leads the INDES research team at Inria Sophia-Antipolis, which focuses on innovative programming models for distributed and ubiquitous computing. His team has developed several open-source software projects including Hop, HipHop, Bigloo, and related tools that have influenced both academic research and practical web development.