
Fabrice Rastello
Researcher · Automatic Parallelization
National and Kapodistrian University of AthensAbout
Fabrice Rastello is a leading researcher at Inria, France, where he serves as the leader of the CORSE (Compiler Optimization and Runtime SystEms) research team. His expertise spans automatic parallelization and compiler back-end optimization, with significant contributions to Static Single Assignment (SSA) form theory and register allocation techniques. Affiliated with University Grenoble Alpes - Inria - CNRS - Grenoble INP - LIG, he maintains an active research profile with continuous publications in top-tier conferences including PLDI, CGO, and PPoPP.
His research interests focus on combining theoretical foundations with practical applications in compiler design. Key areas include automatic parallelization techniques (building on his PhD work on tiling as a loop transformation), compiler back-end optimization, and the emerging field of hybrid compilation that bridges static compilation with runtime techniques. He has made significant contributions to register allocation for JIT compilation in the context of SSA properties, advising three PhD students on related topics.
Analysis of his recent publications reveals a strong trend toward data movement optimization, with numerous papers on I/O complexity bounds, cache modeling, and microarchitectural performance analysis. His work spans both theoretical computer science and practical applications, including contributions to healthcare technology during the pandemic with the eSpiro ventilator project. He has also explored intersections between compiler techniques and machine learning, particularly in using ML for performance modeling.
Fabrice Rastello serves on program committees for major conferences in the field, including PLDI, CGO, and CC, demonstrating his standing in the research community. His 2022 book 'SSA-based Compiler Design' as editor further establishes his authority in compiler theory and practice. His recent work shows continued innovation in compiler techniques, with publications in 2024 demonstrating ongoing research activity across multiple domains including cache modeling, program analysis, and machine learning applications.
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