Shreyas Sen is the Elmore Associate Professor of Electrical and Computer Engineering at Purdue University, jointly affiliated with the School of Biomedical Engineering. He directs the Center for Internet of Bodies (C-IoB) and leads the SPARC Lab, focusing on circuits/systems for secure, energy-efficient body-centric communication and biomedical applications. Education: B.E. (Jadavpur University, 2006), M.S. & Ph.D. (Georgia Tech, 2009-2011). His research spans Human Body Communication (HBC), hardware security, IoT/IoB systems, and low-power sensing. Notable innovations include Electro-Quasistatic HBC (EQS-HBC) technology, which enables covert body-wire communication with 100x lower energy than conventional methods. Research Themes: Secure communication for medical wearables Physical layer security in IoT Ultra-low-power biosensors Side-channel attack mitigation in cryptographic ICs Publications: Over 200 papers in top venues (ISSCC, DAC, CICC, HOST) with focus on HBC systems, electromagnetic security, and biomedical circuits. Recent work explores EQS-HBC privacy properties (Nature Scientific Reports, 2019) and 350x current-domain signature attenuation for AES security (ISSCC 2020). Awards: NSF CAREER Award (2020) AFOSR Young Investigator (2016) MIT TR35 India (2018) 9 Best Paper Awards Intel Outstanding Researcher (2020) He advises over 20 students and leads industry collaborations through Ixana Inc. (founded 2020), commercializing EQS-HBC technology. Current efforts include EQS-based authentication systems and radiation dosimetry wearables.
Kaiyuan Yang is an Associate Professor in the Department of Electrical and Computer Engineering at Rice University, leading the Secure and Intelligent Micro-Systems (SIMS) Lab. His research focuses on low-power integrated circuits and bioelectronic implants for applications like the Internet of Everything and medical devices. He holds a B.S. from Tsinghua University (2012) and M.S./Ph.D. degrees from the University of Michigan (2017). Research Interests: Low-power digital/analog/mixed-signal systems Bioelectronics and implantable devices Hardware security and PUF design Mixed-signal computing and emerging materials Recent work emphasizes magnetoelectric-powered implants, secure backscatter communication, and in-memory computing architectures. His publications span top venues like IEEE ISSCC, IEDM, and ACM MobiCom. Awards: 2022 NSF CAREER Award 2022 IEEE Top Picks in Hardware Security 2016 IEEE SSCS Predoctoral Achievement Award Dr. Yang serves on editorial boards for IEEE TVLSI and program committees for ISSCC/CICC. His lab develops miniature, secure, and energy-efficient systems for healthcare and IoT applications.
Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University, with a courtesy appointment in Computer Science. She leads the Stanford Accelerate research group, focusing on domain-specific hardware architectures and agile hardware-software co-design. Her work emphasizes high-performance, energy-efficient accelerators for emerging technologies. Education: B.Tech. from IIT Delhi (2011), M.S. and Ph.D. from MIT (2013/2018). Postdoctoral experience includes NVIDIA Research (2018) and Amazon Visiting Academic (2023–present). Awards include the Sloan Research Fellowship (2024), NSF CAREER Award (2023), and Terman Faculty Fellowship (2018). Research Interests: Domain-specific architectures, near-memory computing, design productivity, and machine learning acceleration. Her group develops frameworks like AHA (Agile Hardware) for efficient accelerator design and compilers. Awards: Over 10 major awards, including best paper recognitions at VLSI, MICRO, and JSSC. Active roles as Associate Editor for IEEE JSSC and Program Chair for IEEE Hot Chips (2020). Advising & Teaching: Supervises multiple PhD and MS students in hardware design, CGRAs, and ML accelerators. Teaches VLSI design courses (EE271/272/372) and oversees independent studies in embedded systems and chip design. Labs & Collaborations: Affiliated with Stanford PORTAL Center, AHA Center, and SystemX Alliance. Projects include MINOTAUR (edge AI accelerator), Amber (CGRA-based SoC), and EMBER (RRAM macros).
Prof. Dr. Günther Dissertori is a Full Professor and Rector of ETH Zurich, where he oversees teaching and academic affairs. His academic journey began at the University of Innsbruck, followed by a doctoral position at CERN, and he joined ETH Zurich as an Assistant Professor in 2001 before becoming a Full Professor in 2007. Academic Role: Full Professor of Particle Physics Institutional Leadership: Rector of ETH Zurich (since 2022) Contact: guenther.dissertori@sl.ethz.ch Research Interests: Dissertori's work spans Particle Physics and Experimental Physics , notably contributing to the CMS experiment at CERN, which was instrumental in the Higgs boson discovery. His group also developed cost-effective PET devices, leading to the spin-off Positrigo AG . Research keywords include Detector Development , Medical Imaging , and Quantum Physics . Teaching Excellence: Recognized with multiple Golden Owl awards (2005–2020) and the Credit Suisse Award for Best Teaching (2013), Dissertori is celebrated for his pedagogical impact in the Department of Particle Physics. Scientific Contributions: His publications include advancements in CMOS technology, quantum dynamics, and medical applications, reflecting interdisciplinary expertise in high-speed electronics, environmental science, and architectural history.
David Wentzloff is a Professor of Electrical Engineering and Computer Science at the University of Michigan, where he has been on faculty since 2007. He directs the Wireless Integrated Circuits and Systems (WICS) group and serves as Director of the Michigan Integrated Circuits Laboratory (MICL). Wentzloff received his B.S.E. from the University of Michigan in 1999 and his S.M. and Ph.D. from MIT in 2002 and 2007. Wentzloff's research focuses on low-power integrated circuits for wireless communication in energy-constrained and volume-constrained applications. His work spans three primary areas: Synthesizable all-digital radios and radio building blocks Wireless body sensor networks (channel modeling, radios, and antennas) Radios and interfaces for millimeter-scale computing devices His innovations have significantly reduced power consumption in wireless communication for IoT devices, impacting standards including Bluetooth, WiFi, and 5G/6G. Analysis of his publication record reveals a consistent focus on ultra-low power wireless communication, with recent work emphasizing back-channel communication techniques that achieve 500x power reduction compared to conventional approaches. His research bridges theoretical circuit design with practical applications in healthcare, industrial monitoring, and consumer electronics. Wentzloff's scientific recognition includes: 2024 University of Michigan Faculty Recognition Award NSF CAREER Award (2012) DARPA Young Faculty Award (2009) Multiple best paper awards Two-time recipient of the Eta Kappa Nu Professor of the Year Award As an educator and mentor, Wentzloff has graduated 21 doctoral students and mentored dozens of master's and undergraduate researchers. He has taught courses ranging from introductory circuits to advanced graduate topics in analog and RF design. His entrepreneurial impact includes co-founding three successful companies: Everactive (formerly PsiKick), Movellus, and CubeWorks, which commercialize technologies developed in his research lab. Wentzloff leads the WICS research group, which operates within the Michigan Integrated Circuits Laboratory. His team develops cutting-edge technologies for batteryless sensing systems, millimeter-scale computing platforms, and ultra-low power wireless communication solutions that enable the next generation of Internet of Things applications.
Gert Cauwenberghs is a Professor of Bioengineering at the University of California San Diego (UCSD), affiliated with the Jacobs School of Engineering. He co-directs the Institute for Neural Computation and holds a visiting professorship at MIT. His research focuses on neuromorphic engineering, energy-efficient neural interfaces, and wearable biosensors. Key contributions include silicon-based adaptive neural circuits, implantable neural recording systems, and in-ear biosensing devices. Education: M.Eng. in Applied Physics (University of Brussels, 1988), M.S. and Ph.D. in Electrical Engineering (Caltech, 1989–1994). Prior roles include Professorships at Johns Hopkins University and Visiting Professor at MIT. Research Interests: Biomedical integrated circuits, neuromorphic computing, brain-machine interfaces, and energy-efficient neural systems. His work bridges neuroengineering and clinical applications, emphasizing adaptive intelligence and low-power designs. Recent Work: Development of femtojoule-efficient neural chips, high-density neural interfaces, and closed-loop wearable systems. Projects include neurobench benchmarking frameworks and RRAM-based neuromorphic hardware. Awards: NSF Career Award (1997), ONR Young Investigator (1999), PECASE (2000), IEEE Distinguished Lecturer (2003–2004). Grants & Labs: Active in NIH and DoD-funded projects, co-directs the UCSD Institute for Neural Computation. Collaborates with industry on neural interface technologies. Labs/Teams: Cauwenberghs Lab at UCSD focuses on integrated neuroengineering systems, including neural recording systems and neuromorphic computing architectures.
Muhannad S. Bakir is the Dan Fielder Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology and serves as the Director of the 3D Systems Packaging Research Center. His research focuses on heterogeneous integration of microsystems, including 2.5D and 3D ICs and packaging technologies, with significant contributions to advanced cooling systems, electrical and photonic interconnects, and biosensor integration with CMOS. Dr. Bakir's research interests span heterogeneous microsystem design and integration, advanced cooling and power delivery for emerging architectures, electrical and photonic interconnect technologies, biosensor technologies, and nanofabrication. His work addresses critical challenges in next-generation electronics, enabling polylithic integration that concatenates heterogeneous ICs of various functionalities while mimicking monolithic-like densities. His research particularly focuses on co-design of thermal technologies, power delivery networks, and signaling networks for silicon nanoelectronic systems. His recent publications demonstrate strong trends in fused-silica stitch-chip technology for heterogeneous integration, with particular emphasis on RF and mm-wave applications, power delivery for AI accelerators, and thermal management solutions. His work bridges electrical engineering, materials science, and thermal management to solve critical bottlenecks in computing performance and efficiency. 2013 Intel Early Career Faculty Honor Award 2012 DARPA Young Faculty Award 2011 IEEE CPMT Society Outstanding Young Engineer Award 2012 National Academy of Engineering Frontiers of Engineering Symposium Invited Participant 2015 IEEE CPMT Society Distinguished Lecturer 2014 Best Paper of the IEEE Transactions on Components Packaging and Manufacturing Technology More than 25 conference and student paper awards Twelve issued US Patents Dr. Bakir leads the Integrated 3D Systems Lab (I3DS) at Georgia Tech, which is actively researching advanced packaging, interconnects, electrical and thermal design, and system integration. His team has received significant recognition for their work, including multiple best paper awards from major conferences like ECTC, IITC, and CICC. The lab is currently seeking postdoctoral researchers and research faculty to advance next-generation electronics through collaborative research. His lab focuses on enabling the next phase of Moore's Law through polylithic integration, which concatenates heterogeneous ICs of various functionalities (digital, analog, photonic, and mm-wave) using advanced off-chip '2.5D' and '3D' heterogeneous interconnects and packaging. This work impacts applications in high-performance computing, machine learning, edge intelligence, autonomous vehicles, augmented/virtual reality, and healthcare.
Sumeet Kumar Gupta is an Associate Professor in the Department of Electrical and Computer Engineering at Purdue University. His academic career spans from his current role to a prior Assistant Professorship at Pennsylvania State University (2014-2017) and an engineering position at Qualcomm Inc. (2012-2014). He holds a PhD in Electrical and Computer Engineering from Purdue University (2012), an M.S. from the same institution (2008), and a B.Tech in Electrical Engineering from IIT Delhi (2006). B.Tech, Electrical Engineering, IIT Delhi (2006) M.S., Electrical and Computer Engineering, Purdue University (2008) PhD, Electrical and Computer Engineering, Purdue University (2012) Dr. Gupta's research focuses on neuromorphic computing, low power variation-aware VLSI design in emerging nanotechnologies, device-circuit co-design, and nano-scale device modeling/simulations. His work addresses challenges in ferroelectric materials, crossbar arrays for deep neural networks, and energy-efficient AI hardware. Recent publications (2025-2024) highlight trends in: Ferroelectric HfO2/HZO thin films Compute-in-memory architectures Variability/stochasticity analysis Machine learning for device optimization Interconnect resistance/temperature effects AI hardware fault tolerance Scientific Awards & Recognitions: DARPA Young Faculty Award (2016) Early Career Professorship, Penn State (2014) 6th TSMC Outstanding Student Research Bronze Award (2012) Magoon Award (Purdue) Outstanding Teaching Assistant Award (Purdue, 2007) Intel PhD Fellowship (2009) His professional journey includes academic appointments at Purdue University (2020-present, Associate Professor) and Pennsylvania State University (2014-2017, Assistant Professor) after industry experience at Qualcomm Inc. (2012-2014). He maintains IEEE and EDS membership while publishing over 100 refereed works.
Giacomo Indiveri is a dual Professor at the Faculty of Science of the University of Zurich and the Department of Information Technology and Electrical Engineering of ETH Zurich . He serves as the Director of the Institute of Neuroinformatics at both institutions. Indiveri holds an M.Sc. in Electrical Engineering (1992) from the University of Genoa and a Ph.D. in Computer Science (2004) from the same university. Primary Affiliation: University of Zurich (Faculty of Science, Institute of Neuroinformatics) Secondary Affiliation: ETH Zurich (Department of Information Technology and Electrical Engineering) Indiveri's research bridges neuroscience , computer science , and machine learning to develop neuromorphic cognitive systems . His work focuses on spike-based learning , recurrent neural networks , and analog/digital circuit design for real-time sensory-motor systems . He integrates emerging memory technologies into fault-tolerant event-based architectures, enabling brain-inspired computing paradigms in applications like robotics and medical monitoring. His recent publications emphasize neuromorphic hardware for epileptic seizure detection , spiking neural networks in robotic painting , and scalable processors with on-chip learning . These works explore biologically plausible neurons , delay lines , and memory arrays for temporal processing, with applications in healthcare , edge computing , and adaptive control . Scientific Awards & Recognitions: 2021 IEEE Biomedical Circuits and Systems Best Paper Award Senior Member of IEEE Society ERC Fellow with three European Research Council grants Indiveri's group at the Institute of Neuroinformatics develops event-based systems for real-world validation of brain-inspired computing. His work includes multi-core processors , feedback optimizers , and dynamic routing architectures , supported by grants for advancing neuromorphic technologies .
Di Zhu is a Presidential Young Professor in the Department of Materials Science and Engineering at the National University of Singapore (NUS). He holds a B.Eng. from Nanyang Technological University and M.Sc./Ph.D. from MIT, both in Electrical Engineering. His postdoctoral research at Harvard focused on lithium niobate integrated photonics and superconducting detectors. He previously worked as a research scientist and PI at A*STAR's Institute of Materials Research and Engineering (IMRE). Research Interests : Integrated quantum photonics, superconducting detectors, nonlinear optics, and nanofabrication. His group develops scalable quantum photonic devices using lithium niobate and superconducting materials, emphasizing applications in quantum computing, communication, and sensing. Awards : National Research Foundation (NRF) Fellowship Harvard Quantum Initiative (HQI) Postdoctoral Fellowship MIT Jin-Au Kong Thesis Award Advising & Recruitment : Actively recruiting postdocs, PhD students, and interns in areas like integrated photonics, quantum optics, and superconducting detectors. Positions include work on thin-film lithium niobate, quantum simulation, and microwave-optical transduction. Group website: dizhulab.org .
University of Illinois Urbana-ChampaignUnited States
Naresh R. Shanbhag is the Jack Kilby Professor in the Department of Electrical and Computer Engineering and the Coordinated Science Laboratory at the University of Illinois at Urbana-Champaign. He serves as Director of the Systems on Nanoscale Information fabriCs (SONIC) Center and held the D.J. Gandhi Distinguished Visiting Professorship at IIT Mumbai from 2015-2020. Previously, he was a visiting faculty member at National Taiwan University (2007) and Stanford University (2014). Dr. Shanbhag received his doctorate from the University of Minnesota (1993) in Electrical Engineering. From 1993 to 1995, he worked at AT&T Bell Laboratories as the lead chip architect for AT&T's 51.84 Mb/s transceiver chips over twisted-pair wiring for Asynchronous Transfer Mode (ATM)-LAN and very high-speed digital subscriber line (VDSL) chip-sets. His research focuses on the design of energy-efficient machine learning, communications, and signal processing systems on resource-constrained embedded platforms. He explores fundamental trade-offs between energy efficiency, latency and accuracy of decision-making systems implemented in nanoscale technologies, with applications to computer vision, biomedicine, automatic target recognition, and imaging. His work spans four primary focus areas: Resource-efficient Machine Learning for the Edge, In-memory Computing (IMC), Energy-efficient High Data Rate Communications, and Shannon-inspired Statistical Error Compensation (SEC). Analysis of his recent publications reveals a strong emphasis on in-memory computing architectures (SRAM, MRAM, RRAM) for machine learning acceleration. His work consistently addresses energy-accuracy trade-offs, with increasing attention to security aspects of hardware implementations and applications to MIMO signal processing and edge AI systems. His research demonstrates a progression from theoretical foundations to practical silicon implementations. 2024 Semiconductor Research Corporation Innovation Award 2018 Semiconductor Industry Association/Semiconductor Research Corporation University Researcher Award 2018 IEEE International Symposium on Circuits and Systems Best Paper Award 2006 IEEE Fellow 1996 National Science Foundation CAREER Award Professor Shanbhag has mentored over 50 graduate students who now work at leading technology companies including Qualcomm, Amazon, Nvidia, Intel, and Apple. His research has been generously supported by the National Science Foundation, DARPA, AFRL, Semiconductor Research Corporation, Texas Instruments, Sandia National Laboratories, and industry partners including IBM, GlobalFoundries, and Intel Corporation. He led the Alternative Computational Models research theme (2006-2012) and was the founding Director of the SONIC Center (2013-2017), a 5-year multi-university center funded by DARPA and SRC. Currently, he leads research themes in the SRC and DARPA funded JUMP 2.0 Program's Center for Co-Design of Cognitive Systems and the Center for Ubiquitous Connectivity, and in the NSF IUCRC Center for Advanced Semiconductor Chips with Accelerated Performance (ASAP). As Director of the Systems on Nanoscale Information fabriCs (SONIC) Center, Professor Shanbhag leads a multidisciplinary team exploring novel computing paradigms for the nanoscale era. His group has benchmarked an extensive collection of in-memory computing and digital accelerator IC designs, maintaining a publicly available IMC benchmarking repository of metrics extracted from published IC prototypes. His research philosophy integrates concepts from information theory, statistical signal processing, detection and estimation, VLSI architectures, and digital and analog integrated circuits to develop energy-efficient systems from algorithms to silicon implementations.
Massachusetts Institute of TechnologyUnited States
Anantha Chandrakasan is the Vannevar Bush Professor of Electrical Engineering and Computer Science at MIT, serving as Dean of the MIT School of Engineering and Chief Innovation and Strategy Officer. His research focuses on energy-efficient integrated circuits, medical devices, and AI hardware security. He leads the MIT Energy-Efficient Circuits and Systems Group, developing systems for biomedical applications, wireless communication, and quantum computing. He holds appointments at MIT's Microsystems Technology Laboratories and has contributed to collaborations like the MIT-Takeda Program in AI-driven healthcare and a partnership with GlobalFoundries for energy-efficient AI chips. His work spans implantable drug delivery systems, conformable ultrasound patches, and secure edge computing architectures. Chandrakasan's innovations include ultra-low-power circuits for IoT devices, cryptographic processors for post-quantum security, and AI accelerators for edge applications. He emphasizes interdisciplinary research bridging electrical engineering with biomedical and quantum fields, supported by leadership roles in MIT's strategic initiatives. His contributions to energy-efficient computing have led to advancements in wearable health monitors, batteryless sensors, and secure communication protocols for medical devices. Ongoing projects include THz integrated systems and AI-enhanced analog circuit design optimization.
Morteza Fayazi is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Utah, with an adjunct position in the Kahlert School of Computing. His research focuses on Electronic Design Automation (EDA), applying machine learning to automate analog and mixed-signal circuit design, and developing high-performance computing systems. He holds a B.Sc. from Sharif University of Technology, and M.S.E./Ph.D. degrees from the University of Michigan. His research interests include AI-driven EDA, RF/circuit automation, and energy-efficient processors. Key achievements include the MEDAL lab’s work on terahertz radars, systolic-array processors (e.g., DAP and Versa), and open-source frameworks like FASCINET and Tablext. He has received awards such as the 2024 College of Engineering Dean’s ETR Fund and the 2017 Outstanding Undergraduate Thesis Award. Teaching responsibilities include multiple iterations of the Digital System Design course (ECE/CS 3700). His work spans over 15 peer-reviewed articles in IEEE Transactions, ACM, and top conferences like ICCAD and VLSI-SOC, emphasizing automation, efficiency, and AI integration in hardware design.
Shiyu Su is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. His research focuses on high-speed data converters, wireless transceivers, digital phase-locked loops (PLL), and AI-assisted analog/mixed-signal design automation. He holds a Ph.D. from the University of Southern California (2019) and teaches courses such as ECE 340 (Electronic Circuits 2) and ECE 432 (Radio Frequency Integrated Devices and Circuits). Education: B.S. from Beijing University of Post and Telecommunication (China) and Queen Mary, University of London (UK), 2011; M.S. and Ph.D. from USC, 2013 and 2019, all in electrical engineering. Research Interests: High-speed ADCs/DACs RF/mm-wave transceivers Time-approximation filters (TAF) Analog/mixed-signal design automation Memristor-based computing Biomedical interfaces Key Awards: IEEE SSCS Predoctoral Achievement Award (2017–2018) Best Student Paper Award at IEEE RFIC (2022) Ming Hsieh Institute Scholar (2019–2020) Lab Focus: The Shiyu Su Lab develops integrated circuits for communications, sensing, and computing, with a focus on AI-driven methodologies and digital-analog co-design. Collaborations include work with Prof. Wei Wu (USC) on memristor-based systems.
Paul Prucnal is a Professor of Electrical and Computer Engineering at Princeton University, affiliated with the Princeton Materials Institute (PMI). He leads the Lightwave Communications Research Lab, focusing on ultrafast optical techniques for communication networks and neuromorphic photonics. His research spans optical security, CDMA networks, nonlinear signal processing, and photonic neurons. Education: Ph.D., Columbia University (1979) M.Phil., Columbia University (1978) M.S., Electrical Engineering, Columbia University (1976) A.B., Bowdoin College, summa cum laude (1974) Research Interests: Optical Network Security (eavesdropping/jamming countermeasures) Optical CDMA for broadband networks Silicon photonic neuromorphic computing RF interference cancellation in wireless systems Photonic spiking neurons mimicking biological organisms Awards: National Academy of Inventors Fellow (2017) 10+ teaching awards including Princeton's President's Award (2015) OSA/IEEE Fellowships (1992, 1997) Labs/Teams: Leads the Lightwave Communications Lab, collaborating with government/industry partners. Lab alumni like Prof. Bhavin Shastri have achieved international recognition. Grants/Publications: Over 350 journal papers, 22 U.S. patents. Authored/co-authored Neuromorphic Photonics (2017) and edited Optical Code Division Multiple Access (2019). Current projects include photonic tensor processors and real-time RF signal processing.
