Find Academic Supervisors

Miljana L. MilićView profile

Professor

• Electronics
• VLSI Design
• Analog and Digital Circuit Diagnosis
• +7 more

Miljana L. Milić is a Full Professor at the Faculty of Electronics, University of Niš, Serbia, Department of Electronics. She has been an integral part of this institution since earning her degrees and advancing through academic ranks, culminating in her appointment as full professor in 2024. Education: PhD in Electronics, Faculty of Electronics, University of Niš (2009) Master’s in Electronics, Faculty of Electronics, University of Niš (2005) Bachelor’s in Electronics, Faculty of Electronics, University of Niš (2001) Her research interests span a broad spectrum of electronics engineering, with emphasis on VLSI design, analog and digital circuit diagnosis, cryptographic hardware security, timing analysis under aging, and performance optimization in neural prediction systems. She applies simulation, statistical methods, and AI techniques to solve complex problems in electronic systems design and reliability. The analysis of her recent publications reveals a strong focus on hardware-level innovation, including secure cryptographic cells, fault diagnosis in analog circuits, performance modeling under fading and shadowing, and timing degradation in VLSI systems. Her work bridges theoretical analysis with practical implementation in electronic design and communication systems. She leads the Laboratory for Design of Electronic Processes, Circuits and Automatic Control Systems, and is currently involved in one national research project. Her contributions include over 10 journal publications in high-impact venues. Scientific Contributions: Head of Laboratory for Design of Electronic Processes, Circuits and Automatic Control Systems Active participant in national research projects Author/co-author of 10+ journal papers with impact factor She mentors students through research supervision and contributes to academic leadership within her department. Her work continues to influence both academic research and practical applications in electronic systems engineering.

Seyed Armin TajalliView profile

Visiting Professor

• Ultra Low Power Circuits
• Analog/Mixed-Signal Circuits
• Data Converters
• +6 more

Seyed Armin Tajalli is a Visiting Professor at the École polytechnique fédérale de Lausanne (EPFL), affiliated with the School of Engineering (STI), Institute of Electrical Engineering (IEM), and Integrated Neurotechnologies Laboratory (INL). He has extensive experience in ultra-low power integrated circuit design and high-speed serial communication systems. Dr. Tajalli received his B.S.E.E. and M.S.E.E. degrees (with honors) from Sharif University of Technology, Tehran, and Tehran Polytechnic University in 1997 and 1999, respectively. He earned his Ph.D.E.E. on low-power integrated circuit design techniques in 2010 from EPFL. Prior to his academic career, he worked with Emad Semicon from 1998-2006 as a senior analog/RF design engineer and technical manager. His research focuses on ultra-low power circuit design, including subthreshold source-coupled logic, analog/mixed-signal circuits, data converters, and serial data transceivers. His work addresses critical challenges in low-power design, high-speed communication, and energy-efficient circuit implementations. Recent publications demonstrate his expertise in spectrum shaping techniques, crosstalk reduction, and high-speed serial links for memory interfaces and multi-drop communication systems. Dr. Tajalli's publications span high-impact journals and conferences including IEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits and Systems, and major conferences like ISSCC, ISCAS, and VLSI Symposium. His research demonstrates consistent innovation in low-power circuit techniques with practical applications in high-speed communication systems. Kharazmi Award on Research and Development, 2000 Outstanding Design Engineer, Emad Semicon, 2001 Presidential Award of the best Iranian researchers, 2003 ACM/CICC Award, 2009 EPFL Prime Special Award, 2009 Dr. Tajalli has advised PhD students including Kiarash Gharibdoust, whose thesis focused on Hybrid NRZ/Multi-Tone Signaling for High-Speed Low-Power Wireline Transceivers. His collaborative work with the ALGO team has resulted in significant contributions to high-speed serial data transceiver architectures. His research has been supported by various academic and industrial partnerships focused on advancing integrated circuit design techniques. His work is primarily conducted within EPFL's Integrated Neurotechnologies Laboratory (INL) and previously with the Microelectronic Systems Laboratory (LSM). These labs provide state-of-the-art facilities for mixed-signal IC design, characterization, and testing, supporting his research in ultra-low power circuits and high-speed communication systems.

Becker BerndView profile

Professor

• VLSI CAD
• Computer-Aided Design
• Digital Circuits and Systems Verification
• +4 more

Bernd Becker is a Professor of Computer Science at the University of Freiburg, where he has led the Chair of Computer Architecture until 2021. He previously served as Dean of the Faculty of Engineering (2010–2012) and held roles at institutions like the University of Tokyo (Visiting Professor, 2009/2010) and J.W. Goethe University Frankfurt (Professor of Complexity Theory, 1989–1995). His research focuses on VLSI CAD, algorithm optimization for circuit testing, and reliability of embedded systems. He has authored over 350 peer-reviewed publications and holds patents in VLSI design. Education: He earned his PhD in Computer Science from the University of Saarland (1982) and completed Habilitation (1988) under Prof. G. Hotz. His doctoral thesis addressed graph embedding, while his habilitation focused on Boolean circuit design and testing. Research Interests: Becker specializes in symbolic methods for circuit verification, formal safety protocols, and nanoelectronics testing. His work bridges academic and industrial applications, emphasizing efficient algorithms for CAD tools. Recent projects include reliability frameworks for embedded systems and advanced test methodologies for emerging nanoelectronics. Awards: Recognized as an IEEE Fellow (2008), he has received multiple teaching awards (2012–2013) and the EDA Medal (2021). He actively contributes to academic governance, serving on steering committees for conferences like DATE and ETS, and co-led the Transregional Collaborative Research Center AVACS (2003–2015). Professional Roles: He has been a member of the Scientific Directorate at Schloss Dagstuhl (2011–2019), the Board of Directors for the Centre for Security and Society (since 2010), and has organized major international symposia including ISMVL 1999 and ETS 2007.

• Hardware Security
• Machine Learning for Security
• VLSI Design
• +7 more

Sai Manoj Pudukotai Dinakarrao is a Professor in the Department of Computer Engineering at Rochester Institute of Technology's College of Engineering. He is an active researcher with numerous publications spanning hardware security, machine learning applications, VLSI design, and IoT security. His work focuses on developing innovative solutions for security challenges in hardware and embedded systems. Dr. Dinakarrao's research interests center around hardware security, machine learning for security applications, VLSI design methodologies, and IoT security frameworks. His work has pioneered approaches to hardware Trojan detection, processing-in-memory architectures, and energy-efficient security mechanisms for resource-constrained devices. He has made significant contributions to the understanding of hardware vulnerabilities and the development of robust countermeasures. His recent publications demonstrate a clear trend toward integrating machine learning techniques with hardware security solutions, particularly focusing on processing-in-memory architectures for efficient security implementations. His work spans both theoretical foundations and practical implementations, with applications in IoT security, malware detection, and hardware verification. The research shows increasing sophistication in addressing security challenges through novel hardware-software co-design approaches. Dr. Dinakarrao has mentored numerous graduate students who have co-authored publications with him, indicating an active research group focused on cutting-edge security and hardware design topics. His collaborations span multiple institutions and research groups, demonstrating his integration within the broader academic community.

Li-C WangView profile

Professor

• Electronics Design Automation (EDA)
• Testing Technologies
• Functional Verification
• +3 more

Li-C. Wang is a Professor of Electrical and Computer Engineering (ECE) and Director of the CE program at the University of California, Santa Barbara (UCSB). He holds an IEEE Fellow distinction (2018) and specializes in Electronics Design Automation (EDA) and testing, with recent focus on functional verification and design-manufacturing convergence. His academic journey includes a PhD in ECE from the University of Texas at Austin (1996), an MS in CS (1991), and a BS in Computer Engineering from National Chiao-Tung University (1986). Positions: Professor at UCSB (2001–present), Assistant/Associate Professor at UCSB and Texas A&M, and industry roles at Motorola and AT&T Bell Labs. Awards: Over 15 major awards, including the IEEE TTTC Bob Madge Innovation Award (2017), SRC Technical Excellence Award (2010), and Qualcomm Faculty Award (2019). Service: Leadership roles in IEEE International Test Conference (ITC) as General Chair (2017–2018) and Vice Chair (2019–2020), plus editorial and committee involvement in VTS, DATE, and ICCAD. His research bridges EDA innovations with practical testing challenges, emphasizing data mining and automation. Recent work includes the IEA project, advancing methodologies for complex system validation. He has contributed to over 150 publications, with a focus on VLSI test symposiums and design automation conferences.

FERNANDO RAFAEL PARDO SECOView profile

Professor

• Electronics Engineering
• Computer Engineering
• Signal Processing
• +3 more

Fernando Rafael Pardo Seco is a Professor at the Department of Electronics and Computing, affiliated with the Higher Technical School of Engineering at the University of Santiago de Compostela. He earned his PhD in 2008 with a thesis titled Software-hardware FPGA-Based System for the solution of the 3D heat equation applications on the non-destructive evaluation of minefields , supervised by Dr. Diego Cabello Ferrer and Dr. Marco Balsi. His research focuses on FPGA-based systems, CMOS architectures, thermal modeling, image processing, and non-destructive evaluation techniques. His academic contributions span engineering education innovation, including methodologies like cooperative learning and e-learning integration. His technological work emphasizes embedded systems, hardware acceleration for numerical simulations, and safety-critical applications such as landmine detection through thermal analysis. Recent publications highlight advancements in hyperdimensional computing architectures, 3D image processing, and thermal simulation tools. His work bridges hardware-software co-design principles with real-world applications in geophysics, security systems, and industrial engineering education.

• Design for Testability
• Automatic Test Pattern Generation
• Electronic Design Automation
• +3 more

Haluk Konuk is a Visiting Professor at the Faculty of Engineering, Özyeğin University. With a PhD in Electrical Engineering from the University of California, Santa Cruz (1996), he specializes in VLSI testing, Design for Testability, and Electronic Design Automation. He worked at Hewlett-Packard/Agilent Technologies and Broadcom Corporation for over 25 years, contributing to the development of critical internet infrastructure ASICs and processors. Since 2021, he has founded Palo Alto Test Technologies, focusing on advanced testing solutions. PhD in Electrical Engineering, University of California, Santa Cruz (1996) MS in Electrical Engineering, Case Western Reserve University (1989) BS in Electrical & Electronics Engineering, Boğaziçi University (1986) His research focuses on Design for Testability (DFT), Automatic Test Pattern Generation (ATPG), and Electronic Design Automation (EDA), addressing challenges in VLSI and CMOS circuit testing. His work includes modeling open-defects, fault simulation, and optimizing test efficiency for digital circuits. Haluk Konuk's publications span test compression, delay fault testing, and fault modeling, reflecting his long-term contributions to VLSI test methodologies. He holds 9 U.S. patents and has served on IEEE conference program committees. Fulbright Scholarship 9 U.S. Patents in VLSI Test Technology

• 3D Integrated Circuits
• Hardware Security
• AI Accelerators
• +4 more

Krishnendu Chakrabarty is the Fulton Professor of Microelectronics in the School of Electrical, Computer and Energy Engineering at Arizona State University (ASU). He also serves as CTO of the SWAP Hub for the Department of Defense Microelectronics Commons and Director of the ASU Center for Semiconductor Microelectronics (ACME). Previously, he was the John Cocke Distinguished Professor and Chair of Electrical and Computer Engineering at Duke University. Education: B.Tech from IIT Kharagpur (1990), M.S.E. and Ph.D. from the University of Michigan (1992, 1995). His research focuses on 3D integrated circuits, hardware security, AI accelerators, and microfluidic biochips. He has authored 27 books, 930 peer-reviewed papers, and holds 24 patents. His work has been supported by NSF, DARPA, NIH, and industry partners like Intel and NVIDIA. Key awards include NSF CAREER Award, IEEE Technical Achievement Awards, Humboldt Research Award, and Distinguished Alumnus from IIT Kharagpur. He advises 44 PhD graduates and collaborates with industry leaders such as Synopsys and Cisco. His leadership roles include Editor-in-Chief of IEEE Transactions and Fellowships in ACM, IEEE, and AAAS. Research highlights include pioneering test methodologies for 3D ICs, developing AI-driven biochip solutions, and securing hardware against cyber-physical threats. His labs and teams focus on advancing semiconductor technology and healthcare applications through interdisciplinary innovation.

• Computer Engineering
• VLSI Design
• Fault-Tolerant Systems
• +4 more

Francesco Angione is a Research Fellow at the Department of Automatic Control and Computer Science (DAUIN) of Politecnico di Torino. He serves as an external teacher and collaborator for courses such as 'Computer architectures' and 'Architectures of processing systems' within the Computer Engineering program. His research focuses on system-level testing, automotive SoCs, FPGA-based testing solutions, and hardware-AI integration. He is affiliated with the CAD - Electronic CAD & Reliability Group at DAUIN. His work emphasizes optimizing test methodologies for automotive systems, leveraging advanced testing equipment (ATE), and developing efficient algorithms for burn-in stress and functional safety. Recent contributions include trustworthiness in hardware-AI integration, burn-in stress quantification, and FPGA-based accelerators for machine learning. Angione's publications span conferences like IEEE VLSI Test Symposium and International Symposium on Defect and Fault Tolerance, with a focus on VLSI, embedded systems, and reliability engineering. His doctoral thesis (2025) explores system-level test techniques for automotive SoCs under Professors Bernardi and Cantoro. He collaborates extensively with industry partners to bridge academic research with practical applications in automotive electronics and semiconductor testing. Key research themes include functional safety compliance, test cost reduction via novel algorithms, and integrating fault injection methods into real-time operating systems. His lab work involves designing flexible FPGA-based test equipment to address manufacturing challenges in digital systems.

• Electrical Engineering
• Analog and Mixed Signal Circuits
• Digital-to-Analog Conversion
• +6 more

Paolo Stefano Crovetti is an Associate Professor in the Department of Electronics and Telecommunications at Politecnico di Torino. He is a member of the Interdepartmental Center PEIC (Power Electronics Innovation Center) and serves on the Joint Committee for Teaching. His research and teaching focus on cutting-edge areas of electrical engineering, particularly in analog and mixed-signal circuit design for ultra-low power applications and sustainable energy systems. Dr. Crovetti's research spans digital-based analog and mixed signal circuits, digital-to-analog converters, electromagnetic compatibility, and ultra-low power and ultra-low voltage electronics. His work addresses critical challenges in power electronics for Internet of Things applications, photovoltaic systems, and sustainable energy conversion, aligning with UN Sustainable Development Goals for health, sustainable cities, and responsible consumption. His publication record demonstrates consistent innovation in circuit design, particularly in digital-based analog techniques, power optimization for renewable energy systems, and electromagnetic compatibility solutions. Key research themes include ultra-low voltage operational transconductance amplifiers, advanced digital pulse width modulation techniques, and novel approaches to power conversion for sustainable applications. IEICE Symposium Excellent Paper Award (2009) ICECS Best Student Paper Award (2019) IEEE Fellow (2020-) Dr. Crovetti actively supervises seven PhD students working on advanced topics in power electronics and integrated circuit design. He leads multiple significant research projects including MicroBioNIC (2025-2027), NEUROPULS (2023-2027), and ULPIoT (2017-2020), securing substantial funding from national and international sources. His editorial roles include serving as Associate Editor for IEEE Transactions on VLSI Systems and as Guest Editor for Electronics Letters. He is an active member of the Microwave and Optoelectronics Group (MOG) within the Department of Electronics and Telecommunications, contributing to the university's research excellence in advanced electronic systems for power conversion and sustainable energy applications.

Xavier Aragones CerveraView profile

Associate Professor

• Integrated Circuits Design
• RF Systems
• Substrate Noise Analysis
• +7 more

Xavier Aragones Cervera is an Associate Professor at the Polytechnic University of Catalonia (UPC), affiliated with the Department of Electronic Engineering (Departament d'Enginyeria Electrònica) within the School of Telecommunications Engineering of Barcelona (Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona). His research focuses on high-performance integrated circuits and systems design, particularly addressing substrate noise, RF circuit design, and aging effects in CMOS technologies. He leads the HIPICS (High Performance Integrated Circuits and Systems Design Group) and contributes to the EFRICS (Efficient and Robust Integrated Circuits and Systems) research group. Education: M.S. in Telecommunication Engineering from UPC (1993), Ph.D. in Electronic Engineering from UPC (1997). His work spans over 130 publications, including peer-reviewed articles, conference presentations, and patents. Key research areas include substrate noise analysis, RFIC design, mixed-signal systems, and reliability engineering. He has advised students such as Marc Manel Molina and Juan Felipe Osorio. Collaborations include projects funded by national and European programs, focusing on microelectronics, IoT, and next-generation semiconductor technologies. Publications highlight experimental studies on substrate noise in VCOs/PLLs, aging compensation in amplifiers, and low-power IoT designs. He has contributed to major initiatives like the Cherenkov Telescope Array and RISC-V processor development in advanced FDSOI technology. His work emphasizes bridging theoretical models with practical circuit implementations, addressing emerging challenges in nanoscale CMOS and BEYOND-CMOS technologies.

Travis BlalockView profile

Visiting Professor

• CMOS digital design
• Analog signal processing
• Low-power ADC design
• +2 more

Travis Blalock is a Visiting Professor in Electrical and Computer Engineering at the University of Virginia's School of Engineering and Applied Science. His research centers on mixed-signal CMOS VLSI design with applications in low-power systems. Primary investigations include analog/digital signal processor design, low-power analog-to-digital converters, integrated optoelectronic sensors/signal processing, and efficient architectures for human-computer interfaces. Additional interests encompass built-in self-test for analog ICs, low-voltage amplifiers, reference circuits, analog neural networks, and mixed-signal CAD techniques. His work advances energy-efficient computing solutions for embedded systems and sensor networks.

Voicu GrozaView profile

Professor

• Biomedical Measurements and Instrumentation
• Electrical Engineering
• Computer Science
• +3 more

Voicu Groza is a Professor and Associate Director at the School of Electrical Engineering and Computer Science, University of Ottawa. His research focuses on biomedical measurements and instrumentation, with particular emphasis on blood pressure estimation techniques, medical sensor design, and robotics applications. He has also contributed to signal processing, embedded systems, and educational program analytics. Research Interests: Biomedical Measurements and Instrumentation Medical Signal Processing Robotics and Haptic Systems Wireless Sensing Technologies Algorithmic Fusion in Healthcare Key Contributions: Dr. Groza's work spans innovative solutions for non-invasive blood pressure monitoring in complex clinical scenarios, advanced sensor systems for robotics applications, and energy-efficient communication protocols for embedded networks. His recent research emphasizes improving accuracy in oscillometric blood pressure estimation for patients with atrial fibrillation and other chronic conditions.

Ramesh KarriView profile

Professor

• Hardware Cybersecurity
• Trustworthy Integrated Circuits
• Cyber-Physical Systems Security
• +6 more

Ramesh Karri is a Professor and Chair of the Electrical and Computer Engineering Department at New York University Tandon School of Engineering. He co-founded the NYU Center for Cyber Security (CCS) in 2009 and co-directed it from 2016-2024. He is also a Fellow of the IEEE and has led initiatives such as the Embedded Systems Challenge (ESC), a red-blue team cybersecurity competition. Education: Ph.D. in Computer Science and Engineering, University of California, San Diego (1993) B.E. in Electrical and Computer Engineering, Andhra University (1985) Research Focus: His work centers on hardware cybersecurity, including trustworthy integrated circuits, cyber-physical systems, nano-enabled security, and biochip security. He pioneered security-aware CAD tools and has developed metrics for hardware trojan detection through initiatives like the Trust-Hub. Awards & Leadership: Recipient of the Humboldt Fellowship and NSF CAREER Award Editor-in-Chief of ACM Journal of Emerging Computing Technologies Leadership roles at IEEE conferences (ICCD, HOST, DFTS) Grants & Labs: Directs the Center for Advanced Technology in Telecommunications (CATT) and NYU CCS. His labs focus on additive manufacturing security, digital microfluidic systems, and AI-driven hardware design.

• Computer History
• Electrical Engineering
• Digital Signal Processing
• +3 more

Mark Kahrs is an Instructor at the Swanson School of Engineering, University of Pittsburgh. His research spans diverse areas including computer history, microwave measurements, digital signal processing, and audio engineering. He has contributed to historical analyses of software systems like Project Genie, RF instrumentation, and audio hardware design. Kahrs' work bridges historical computing studies with modern engineering applications, emphasizing interdisciplinary innovation. His publications span from 1980 to 2022, reflecting long-term engagement with topics such as optoelectronics, acoustic systems, and simulation methodologies. Notable contributions include studies on optoelectronic interconnects and microwave measurement techniques. Despite his extensive publication record, no awards or grants are explicitly listed in the provided texts. He has no documented advisees or students listed here. Labs/Teams: No specific labs or collaborative teams mentioned in the available data.