Subramanian Iyer

Subramanian Iyer is a Distinguished Professor at the University of California, Los Angeles (UCLA), holding the Charles P. Reames Endowed Chair in Electrical Engineering with joint appointments in Electrical and Computer Engineering and Materials Science and Engineering. His laboratory focuses on cutting-edge semiconductor research.

Primary research domains include:

• System Scaling Technology: Innovations in semiconductor miniaturization
• 3D Integration & Advanced Packaging: Techniques for vertical chip stacking and heterogeneous integration
• Memory Subsystems: Development of embedded DRAM and novel memory architectures
• Neuromorphic Computing: Hardware implementations of brain-inspired computing

Publication analysis reveals three dominant themes across 35+ years of research:

1. Semiconductor materials innovation (SiGe alloys, silicides, MBE growth)
2. Memory technology evolution (embedded DRAM, eFUSE, low-latency designs)
3. System integration advancements (3D packaging, TSV, heterogeneous integration)

Significant honors include:

• IEEE Fellow (1995) and Daniel Noble Award (2012)
• National Academy of Inventors Fellow (2017)
• IBM Fellow (2010) with 30+ invention plateaus
• IMAPS Educator Award (2021) and Daniel C. Hughes Memorial Award (2020)

He leads UCLA's NanoLab facility and has been featured in The New York Times and Wall Street Journal for pioneering chiplet technology. Current work focuses on megachip architectures and open-access semiconductor prototyping.