جست‌وجوی استاد و پژوهشگر

James Morizioمشاهده پروفایل

استاد مدعو

• Analog CMOS Microelectronics
• Neural Interfaces
• Acoustofluidics
• +۴ مورد دیگر

James Morizio serves as an Adjunct Professor in the Department of Electrical and Computer Engineering at Duke University, leveraging 35+ years of expertise in analog CMOS microelectronics for biomedical applications. His research bridges electrical engineering with neuroscience through disruptive sensor interface technologies for neural recording/stimulation and ultrasonic microfluidics. His educational background includes a Ph.D. in Electrical Engineering from Duke University (1995) M.S. in Electrical Engineering from University of Colorado, Boulder (1984) B.S. in Electrical Engineering from Virginia Polytechnic Institute and State University (1982) Morizio's research focuses on developing high-performance neural interfaces and acoustofluidic systems. Key areas include wireless neural instrumentation for closed-loop electrophysiology, CMOS-based ultrasonic transducers for microfluidic manipulation, and low-power VLSI design for implantable devices. His work emphasizes translating microelectronics innovations into biomedical solutions for neuroscience and diagnostics. His publication portfolio demonstrates consistent contributions to neural engineering and microfluidics, with recent trends showing increased focus on acoustofluidic diagnostics (e.g., AIMDx chip) and osseointegrated neural interfaces for prosthetic control. The research spans fundamental circuit design to translational applications in cancer metabolism and neuroprosthetics. Scientific recognition includes 15-year service award from Triangle BioSystems International/Harvard Bioscience Inc. (2016) Current research is supported by major grants including Neuro-CROWN (ultra-flexible electrode arrays), digital acoustofluidic systems for biomedical automation, and osseointegrated neural interfaces for prosthetic control. His teaching portfolio spans advanced VLSI design and special topics courses, though specific advising roles are not documented. Collaborative work involves interdisciplinary teams in neuroscience and biomedical engineering, particularly through partnerships with Triangle BioSystems International and translational projects using ovine models for neural interface validation.

• Trustworthy computing
• Energy harvesting
• Intelligent system design
• +۷ مورد دیگر

Youhua Shi is a full Professor in the Faculty of Science and Engineering at Waseda University, Japan. He obtained his Doctor of Engineering from Waseda in 2005 and is an active member of IEICE, IPSJ, IEEE, and two Japanese academic societies. His research portfolio integrates trustworthy computing, hardware security of AI accelerators, energy-harvesting interface circuits for triboelectric nanogenerators, and low-power VLSI design-for-test methodologies. Education: Doctor of Engineering, Waseda University (2005) Graduate studies, Waseda University, Division of Engineering (completed 2005) Research Interests: Prof. Shi pursues trustworthy and secure silicon systems, spanning hardware Trojans in automated AI-accelerator flows, radiation-hardened latch design for soft-error resilience, and power-efficient CNN accelerators exploiting zero-gating and data-reuse techniques. Parallel work targets energy-autonomous IoT through advanced interface circuits for triboelectric nanogenerators, achieving record energy-per-cycle beyond the classical CMEO limit. Publication Trends: Recent articles (2024-2025) emphasize two thrusts: (i) security of AI/FPGA accelerators—proposing stealthy hardware-Trojan frameworks embedded within design-space-exploration flows that can misclassify up to 97% of inputs—and (ii) power electronics for triboelectric harvesters—introducing dual-output rectifiers and Bennet-doubler biasing that multiply output power >150× over conventional full-wave rectifiers, enabling battery-free IoT nodes. Scientific Awards: APCCAS Best Student Paper Award – 2020 IEEK Best Paper Award – 2012 Students & Collaboration: He has mentored numerous doctoral and master’s scholars, including Yirui Su, Chao Guo, Jinghao Ye, Lin Ye, Saki Tajima, and Masaru Oya, many of whom serve as first authors on his high-impact publications, indicating an active and productive advising role. Labs & Teams: While the text does not name a specific laboratory, his continued affiliation with Waseda University’s Faculty of Science and Engineering and his extensive project output imply he leads a research group focused on secure & energy-efficient VLSI systems, collaborating closely with colleagues such as Prof. Masao Yanagisawa and Prof. Nozomu Togawa.

Damu Radhakrishnanمشاهده پروفایل

دانشیار

• Low Power Digital Architectures
• High-Performance Arithmetic Circuits
• Reversible Logic
• +۳ مورد دیگر

Damu Radhakrishnan is an Associate Professor in the Department of Computer Engineering at SUNY New Paltz. He holds a Ph.D. in Electrical Engineering from the University of Idaho, following B.Sc. and M.Tech. degrees from the University of Kerala and IIT Kanpur, India. His research focuses on low-power digital architectures, high-performance arithmetic circuits, reversible logic, and bio-medical instrumentation. He teaches courses including Introduction to Engineering Science, Digital Logic Lab, Digital Systems Design, and Senior Design Project 2. Dr. Radhakrishnan has contributed to over 20 publications since 1983, emphasizing low-power circuit design, residue arithmetic, and biomedical device development. His work spans analog-to-residue converters, fault-tolerant systems, and medical instrumentation. Key technical reports include contributions to NASA Langley Research Center and EG&G Corporation projects. His research trends reflect a sustained focus on energy-efficient digital systems, with early contributions to CMOS power optimization and later advancements in biomedical device testing. His publications demonstrate expertise in both theoretical foundations (e.g., switching theory textbooks) and applied engineering (e.g., defibrillator analyzers). Dr. Radhakrishnan maintains an active lab in Resnick Engineering Hall, where he oversees senior design projects and collaborates on interdisciplinary engineering solutions. His technical reports highlight contributions to medical simulation tools, VLSI implementation methods, and analog-digital interface design.

Naghmeh Karimiمشاهده پروفایل

دانشیار

• Hardware Security
• Design-for-Trust
• Fault Tolerance
• +۹ مورد دیگر

Naghmeh Karimi is an Associate Professor in the Department of Computer Science and Electrical Engineering at the University of Maryland Baltimore County (UMBC), where she has held this position since 2023, after serving as an Assistant Professor from 2017 to 2023. She is a recipient of the NSF CAREER Award (2020) and the Best Paper Award (2019). Her research focuses on hardware security, trustworthiness, and reliability of integrated circuits, with a particular emphasis on cryptographic devices, PUF-based authentication, and aging-related vulnerabilities. She directs the SECure, REliable and Trusted Systems (SECRETS) Lab at UMBC, which explores topics including hardware security countermeasures, fault tolerance, and AI-driven security solutions. Prior to UMBC, she was affiliated with Rutgers University, New York University, Duke University, and Yale University. Her research interests span hardware security, design-for-trust, fault tolerance, AI for security, and VLSI design. Recent work emphasizes aging effects on cryptographic circuits, PUF resilience, and digital sensor-based failure detection. Her publications address challenges in side-channel attacks, fault injection, and secure IoT frameworks. Dr. Karimi’s work is supported by sponsors, and she actively mentors Ph.D. students in hardware security and reliability. Her lab offers openings for self-motivated researchers in these areas.

• Hardware Design
• VLSI Systems
• Digital Circuit Optimization
• +۴ مورد دیگر

Rajkumar Sarma is a Research Fellow at the Department of Computer Science & Information Systems at Lero – the Research Ireland Centre for Software, University of Limerick. His work focuses on hardware design, VLSI systems, and optimization techniques for digital circuits. He specializes in areas such as low-power architectures, floating-point arithmetic, and evolutionary algorithms for automated design. His research emphasizes hardware-software co-design, reliability analysis under PVT (Process, Voltage, Temperature) variations, and efficient implementations of multiply-accumulate (MAC) units critical to digital signal processing and image processing applications. Key technical contributions include the development of the UCM algorithm for delay optimization, grammatical evolution for synthesizable HDL code generation, and novel approaches to reduce power consumption in MAC architectures. His work bridges theoretical algorithmic innovation with practical VLSI implementation challenges, addressing both performance and reliability under extreme operating conditions. Rajkumar’s publications span 2012–2025, with a strong focus on digital circuit design, including hybrid adders, low-power flip-flop implementations, and quantum gate-based reversible circuits. His research also extends to reliability analysis of electronic components like multi-layer ceramic capacitors. He has utilized advanced simulation tools such as Cadence ADE-XL for accelerated PVT analysis, demonstrating expertise in both computational modeling and hardware validation. While no specific awards or grants are listed, his extensive publication record reflects sustained engagement with cutting-edge challenges in computer architecture and VLSI systems design.

Mehrdad Nouraniمشاهده پروفایل

استاد

• Biometric signal/image processing
• Machine learning for healthcare
• VLSI/SoC design for reliability
• +۴ مورد دیگر

Dr. Mehrdad Nourani is a Professor of Electrical and Computer Engineering and Senior Associate Provost for Faculty Affairs at The University of Texas at Dallas. He leads research in healthcare technology, VLSI testing, and embedded systems through the Predictive Analytics & Technologies (PAT) Lab and Quality of Life Technology (QoLT) Laboratories. His work focuses on biometric signal processing for patient monitoring (e.g., epilepsy, diabetes, sleep apnea) and VLSI reliability in nanometer-scale circuits. Education: PhD in Computer Engineering, Case Western Reserve University (1993) M.S. & B.S. in Electrical Engineering, University of Tehran (1986 & 1984) Research Interests: Integrates machine learning with biomedical engineering for wearable healthcare devices, develops novel VLSI testing methodologies, and explores data-driven diagnostics. Key areas include artifact removal in wearable sensors, personalized analytics for pressure ulcers, and SEEG-based seizure network modeling. Advising & Grants: Supervises 6 current PhD/Master’s students. Research supported by NSF, Texas Instruments, UT Southwestern, and others. Co-founded CICS and QoLT labs fostering interdisciplinary collaboration. Labs & Teams: Directs PAT Lab and collaborates through QoLT and CICS. Projects include smart bed systems for ulcer prevention, AI-driven camera platforms for ambulation assessment, and ESD stress analysis in semiconductor devices.

• Cloud Computing
• High Performance Computer Architectures
• Parallel and Distributed Processing
• +۳ مورد دیگر

Dr. Robert K. Chun is a Professor in the Department of Computer Science at San José State University (SJSU), part of the College of Engineering. He holds a BSEE (1979), MSCS (1981), and Ph.D. (1989) from UCLA. With 20+ years in industry, he joined SJSU as a full-time faculty in 2001. His research focuses on Cloud Computing, parallel processing, high-performance architectures, and AI. He received NASA Faculty Fellowships (2002-2003) and holds a U.S. patent for real-time expert systems integration. Education: Bachelor of Science, Electrical Engineering, UCLA (1979) Master of Science, Computer Science, UCLA (1981) Doctor of Philosophy, Computer Science, UCLA (1989) Research Interests: Cloud Computing architectures and scalability High-performance computing and parallel algorithms Software engineering for distributed systems CAD tools for VLSI design verification Artificial intelligence and neural networks Publications highlight advancements in parallel processing, distributed systems, and compiler optimization. Notable works include adaptive transactional memory algorithms, wireless cluster computing frameworks, and EJB performance measurement tools. His NASA-funded research at Ames Supercomputing Center explored parallel computing applications. Advising and Grants: Advised 16 Master’s theses, including topics like dynamic clusters and intelligent debuggers Contributed to industry-university partnerships through NASA collaborations Labs/Teams: Active in SJSU’s parallel processing and computer architecture research groups, contributing to course development in advanced parallel processing and operating systems.

• Reconfigurable systems
• System reliability
• Embedded systems
• +۴ مورد دیگر

Oana AMĂRICĂI-BONCALO is a Professor at the Computer and Information Technology Department of University Politehnica Timisoara. She holds a Dr. Habil. Eng. degree and has served as Assistant Professor, Lecturer, and Associate Professor since 2009. Her research focuses on reconfigurable systems, system reliability, embedded systems, and forward error correction with FPGA applications. Education: Engineering Degree (2006) and PhD in Computer Engineering (2009), both from University Politehnica Timisoara. She was an invited researcher at University College Cork (2012) and University of Cergy-Pontoise (2016). Since 2017, she has been an Editor for Microprocessor and Microsystems (Elsevier). Research projects include GEMSCLAIM (green energy management in mobile systems). She supervises PhD student Andrei-Bogdan MIHĂILESCU. Recent publications emphasize LDPC decoding architectures, FPGA-based solutions, and reliability assessment in quantum circuits. Notable contributions include innovations in layered decoding algorithms, memory optimization for LDPC decoders, and one-hot data representation techniques. Her work intersects VLSI design, digital signal processing, and embedded systems reliability. Event organization includes a 2024 workshop on audio-video technical solutions and participation in IEEE symposiums. She contributes to academic events like the Mobile Applications Student Contest (SCMUPT).

Chongyan Guمشاهده پروفایل

مدرس ارشد

• Hardware Security
• Physical Unclonable Functions (PUFs)
• IoT Security
• +۴ مورد دیگر

Dr. Chongyan Gu is a Senior Lecturer in the School of Electronics, Electrical Engineering and Computer Science at Queen’s University Belfast, part of the Faculty of Engineering and Physical Sciences. Her research focuses on hardware security, particularly Physical Unclonable Functions (PUFs), approximate computing vulnerabilities, and IoT device security. She leads the EPSRC New Investigator Award-funded project on Hardware Security for Approximate Computing and has secured industry collaborations with LG-CNS and defense companies. Dr. Gu has received notable awards including the INVENT2015 Overall Winner and Pramod Subramanyan Presentation Award. Her research has been commercialized, such as licensing PUF technology for EV charging systems and defense applications. She collaborates internationally through EU projects with Fraunhofer and ETRI. Dr. Gu serves as an IEEE Senior Member, Guest Editor for IEEE TCAS-I, and editorial roles for conferences like IEEE ISCAS and AsianHOST. She has delivered tutorials at ASP-DAC and HiPEAC, emphasizing practical PUF design and hardware security challenges. Key technical contributions include PUF-based authentication protocols, machine learning-resistant security solutions, and vulnerability analysis in approximate computing. Her work addresses emerging threats like Rowhammer attacks and hardware Trojans, leveraging graph attention networks for detection. Recent publications highlight advancements in RRAM-based PUFs, FPGA implementations, and defense mechanisms for modern DRAM systems.

Travis N. Blalockمشاهده پروفایل

دانشیار

• Mixed-Signal VLSI Design
• Low-Power Electronics
• Integrated Optoelectronics
• +۴ مورد دیگر

Travis N. Blalock is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Virginia. His research focuses on mixed-signal CMOS VLSI design, analog signal processing, and low-power architectures for human-computer interfaces. Key interests include integrated optoelectronic sensors, low-power analog/digital converters, and mixed-signal CAD techniques. His work spans topics such as built-in self-test for analog circuits, feedback amplifiers, analog neural networks, and multi-level digital logic. Recent publications include studies on on-chip aging monitoring and energy-efficient subthreshold converters. No scientific awards or formal advisees are listed in the provided information. Contact: tnb2a@virginia.edu .

Matthias Thieleمشاهده پروفایل

پژوهشگر

• Electromigration-aware Integrated Circuit Design
• Photonic Integrated Circuits
• Mechatronic Systems Reliability
• +۴ مورد دیگر

Matthias Thiele is a Research Associate at the Institute of Precision Engineering and Electronic Design, Dresden University of Technology. His work focuses on electromigration-aware integrated circuit design, photonic integrated circuits, and mechatronic systems reliability. He leads projects funded by the DFG (Scalable Ising Machines in Silicon) and BMBF (Robust Mechatronic Systems Simulation). Research Associate, Dresden University of Technology DFG-funded project on CMOS-based photonic Ising machines BMBF-funded project on mechatronic system reliability His research spans electromigration analysis, finite element method applications, wear and aging effects, 3D-IC integration, and layout design optimization. Publications emphasize reliability challenges in future technologies and security implications of aging effects. Current projects analyze electromigration using advanced simulation techniques and explore photonic circuits for scalable Ising machines. Earlier work includes wear simulation tools and multiobjective optimization for 3D-ICs. Contact: matthias.thiele@tu-dresden.de

• Computer Engineering
• Machine Learning
• Hardware Security
• +۵ مورد دیگر

Cristiano Pegoraro Chenet is a researcher affiliated with the Department of Control and Computer Engineering (DAUIN) at Politecnico di Torino. He holds the academic rank of Researcher and contributes to teaching as an external collaborator for the Algorithms and Programming course in the Electronic and Communications Engineering Bachelor’s program. Research Interests : Focused on resilient computer architectures, hardware-based malware detection, and design diversity techniques for fault tolerance. His work intersects machine learning, security, and embedded systems, particularly in cloud computing and RISC-V architectures. Publications : Active in IEEE conferences and journals, with a recent survey in IEEE ACCESS analyzing hardware malware detection methods. His research includes contributions to the Horizon Europe Vitamin-V project and experiments on radiation-hardened mixed-signal systems. Collaborations : Works with the SMILIES research group at DAUIN, engaging in international projects with institutions across Europe.

Carl Sechenمشاهده پروفایل

استاد

• Digital Integrated Circuits
• Analog Integrated Circuits
• Computer-Aided Design (CAD)
• +۵ مورد دیگر

Carl Sechen is a Professor in the Electrical & Computer Engineering Department at the University of Texas at Dallas (UT Dallas), affiliated with the Erik Jonsson School of Engineering and Computer Science. His research focuses on design and computer-aided design (CAD) of digital/analog integrated circuits, with a strong emphasis on secure ICs and transistor-level programmable fabrics. He leads projects like the TRAP fabric, which achieves 10X logic density over traditional FPGAs while enabling secure hardware through IC redaction. Education: Ph.D. (1987, UC Berkeley), M.S. (1977, MIT), B.E.E. (1975, University of Minnesota). Awards include IEEE Fellow (2002), UTD Distinguished Teaching Award (2014), and multiple Semiconductor Research Corporation awards. His work bridges theoretical CAD advancements with practical hardware security solutions. Research Highlights: Secure IC design, transistor-level programmability, FPGA architecture, hardware security. Key Projects: TRAP fabric development, anti-reverse engineering techniques, low-power design methodologies. Awards: Over 20+ honors including best paper awards at PRIME (2017) and DATE (nominated 2017). Publications span journals like IEEE Transactions on CAD and conferences such as DATE, ISCAS, and VTS. Current work emphasizes secure hardware through obfuscation and programmable logic innovations.

• Computer Engineering
• Embedded Systems
• System-on-Chip (SoC) Design
• +۳ مورد دیگر

Giorgio Insinga is a Research Fellow at the Department of Control and Computer Science (DAUIN) of Politecnico di Torino. He serves as an External lecturer and teaching assistant, contributing to courses like Computer System Architectures and Computer Engineering since 2022/23. Research Interests: His work focuses on embedded memory testing, diagnosis, and reliability in automotive System-on-Chips (SoCs). Key areas include fault detection methodologies, diagnostic data compression strategies, and hybrid ADC designs for on-chip measurements. He collaborates with the CAD - Electronic CAD & Reliability Group (DAUIN). Scientific Contributions: Recent publications address test architectures for large-scale memory banks, low-area ADC implementations, and irradiation-based memory parameter extraction. His research bridges hardware reliability with practical automotive applications. National patent for 'Electronic board quality analysis software' Teaching Roles: Collaborated in courses related to computer architectures and system design since 2022, emphasizing practical implementation and testing techniques.

Ahmed Ounمشاهده پروفایل

استادیار

• Cybersecurity
• Hardware-Assisted Security
• VLSI
• +۴ مورد دیگر

Dr. Ahmed Oun is an Assistant Professor in the School of Electrical Engineering and Computer Science (EECS) at Ohio University's Russ College of Engineering and Technology since 2024. Previously, he held faculty roles at Ohio Northern University and worked in the oil and gas industry as a Gas Turbine Controls NPI Engineer, Operation Control Room Supervisor, and Project Manager at General Electric International Inc. He earned his Ph.D. (2022) from the University of Toledo and a Master's degree (2012) from the University of Bridgeport. His research focuses on cybersecurity, hardware-assisted security for embedded systems, VLSI, IoT security, and machine learning applications in protecting computing systems against cyberattacks and hardware Trojans. Key interests include PUF-based authentication, FPGA security, and AI-driven threat detection. Recent publications emphasize AI's role in cybersecurity, IoT device protection, and intrusion detection systems. His work spans both theoretical advancements and applied solutions in secure communication and hardware vulnerability analysis. No scientific awards are explicitly listed, but his contributions include developing novel defense mechanisms and authentication protocols for embedded systems. Dr. Oun has advised no explicitly listed students or grants, though his industry experience and academic roles suggest involvement in collaborative research projects. His work contributes to advancing secure computing infrastructure and resilient IoT ecosystems.