Boris Murmann is Professor at Stanford University, specializing in integrated circuit design, mixed-signal computing, and energy-efficient AI hardware. His research advances neural interface technologies, analog design automation, and tinyML systems. Recent work develops ultra-low-power neural recording ICs for brain-computer interfaces, RRAM-based memory systems, and open-source semiconductor design frameworks. Publications demonstrate innovations in compressive sensing for neural data, hardware-algorithm co-design, and reinforcement learning for analog circuit synthesis. Significant contributions include Medusa (TinyML processor), EMBER (RRAM macro), and methodologies for coarsely-quantized computer vision and analog design automation.
Austin Rovinski is an Assistant Professor in the Department of Electrical and Computer Engineering at New York University’s Tandon School of Engineering. He specializes in chip design, electronic design automation (EDA), and open-source hardware methodologies. His research focuses on VLSI design, domain-specific accelerators, and chiplet-based systems. Prior to NYU, he held a postdoctoral position at Cornell University and earned all his degrees (Ph.D., M.S., and B.S.) from the University of Michigan. Education: Ph.D., Electrical Engineering, University of Michigan - Ann Arbor Master’s, Electrical Engineering, University of Michigan - Ann Arbor Bachelor’s, Electrical Engineering, University of Michigan - Ann Arbor Research Focus: Developing open-source EDA frameworks like OpenROAD Optoelectronic interconnect systems for 2.5D packaging Agile hardware design methodologies Reconfigurable sparse matrix accelerators RISC-V-based manycore processors (e.g., Celerity project) Key Contributions: Austin led the development of the OpenROAD RTL-to-GDS flow and contributed to the Sirius and Celerity projects. His work emphasizes reproducibility, democratizing chip design through open-source tools. Awards: IEEE Micro Top Picks (2015) Michigan EECS Outstanding Research Award (2016) NSF Graduate Research Fellowship Honorable Mention (2017, 2018) Advising & Grants: Actively mentors graduate students in chip design and EDA. His research is supported by NYU’s Tandon School of Engineering and collaborations with industry partners. Labs & Teams: Core contributor to the OpenROAD project, part of NYU’s hardware design and EDA initiatives, and collaborator on the Celerity manycore processor project.
M. Omair Ahmad is a Professor and Tier I Concordia Research Chair in Multimedia Signal Processing at the Department of Electrical and Computer Engineering, Concordia University. He has held leadership roles, including Chair of his department from June 2002 to May 2005, and active involvement in IEEE committees. Education: Ph.D. in Electrical Engineering, Concordia University (1978) B.Eng. in Electrical Engineering, Sir George Williams University (Montreal, QC, Canada) Dr. Ahmad's research spans diverse areas of signal processing, including speech, image, and video processing, biomedical imaging, computer vision, and VLSI signal processing. His work addresses both theoretical and applied challenges in these domains, with applications in communication systems, object detection, and biometrics. Dr. Ahmad has contributed extensively to academia through leadership roles in conferences and editorial work. He served as an Associate Editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS PART I and held chairs in IEEE symposia, including the Local Arrangements Chairman for the 1984 IEEE International Symposium on Circuits and Systems. Scientific Awards and Honors: Wighton Fellowship from the Sandford Fleming Foundation Induction to Provosts Circle of Distinction for Career Achievements Award of Excellence in Doctoral Supervision IEEE Fellow
Dr. Ameer Abdelhadi is an Assistant Professor in the Department of Electrical and Computer Engineering at McMaster University. His research focuses on application-specific custom-tailored computer architectures, hardware-efficient deep learning, neurotechnology, and reconfigurable computing. He holds a PhD from the University of British Columbia and has held academic positions at the University of Toronto, Imperial College London, and Simon Fraser University, alongside industry experience in semiconductor design. Education: PhD in Computer Engineering (University of British Columbia, 2016). Research Interests: Hardware acceleration for machine learning and neurotechnology Reconfigurable computing and FPGAs/ASICs Asynchronous circuits and synchronization protocols VLSI physical design and CAD algorithms Publications span high-impact venues such as IEEE Journal of Solid-State Circuits, IEEE Hot Chips, and IEEE Micro. Notable achievements include the 2017 Best Paper Award at ASYNC for work on synchronization FIFOs. Teaching includes COMPENG 4DV4 (VLSI System Design) and ELECENG 4OI6B (Engineering Design). His lab focuses on advancing hardware systems for next-generation applications in AI and biomedical engineering.
Alyssa B. Apsel is a Professor of Electrical and Computer Engineering at Cornell University since 2002 and a Visiting Professor at Imperial College London. She became the IBM Professor of Engineering in 2023 and Director of Electrical and Computer Engineering at Cornell in 2018. Education: B.S., Electrical Engineering, Swarthmore College (1995) M.S., Electrical Engineering, California Institute of Technology (1996) Ph.D., Electrical Engineering, Johns Hopkins University (2002) Research Focus: She specializes in power-aware mixed-signal circuits for scaled CMOS and modern systems. Her group explores cost-effective designs addressing device scaling challenges (variation, noise, reduced analog performance) through analog/mixed-signal innovation, particularly in IoT radios and reconfigurable multi-standard wireless systems. Key areas: RF circuits, VLSI integration, biomedical telemetry, and low-power design. Publication Trends: Her 2016 work spans RF transceiver design, thermometer DAC calibration, biomedical ICs with UWB telemetry, and jitter-measurement circuits. These reflect her expertise in low-power wireless systems, analog/mixed-signal design, and biomedical electronics. Awards: IEEE Fellow (2020) IEEE CAS Distinguished Lecturer (2018-2019) ISLPED Design Contest Second Place (2010) Multiple Student Paper Awards (2000, 1995) Fellowships: Abel Wolman (1997), Caltech Institute (1995) Grants & Leadership: She founded EchoICs, which received a $275,000 NSF STTR Phase I Award (2024) for flexible spectrum radios. Her lab focuses on RF interfaces for implantable electronics and photonic integration.
Eby G. Friedman is a Professor in the Department of Electrical and Computer Engineering at the University of Rochester, where he has served since 1991 as director of the High Performance VLSI/IC Design and Analysis Laboratory. He concurrently holds a visiting professor position at the Technion - Israel Institute of Technology, directing the Technion Advanced Circuits Research Center (ACRC). His research specializes in high performance synchronous digital and mixed-signal microelectronic design with applications in high-speed portable processors and low-power wireless communications. Core focus areas include CMOS circuit design, clock/power distribution networks, interconnect synthesis, substrate noise mitigation, pipelining techniques, and 3-D integration methodologies. His work bridges theoretical frameworks with practical implementations in VLSI systems. Scientific Awards and Honors IEEE Fellow Distinguished Lecturer of the IEEE CAS Society Dr. Friedman has authored or edited 16 books and nearly 500 publications, establishing foundational contributions in clock distribution and power delivery networks. He maintains significant editorial leadership as Editor-in-Chief of the Microelectronics Journal, past Editor-in-Chief of IEEE Transactions on VLSI Systems, and serves on the editorial boards of the Journal of Low Power Electronics, Journal of VLSI Signal Processing, Journal of Low Power Application and Circuits, and Proceedings of the IEEE. His laboratory directs cutting-edge research in high-speed circuit design and 3-D integration architectures.
Elyse Rosenbaum is the Melvin and Anne Louise Hassebrock Professor in Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign. She also serves as the Acting Associate Dean for Research at the Grainger College of Engineering. She is the director of the NSF-supported Center for Advanced Electronics through Machine Learning (CAEML), a collaboration between the University of Illinois, North Carolina State University, and Penn State University. Education: Ph.D. in Electrical Engineering, University of California, Berkeley, 1992 M.S. in Electrical Engineering, Stanford University B.S. in Electrical Engineering, Cornell University (with distinction) Research Interests: Her research focuses on machine learning applications in electronics, ESD-robust high-speed I/O circuit design, compact modeling, behavioral modeling of circuits, and CDM-ESD protection for advanced packaging technologies. Scientific Awards: IEEE Fellow for contributions to electrostatic discharge reliability of integrated circuits Best Student Paper Award, IEDM Outstanding and Best Paper Awards, EOS/ESD Symposium Technical Excellence Award, SRC NSF CAREER Award IBM Faculty Award ESD Association’s Industry Pioneer Recognition Award Advising and Grants: She supervises graduate and undergraduate researchers, primarily focusing on those with strong academic records and relevant experience. Her work is supported by NSF and other prominent organizations. Labs and Teams: She leads the CAEML center, which aims to apply machine learning to optimize microelectronic circuits and systems, enhancing design automation and reliability.
Abdulkadir C. Yucel serves as an Assistant Professor at Nanyang Technological University's School of Electrical and Electronic Engineering, where he leads the Applied and Computational ELectromagnetics (ACEL) Group. His research spans applied electromagnetics, radar imaging, and AI-driven electromagnetic analysis with applications in smart cities, neurotechnology, and quantum systems. Education: Ph.D. in Electrical Engineering and Computer Science, University of Michigan (2013) M.S. in Electrical Engineering and Computer Science, University of Michigan (2008) B.S. in Electronics Engineering, Gebze Institute of Technology (2005, Summa Cum Laude) Yucel's research focuses on developing advanced computational techniques for electromagnetic analysis, particularly through machine learning applications in radar detection, uncertainty quantification, and integral equation solvers. His team pioneers innovations in tree radar systems for root imaging, through-wall sensing, and bio-electromagnetic analysis for MRI/TMS applications. Recent work integrates deep learning with tensor decomposition to accelerate EM simulations. Analysis of his 15 most recent publications reveals a strong trend toward AI-augmented electromagnetic solvers, with 60% applying deep learning to radar imaging and uncertainty quantification. Key domains include tree defect detection (24%), bio-electromagnetic dosimetry (16%), and accelerated computational methods (28%), demonstrating cross-cutting applications from forest health monitoring to medical safety. Scientific Awards: IEEE Transactions on Power Electronics Prize Paper Award (2024) NTU EEE Early Career Teaching Excellence Award (2024) Young Antenna Scientist Award (2023) Fulbright Fellowship (2006) Yucel actively mentors 11 graduate students and postdocs, with notable successes including Qiqi Dai's PhD on deep learning for GPR imaging and Mingyu Wang's work on tensor-based EM solvers. His research is supported by Singapore's National Research Foundation and industry partnerships, with recent grants focusing on standoff tree radar systems and neural network-accelerated EM analysis. The ACEL Group maintains collaborations with MIT, KAUST, and National Supercomputing Center Singapore. The ACEL Group operates advanced radar testbeds including custom tree radar systems and MRI safety validation platforms, with recent deployments highlighted in NTU's social media and National Supercomputing Center newsletters. Current projects focus on real-time tree health monitoring and AI-driven electromagnetic compatibility analysis for next-generation wireless systems.
Rabi N. Mahapatra is a Professor in the Department of Computer Science & Engineering at Texas A&M University, within the College of Engineering. His research focuses on embedded systems, reconfigurable architectures, real-time systems, and semantic networks. He holds a Ph.D. in Computer Engineering from the Indian Institute of Technology (1992), an M.S. in Electrical Engineering (Sambalpur University, 1984), and a B.S. in Electronics & Communication (Sambalpur University, 1979). His research interests include Network-on-Chip (NoC), data analytic co-design, IoT protocols, and temperature-aware energy management. His work emphasizes hardware-software co-design for complex systems, with applications in many-core processors, semantic search engines, and real-time embedded systems. Key publications highlight contributions to collaborative filtering on many-core architectures, low-jitter clock distribution circuits, and energy-efficient scheduling. He has been recognized as an IEEE Computer Society Distinguished Visitor (2005–2007) and received the BOYS-CAST Indo-US Young Scientist Award. He leads the Codesign Embedded Systems group at Texas A&M, exploring cutting-edge topics such as photonics NoC, reservoir computing, and IoT security. His research bridges theory and practice, addressing challenges in scalable systems and embedded applications.
Said Hamdioui serves as a full Professor in the Department of Computer Engineering within the Faculty of Electrical Engineering, Mathematics and Computer Science at Delft University of Technology. His research focuses on cutting-edge hardware architectures for neuromorphic computing and energy-efficient AI acceleration, with particular emphasis on memristor-based systems, emerging memory technologies, and fault-tolerant designs for edge applications. His research interests span Neuromorphic Computing , Memristor-Based Architectures , and Energy-Efficient AI Hardware , addressing critical challenges in hardware security, computation-in-memory, and reliable edge AI deployment. Recent work demonstrates significant advancements in RRAM/FeFET testing methodologies, spiking neural network implementations, and spin wave computing alternatives to traditional CMOS. His publications reveal strong trends toward real-world deployment of brain-inspired hardware with practical constraints like power efficiency, testability, and security. Award highlights include: DATE'20 Best Paper Award DFT'21 Outstanding Student Paper ETS 2021 Best Paper Award LATS 2018 & 2022 Best Paper Awards Professor Hamdioui actively contributes to the research community through editorial roles at IEEE Transactions on VLSI Systems , IEEE Design & Test , and Journal of Electronic Testing from 2017-2018. His leadership in multi-partner projects like CONVOLVE and NEUROKIT2E demonstrates strong industry-academia collaboration for edge AI solutions. Current work shows increasing focus on practical deployment challenges including in-field fault monitoring, security vulnerabilities in neuromorphic systems, and realistic brain simulation frameworks.
Saeed Mohammadi is a Professor in the Department of Electrical and Computer Engineering at Purdue University's College of Engineering, with campus affiliations in West Lafayette and Indianapolis. His research focuses on Microelectronics and Nanotechnology , VLSI and Circuit Design , and Communications, Networking, Signal & Image Processing , with specific interests in high-speed and low-power electronics, 3-D integration, novel semiconductor devices, and reconfigurable systems. Education: M.S. (University of Waterloo, 1994), Ph.D. (University of Michigan, 1999) He is associated with the Birck Nanotechnology Center at Purdue University, contributing to advanced research in semiconductor technologies and nanoscale systems.
Nicola Nicolici is a Professor in the Department of Electrical and Computer Engineering at McMaster University. His research focuses on methods and algorithms for the design of digital integrated circuits and systems, with significant contributions in manufacturing test, post-silicon validation and debug. His work has expanded to include embedded systems, low-energy computing, and custom hardware-accelerated computing systems. Professor Nicolici's research interests span multiple areas of digital system design and validation. His early work focused on manufacturing test methodologies and power-aware testing strategies for integrated circuits. More recently, he has made significant contributions to post-silicon validation techniques, including constrained-random stimuli generation, trace signal selection, and bit-flip detection. His research has evolved to address emerging challenges in embedded computing systems, low-energy design, and specialized hardware acceleration for various applications including deep neural networks and signal processing. His recent publications reveal a strong trend toward hardware acceleration for specialized computing tasks. The research spans matrix multiplication algorithms (Strassen and Karatsuba), memory system optimization (DDR5 calibration), FPGA-based radar processing, and neural network acceleration. His work consistently bridges theoretical algorithm development with practical hardware implementation considerations, particularly focusing on precision analysis, fault tolerance, and energy efficiency. The research demonstrates a clear progression from traditional digital circuit testing to more complex system-level validation and acceleration techniques. Professor Nicolici has been actively involved in teaching courses related to system-on-chip design and test, digital systems, and embedded systems. His teaching portfolio includes advanced courses such as System-on-Chip (SOC) Design and Test and Digital Systems Design , reflecting his expertise in the field. While specific grant information isn't detailed in the provided text, his extensive publication record suggests ongoing research funding support. His research has contributed significantly to the fields of digital circuit testing, post-silicon validation, and hardware acceleration. The work has practical applications in semiconductor manufacturing, embedded systems design, and specialized computing architectures. His recent focus on neural network acceleration and memory system optimization reflects the evolving landscape of computer architecture research.
Dr. Ava Hedayatipour is an Assistant Professor of Electrical Engineering at California State University at Long Beach (CSULB), where she joined in Fall 2020. She holds a Ph.D. from the University of Tennessee, Knoxville (2020), and degrees from Iran University of Science and Technology (B.S., 2012) and Shahid Rajaee Teacher Training University (M.S., 2015). Her research focuses on analog/mixed-signal circuit design, bio-implantable devices, low-power systems, and hardware security. Notable contributions include a first-of-its-kind integrated secure multimodal sensor and a flexible paper electrode for remote electrochemical experiments. Education: Ph.D., Electrical Engineering, University of Tennessee, Knoxville, 2020 M.S., Electrical Engineering, Shahid Rajaee Teacher Training University, Iran, 2015 B.S., Electrical Engineering, Iran University of Science and Technology, 2012 Research Interests: Analog and mixed-signal circuit design Biomedical devices and lab-on-chip applications Low-power, low-noise microelectronics Hardware security for IoT and biomedical sensors Flexible electrodes for wearable systems Awards: University of Tennessee Fellowship Award (2019) Outstanding Teaching Assistant Award (2018) BEST PAPER AWARD at IEEE DCAS 2025 2nd Place Winner at IEEE BIOCAS 2023 Innovation Challenge Advising & Grants: Lead CSULB LEAP program project on medical imaging braces Funded NSF project on chaotic analog security (2018–present) Collaborated with industry partners like Applied Medical and Synaptics Labs & Teams: Next Generation Wearable Lab at CSULB Focus on sensor design, hardware security, and biomedical applications
David Zhigang Pan is a Professor in the Department of Electrical & Computer Engineering at The University of Texas at Austin. He also holds the Silicon Laboratories Endowed Chair. Prior to joining UT Austin, he was a Research Staff Member at IBM T. J. Watson Research Center from 2000 to 2003. His academic journey began with a B.S. from Peking University, followed by M.S. and Ph.D. degrees from UCLA. Research Areas: Electronic Design Automation (EDA), Machine Learning Hardware, FPGA Prototyping, Optical Computing, Hardware Security, and CAD for Emerging Technologies Academic Timeline: Assistant Professor (2003-2008), Associate Professor (2008-2013), Full Professor (2013-present) His research focuses on design automation for mixed-signal circuits , GPU-accelerated EDA tools , and hardware-software co-design for AI . Recent work explores FFT-based optical neural networks and deobfuscation techniques for integrated circuits , reflecting his interdisciplinary approach at the intersection of machine learning , computer architecture , and semiconductor manufacturing . Key publication trends reveal expertise in: VLSI design , lithography optimization , and deep learning applications for EDA tools. His work has been recognized with multiple Best Paper Awards at top conferences including DAC , ASP-DAC , and HOST . Awards: IEEE Fellow (2014), SPIE Fellow (2017), ACM SRC Graduate Category Honors for students Patents: 8 U.S. Patents in electronic design and hardware optimization Prof. Pan has mentored 40 PhDs and postdocs who now hold key positions in academia and industry. He leads research initiatives involving GPU acceleration frameworks and optical computing architectures . His lab focuses on vertical integration of architecture, CAD tools, and fabrication technologies for next-generation hardware solutions.
Kyprianos Papadimitriou is a Researcher at the Microprocessor and Hardware Laboratory within the School of Electrical and Computer Engineering at the Technical University of Crete . He holds a PhD in Electronic and Computer Engineering (2012) and has been involved in teaching laboratory courses such as Logic Design , Computer Architecture , and VLSI/ASIC Circuit Design . Research Areas : His work spans Reconfigurable Systems , Hardware Design , Computer Architecture , RFID Systems , and Real-Time Systems . He has developed innovative approaches in FPGA-based dynamic reconfiguration, MPSoC security, and 3D stereo vision for surveillance. Key Trends : Runtime reconfiguration for FPGAs Security frameworks for NoC-based MPSoCs Low-cost embedded vision systems Optimization of reconfiguration overhead Hardware task scheduling methodologies Genetic algorithm implementations on FPGAs Scientific Contributions : 1 USA patent (2005) Co-author of VLSI-SoC 2013 paper nominated for 1st Prize Active member of scientific committees (FPL, ReConFig) Peer reviewer for IEEE, Elsevier, and Springer journals Session chair at IEEE CNS and HPCC conferences Grants & Projects : Participated in competitive European and national programs, serving as scientific manager, coordinator, and technical coordinator. Developed spin-off company (2003-2005) to commercialize master's thesis research. Laboratory & Teaching : Affiliated with the Microprocessor and Hardware Laboratory , focusing on practical training in digital systems, processor-based systems, and VLSI design.
