جستجوی استاد راهنمای دانشگاهی

• Battery simulation
• Cyber physical system
• Design simulation
• +۱۲ مورد دیگر

Sara Vinco is an Associate Professor at the Department of Control and Computer Engineering (DAUIN), Politecnico di Torino, Italy. She specializes in battery simulation, digital twins, and energy-efficient design automation for heterogeneous embedded systems, aligning with Industrial and Information Engineering (Area 0009) and ERC sectors including Computer Architecture and Machine Learning . Her research focuses on advancing cyber-physical systems through simulation frameworks like SystemC-AMS, enabling holistic modeling of analog, digital, and thermal domains. Key projects include data-driven digital twins for EV batteries and low-area digital circuits in industrial/medical applications, supported by commercial contracts such as C-based virtual prototyping. Her recent publications (2022-2023) emphasize machine learning for battery SOH/SOC estimation , energy monitoring in production lines , and multi-domain fault modeling . These works span journals like IEEE Transactions and conferences including DATE and ISLPED. Awarded the FFABR 2017 grant and IEEE FDL Best Paper Award 2011 , she also chairs editorial boards for IEEE Transactions on CAD and DATE Conference. She supervises PhD students Giovanni Pollo (Digital Circuits) and Khaled Alamin (EV Battery Twins), reflecting her leadership in smart systems design.

Thomas Wildمشاهده پروفایل

استاد

• Manycore system on chip (SoC) architectures
• Network processor (NPU) architectures
• On-chip communication architectures
• +۳ مورد دیگر

Dr.-Ing. Thomas Wild serves as an Academic Director at the Technical University of Munich (TUM), working within the TUM School of Computation, Information and Technology at the Chair of Integrated Systems. He maintains an active research and teaching role at the institution, with his office located in Building N1 (Theresienstr. 90), Room N2136 in Munich, Germany. Dr. Wild's research focuses on advanced computing architectures, with particular emphasis on manycore system on chip (SoC) architectures, network processor (NPU) architectures, on-chip communication architectures including networks on chip (NoC), and system level design methodologies. His work bridges theoretical research with practical implementation, often exploring design space exploration techniques to optimize system performance. The evolution of his research over two decades demonstrates a consistent focus on improving communication architectures and system-level design for embedded and high-performance computing platforms. His recent publications (2023-2025) reveal a growing integration of machine learning techniques with traditional hardware design, particularly in optimizing power-performance tradeoffs in embedded systems. There's a clear trend toward hardware-software co-design approaches, with significant work on SmartNICs, Linux system optimization, and network processing acceleration. His research shows strong interdisciplinary connections between computer architecture, networking, and machine learning. EUROPRACTICE representative for TUM city campus, facilitating access to commercial EDA tools for academic purposes Active collaborator with Professor Andreas Herkersdorf and other researchers at TUM Focus on practical implementations with FPGA-based prototyping and real system modifications Dr. Wild teaches several hardware design courses including VHDL Lab, SystemC Lab, and HW/SW Codesign, contributing to the education of next-generation computer engineers. His teaching directly complements his research in system design and hardware acceleration, providing students with hands-on experience in cutting-edge technologies.

Daniel Großeمشاهده پروفایل

استاد

• Formal Verification
• Hardware Verification
• Electronic Design Automation
• +۳ مورد دیگر

Prof. Daniel Große serves as Professor at the Institute for Complex Systems (ICS) within Johannes Kepler University Linz, Austria, while maintaining a dual affiliation with the German Research Center for Artificial Intelligence (DFKI) in Bremen. His research centers on Electronic Design Automation (EDA), specializing in verification, debugging, and synthesis of complex hardware/software systems through advanced virtual prototyping techniques. His primary research domains include Formal Verification , Hardware Verification , and Virtual Prototyping , with significant contributions to RISC-V architecture development and embedded systems validation. Current projects like PaSVer (automotive electronics), AUTOASSERT (analog-digital verification), and VerSys (RISC-V software platforms) demonstrate his focus on bridging simulation and formal methods for safety-critical applications. Recent publications reveal accelerating trends in metamorphic testing for embedded graphics libraries and RISC-V vector extensions, alongside innovations in waveform analysis tools like Surfer. His work increasingly integrates AI-assisted verification while maintaining rigorous formal methods foundations. Prof. Große actively supervises student research, having guided Lucas Klemmer's PhD thesis and nine Bachelor theses on topics ranging from RISC-V processor design to transaction visualization. His projects including SATiSFy (autonomous vehicle security) and CONVERS (complex system design automation) secure substantial research funding from academic and industry partners. He leads the Institute for Complex Systems' development of open-source tools such as RISC-V VP++ and contributes to international standards through program committee roles at DATE, ICCAD, and RISC-V Summit Europe.

Mian M. Hamayunمشاهده پروفایل

دانشیار

• Computer Science
• Transaction Level Modeling (TLM)
• MPSoC Simulation
• +۱۵ مورد دیگر

Mian M. Hamayun is an Associate Professor of Computer Science and Head of Subject Group at the University of Birmingham Dubai campus, part of the College of Engineering and Physical Sciences. He holds a PhD in System Modelling, Simulation & Virtualization from the University of Grenoble Alpes, France, and has academic qualifications from Joseph Fourier University and COMSATS Institute of Information Technology, Pakistan. PhD in System Modelling, Simulation & Virtualization, University of Grenoble Alpes, 2013 MS in Informatics (Parallel & Distributed Systems), Joseph Fourier University, 2009 MSE in Software Engineering (Gold Medalist), COMSATS, 2005 PGCHE, University of Birmingham, 2021 FHEA and SFHEA, University of Birmingham (2021, 2024) His research spans Transaction Level Modeling (TLM) , MPSoC simulation , cloud computing , virtualization , Internet of Things/Vehicles , edge AI , and TinyML . He focuses on performance estimation, binary translation, and system-level simulation for embedded and distributed systems. The recent publications reflect a strong trend in IoT and vehicular networks , secure telemedicine , cloud orchestration , and embedded system simulation . His work integrates virtualization with security, real-time constraints, and machine learning on edge devices. Senior Fellow of the Higher Education Academy (SFHEA), 2024 Fellow of the Higher Education Academy (FHEA), 2021 Dr. Hamayun has supervised multiple research students and contributed to projects involving fatigue detection, person re-identification, retinal image analysis, and secure surgery frameworks. He has taught core computer science courses including Operating Systems, Networks, Data Structures, Algorithms, and Functional Programming at both undergraduate and postgraduate levels. His prior roles include Assistant Professor at NUST SEECS, R&D Engineer in France, and Lecturer at IUT1. He leads research in virtual prototyping and edge intelligence at the Dubai campus, contributing to smart city and cognitive systems initiatives. His lab work involves hybrid simulation environments, secure automotive platforms, and distributed IoT systems.

Luigi Pomanteمشاهده پروفایل

استادیار

• Electronic System-Level HW/SW Co-Design
• Heterogeneous Parallel Systems
• Embedded Systems
• +۵ مورد دیگر

Luigi Pomante is a tenured Assistant Professor at the University of L'Aquila, Italy, where he is affiliated with the Department of Engineering and Information Science and Mathematics (DISIM) and the DEWS Center of Excellence. His academic career focuses on research and teaching in embedded systems and hardware-software co-design methodologies. Dr. Pomante's primary research interest is Electronic System-Level Hardware-Software Co-Design of heterogeneous parallel dedicated systems. He is the principal developer of the HEPSYCODE framework, which provides comprehensive methodologies and tools for system-level design space exploration. His work addresses critical challenges in embedded systems development, including handling functional and non-functional requirements, heterogeneous architectures, and mixed-criticality constraints. He has published extensively in journals like IEEE Transactions on Computers and IET Computers & Digital Techniques, as well as at major international conferences. Analysis of Dr. Pomante's publication record reveals a consistent research trajectory focused on hardware-software co-design methodologies, with increasing attention to real-time constraints and mixed-criticality systems in more recent work. His publications demonstrate expertise in design space exploration techniques, system modeling using CSP-like approaches, and the development of metrics for evaluating hardware-software partitioning solutions. The HEPSYCODE framework represents his most significant contribution to the field. Dr. Pomante actively supervises student projects and theses related to electronic design automation and embedded systems. He has contributed to European research projects including EMC2 (Embedded Multi-Core systems for Mixed Criticality applications), where he was responsible for deliverables related to design methodologies, implementation approaches, and validation frameworks. His work has practical applications in aerospace and other safety-critical domains through collaborations with industry partners. He leads the HEPSYCODE research group at DEWS, which focuses on developing methodologies and tools for hardware-software co-design of heterogeneous parallel dedicated systems. The group's current work includes extensions for real-time and mixed-criticality systems, frameworks for embedded system monitoring, and techniques for handling approximate computing and energy/power constraints within the design space exploration process.

Yakun Sophia Shaoمشاهده پروفایل

دانشیار

• Computer Architecture
• Specialized Accelerators
• Heterogeneous Architecture
• +۴ مورد دیگر

Yakun Sophia Shao is an Associate Professor in the Department of Electrical Engineering and Computer Sciences (EECS) at the University of California, Berkeley. She holds a Ph.D. (2016) and M.S. (2014) in Computer Science from Harvard University, alongside a B.E. in Electrical Engineering from Zhejiang University, China. Her research focuses on computer architecture , particularly domain-specific accelerators , heterogeneous systems , and agile VLSI design methodologies . Key research centers: Agile Design of Efficient Processing Technologies (ADEPT), Berkeley Emerging Technologies Research (BETR), Berkeley Wireless Research Center (BWRC), SpeciaLIzed Computing Ecosystems (SLICE) Her work explores hardware-software co-design for efficiency in AI and robotics, including projects like Simba (chiplet-based AI accelerators) and Virgo (GPU matrix units). Notable tools developed include WIICA (workload characterization) and Chipyard (SoC frameworks). Selected honors include: 2024 CRA-WP Anita Borg Early Career Award 2023 NSF CAREER Award 2022 IEEE TCCA Young Computer Architect Award 2022 Intel Rising Star Faculty Award She teaches courses including EECS 151 (Digital Design & ICs) and EECS 251A (Advanced Digital Design).

Dirk Timmermannمشاهده پروفایل

دانشگاهی

• Microelectronics
• Embedded Systems
• Wireless Sensor Networks
• +۳ مورد دیگر

Dirk Timmermann is Senior Professor of Computers in Technical Systems at the Institute for Applied Microelectronics and Data Technology , University of Rostock , Germany. He is affiliated with the Interdisciplinary Faculty (INF) within the Department of Life, Light & Matter. Academic Role: Senior Professor focusing on technical systems Research Areas: Digital CMOS circuits, energy-efficient systems, wireless communication protocols Teaching: Advanced VLSI design and digital systems Current Projects: Deep brain stimulation devices, TSN networking, medical device interoperability His recent publications (2023-2025) emphasize preclinical neurostimulation research (STN-DBS applications in Parkinsonian models), time-sensitive networking (TSN scheduling, IEEE 802.11 protocols), and medical device integration (IEEE 11073 SDC implementations). He contributes to: Ad hoc sensor network architectures Energy-efficient FPGA designs Service-oriented medical device connectivity Building automation security frameworks Prof. Timmermann serves on the Senate Committee on Budget, Personnel and Construction at University of Rostock.

Ludovic Apvrilleمشاهده پروفایل

استاد

• Embedded Systems Design
• Cyber-Physical Systems
• System-on-Chip (SoC) Modeling
• +۷ مورد دیگر

Ludovic Apvrille is a Professor at Telecom Paris (Institut Polytechnique de Paris), where he leads research in the Communications and Electronics (Comelec) department and previously headed the LabSoC (Laboratory on System on Chip). His work focuses on embedded systems design , with particular emphasis on safety, security, and formal verification of complex systems including automotive applications, drones, and cyber-physical systems. Research Areas: Embedded Systems, Cybersecurity, Model-Driven Engineering, Formal Verification, AI-assisted Design Key Tools: TTool, SysML-Sec, AVATAR, SMASHUP, DIPLODOCUS His recent publications analyze security vulnerabilities in RISC-V architectures using the gem5 simulator, while his ongoing work explores AI integration in system modeling and unified verification techniques for hardware/software co-designs. He actively supervises research projects in safety-security-performance trade-offs and microarchitectural security , with applications to autonomous vehicles and critical infrastructure systems. Grants & Projects: EVITA project, PEPR-5G HISEC, MoVe4SPS, PEPR-Security ARSENE

Christoph Niemannمشاهده پروفایل

پژوهشگر

• Reliability Engineering
• Nanometer CMOS Technologies
• FPGA Design and Optimization
• +۵ مورد دیگر

Dr.-Ing. Christoph Niemann is a researcher at the Institute of Computer Engineering within the School of Computer Science and Electrical Engineering at the University of Rostock. His work bridges computer engineering and biomedical applications, with a focus on hardware design for medical devices and energy-efficient computing systems. Dr. Niemann's primary research interests include reliability and aging in nanometer CMOS technologies and contributions to increasing the energy efficiency of FPGA-based applications . His work spans both theoretical hardware design and practical biomedical implementations, particularly in the field of deep brain stimulation systems. His research demonstrates a unique intersection of computer engineering principles applied to critical medical technologies. Analysis of Dr. Niemann's recent publications (2020-2025) reveals a strong focus on energy efficiency in implantable medical devices, particularly for deep brain stimulation applications. His work combines FPGA optimization techniques with biomedical requirements, creating hardware solutions that address the stringent power constraints of implantable systems. The publications show consistent collaboration with Dirk Timmermann, Christian Haubelt, and Franz Plocksties, indicating a well-established research group focused on medical device engineering. Dr. Niemann has made significant contributions to the STELLA platform for deep brain stimulation research and has developed novel approaches for sensor-based adaptive voltage scaling on FPGAs. His work demonstrates both theoretical innovation in hardware design and practical implementation in medical contexts.

David Greavesمشاهده پروفایل

مدرس ارشد

• Computer Architecture
• Programming Languages
• Semantics and Verification
• +۳ مورد دیگر

David Greaves serves as a University Senior Lecturer in the Department of Computer Science and Technology at the University of Cambridge, where he conducts research and teaches undergraduate courses including Databases (Part IA) and Programming in C and C++ (Part IB). His academic work focuses on bridging hardware and software systems through innovative compilation techniques and architectural design. His research spans computer architecture, programming languages, semantics and verification, and systems and networking, with particular emphasis on hardware-software co-design, memory safety mechanisms, and FPGA-based acceleration. Greaves has developed specialized compiler frameworks like Kiwi for translating high-level programs into hardware implementations, and created security models such as FRAMER for capability-based memory protection. Analysis of his recent publications reveals a consistent focus on compiler infrastructure for hardware acceleration, with significant contributions to Bluespec Verilog compilation, dataflow intermediate representations, and cache-friendly security models. His work demonstrates strong interdisciplinary connections between formal methods, hardware design, and systems security, often targeting practical implementations in FPGA environments. Greaves maintains active involvement in hardware description language development and power analysis tools, as evidenced by his contributions to TLM Power and other electronic design automation frameworks. His research approach consistently emphasizes practical toolchain development alongside theoretical foundations.