Mario Baldi is a researcher affiliated with the Polytechnic University of Turin, Italy , with significant contributions to computer networking , distributed systems , and software-defined networking . Key research themes: network function virtualization , programmable dataplanes , time-driven scheduling , and traffic analysis . Recent work focuses on RDMA-enabled compute offloading (2023) and DNN inference in network data planes (2023). Longstanding expertise in multicast routing , voice/data packet efficiency , and XML-based protocol parsing (2000–2006). Collaboration network includes Yoram Ofek , Fulvio Risso , and Han Hee Song , with 99+ publications spanning 1994–2023.
Marco Liess serves as a Scientific Staff Member and doctoral candidate at the Chair of Integrated Systems within the TUM School of Computation, Information and Technology. His work focuses on hardware aspects of network interfaces and processing resources, with particular emphasis on SmartNIC development for next-generation networking systems. The chair participates in multiple research initiatives including the 6G Future Lab Bavaria and 6G Life projects. Dr. Liess holds a Master of Science in Electrical Engineering and Information Technology from TUM (2019-2021), with specialization in Embedded and Control Systems. His master's thesis on 'Frame Synchronization for Satellite-based IoT Applications' was completed at the German Aerospace Center (DLR). Previously, he earned a Bachelor of Science in the same field (2016-2019), focusing on Communication Networks, Embedded Systems, and Security, with his bachelor's thesis on 'Efficient Key Establishment for IoT Applications' conducted at Fraunhofer AISEC. His research primarily investigates hardware acceleration of data paths between network interfaces and processors, memory bottleneck avoidance, dynamic power management, and efficient hash algorithms. These interests align with current 6G research directions focusing on deterministic real-time processing for mission-critical applications. His work bridges hardware design (particularly FPGA implementations), operating system interactions, and networking protocols to create energy-efficient, high-performance network processing solutions. Analysis of his publication record reveals strong focus on SmartNIC architectures, with consistent contributions to major conferences in networking and computer architecture. His work demonstrates progression from satellite IoT communications toward advanced packet processing pipelines and real-time networking solutions for 6G infrastructure. Key themes include hardware-software co-design, power efficiency, and deterministic performance guarantees for time-sensitive networking applications. As an academic supervisor, Dr. Liess actively mentors students through various thesis projects ranging from FPGA-based network testers to Linux scheduler optimizations. His teaching responsibilities include 'Chip Multicore Processors' since SS 2024 and previously supervised 'Seminar Integrierte Systeme' and 'Seminar on Topics in Integrated Systems' from WS 2022/23 to WS 2023/24. Current projects under his supervision address critical challenges in 100Gbps networking, hardware tracing mechanisms, and server state tracking using SmartNIC technology.
Marco Canini is Professor of Computer Science at KAUST's Computer, Electrical and Mathematical Sciences & Engineering division. His research creates next-generation computing infrastructure for distributed AI/ML systems, focusing on network programmability and efficient large-scale computation. Research interests span distributed systems, cloud computing, and programmable networks, with current focus on systems support for distributed machine learning. His work develops practical implementations deployable in real-world environments. Recent publications demonstrate strong trends in optimizing distributed training through hardware acceleration (SmartNICs), communication efficiency (quantization methods), and privacy-preserving techniques (federated/split learning).
