Björn Brandenburg is a researcher at the Max Planck Institute for Software Systems (MPI-SWS) in Kaiserslautern, Germany. His work focuses on real-time systems, scheduling algorithms, and operating system design, with a particular emphasis on predictable resource allocation and performance guarantees in multiprocessor and cyber-physical environments. His research interests include real-time response-time analysis (e.g., PROSA ), locking protocols for multiprocessor systems, side-channel mitigation in cloud environments, and the verification of real-time scheduling policies. He has contributed to foundational studies on deadline failure probabilities, self-suspending tasks, and predictable real-time Linux implementations. Scientific awards include recognition for outstanding papers on TimerShield (2017) Offline Equivalence (2017) . His work intersects with practical systems like LITMUSRT and ROS 2, aiming to bridge theoretical guarantees with real-world applications in safety-critical and distributed real-time systems.
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Prof. Dr. Tobias Gemmeke is a University Professor at RWTH Aachen University's Faculty of Electrical Engineering and Information Technology, leading the Chair of Integrated Digital Systems and Circuit Design. His work focuses on neuromorphic computing, hardware accelerators, and energy-efficient electronics. He has pioneered advancements in FPGA-based computational neuroscience simulators, neuromorphic processor architectures, and sensor integration for industrial and medical applications. Research interests include time-domain computing, ReRAM reliability, and co-optimization of neural networks with hardware. Notable contributions include the neuroAIx framework for accelerated neuroscience simulations and energy-efficient ASIC designs for post-quantum cryptography. He actively explores memristive devices and domain generalization techniques for edge computing. Recent publications highlight innovations in spiking neural networks, sensor systems for plain bearings, and time-domain compute-in-memory engines. His work bridges theoretical neuroscience with practical hardware implementations, emphasizing scalability and real-time performance.
Janis Nötzelمشاهده پروفایل
پژوهشگر
Dr. Janis Nötzel is a senior researcher at the Chair of Theoretical Information Technology (Technische Universität München) and leads his independent Emmy Noether research group. Previously, he held a postdoctoral position at Universitat Autónoma de Barcelona and contributed to 5G practical implementations at TU Dresden's 5G Lab. His research spans quantum information theory, physical layer security, and machine learning applications. Key focuses include Quantum channel capacities under adversarial conditions Entanglement-assisted communication Quantum software frameworks (QuNetSim, QuReed) Interplay between classical and quantum communication Security analysis for 6G networks Resource optimization in quantum systems Recent publications (2023-2025) showcase innovations in Quantum satellite communication architectures Hybrid quantum-classical clustering algorithms Photonic processor instability modeling Covert capacity of compound channels Quantum key distribution resilience Free-space Bessel beam communication He actively collaborates with 6G-life research hub and contributes to quantum network simulation tools. Grants include funding from DFG (Leibniz Program), BMBF (6G-life, Q.Link.X), and StMWi (6G Zukunftslabor Bayern).
- high performance computing (HPC)
- heterogeneous HPC system architectures
- modular supercomputing architecture (MSA)
- +۴ مورد دیگر
Prof. Dr. Estela Suarez is a Professor of High Performance Computing at the Institute for Computer Science, University of Bonn (W2 in the Jülich Model) and Joint Lead of the Division "Novel System Architecture Design" at the Jülich Supercomputing Centre (JSC), Forschungszentrum Jülich GmbH. She also leads the Research Group "Next Generation Architectures and Prototypes" at JSC and serves as Spokesperson of Helmholtz Information Program 1, Topic 2. Currently on sabbatical during the 2024/2025 and 2025 academic years, she remains active in research leadership roles. 2010: PhD in Physics from University of Geneva, Switzerland 2004: Master in Physics, Specialization in Astrophysics, University Complutense of Madrid, Spain Professor Suarez specializes in high performance computing with particular expertise in heterogeneous HPC system architectures and modular supercomputing architecture (MSA). Her research spans hardware prototyping and evaluation, system software development, operational data analysis, and co-design methodologies. She has pioneered approaches to address hardware heterogeneity through system-wide orchestration of diverse computing resources, enabling more efficient scientific computing across multiple domains. Her work bridges theoretical computer architecture with practical implementation challenges in exascale computing environments, focusing on real-world applications that require specialized hardware configurations. Professor Suarez's publication record shows a clear evolution from foundational work on the DEEP project (2016) through the development of modular supercomputing concepts (2019-2021) to current applications across diverse scientific domains (2022-2024). Her recent publications demonstrate how modular architectures can be effectively applied to climate modeling, neuroscience simulations, quantum chemistry calculations, and other computationally intensive fields. This trend highlights her focus on practical implementation challenges and the growing importance of adaptable computing architectures in modern scientific research. 2023/2024 Lehrpreis der Universität Bonn: UniBonn teaching award Professor Suarez has secured significant research funding through major projects including NUMERIQS (Projects A05, B02, and Z02), European Processor Initiative (EPI), DEEP-SEA (Software for Exascale Architectures), IFCES2 (optimization of simulation algorithms for exascale supercomputers), and AIDAS (virtual laboratory between Forschungszentrum Jülich and CEA on AI and data analytics). While currently not accepting new students due to sabbatical, she has previously mentored graduate students in high performance computing techniques and has delivered numerous invited lectures at international conferences. Professor Suarez leads the "Next Generation Architectures and Prototypes" research group at JSC and serves as Joint Lead of the "Novel System Architecture Design" division. She chairs the Research and Innovation Advisory Group (RIAG) from EuroHPC Joint Undertaking since 2024. Her work involves close collaboration with international research teams on advancing supercomputing architectures, including contributions to the University of Bonn's new HPC system "Marvin" which ranks on both the TOP500 and GREEN500 lists.
- Machine Learning
- Computer Vision
- Signal Processing
- +۶ مورد دیگر
Dongwook Kim is affiliated with the Korea Advanced Institute of Science & Technology (KAIST) as a faculty member in the Department of Business and Technology Management under the College of Business. His research spans multiple domains including machine learning, robotics, signal processing, and biomedical engineering. Key contributions in Computer Vision (CNN-based semantic segmentation, 3D point cloud analysis) Significant work in Hardware Design (energy-efficient processors, neuromorphic computing) Interdisciplinary expertise in Medical Imaging (bone age assessment, retinal biomarkers) and Cybersecurity (attack detection, network analytics) Publications since 2015 demonstrate sustained innovation in AI applications , Signal Processing , and Smart City Governance . His work often integrates theoretical advances with practical implementations in real-world systems. No scientific awards or student mentorship details are explicitly documented in the provided records.
Prof. Daniel Große serves as Professor at the Institute for Complex Systems (ICS) within Johannes Kepler University Linz, Austria, while maintaining a dual affiliation with the German Research Center for Artificial Intelligence (DFKI) in Bremen. His research centers on Electronic Design Automation (EDA), specializing in verification, debugging, and synthesis of complex hardware/software systems through advanced virtual prototyping techniques. His primary research domains include Formal Verification , Hardware Verification , and Virtual Prototyping , with significant contributions to RISC-V architecture development and embedded systems validation. Current projects like PaSVer (automotive electronics), AUTOASSERT (analog-digital verification), and VerSys (RISC-V software platforms) demonstrate his focus on bridging simulation and formal methods for safety-critical applications. Recent publications reveal accelerating trends in metamorphic testing for embedded graphics libraries and RISC-V vector extensions, alongside innovations in waveform analysis tools like Surfer. His work increasingly integrates AI-assisted verification while maintaining rigorous formal methods foundations. Prof. Große actively supervises student research, having guided Lucas Klemmer's PhD thesis and nine Bachelor theses on topics ranging from RISC-V processor design to transaction visualization. His projects including SATiSFy (autonomous vehicle security) and CONVERS (complex system design automation) secure substantial research funding from academic and industry partners. He leads the Institute for Complex Systems' development of open-source tools such as RISC-V VP++ and contributes to international standards through program committee roles at DATE, ICCAD, and RISC-V Summit Europe.
Akash Kumar is a Professor at Ruhr University Bochum, Germany, with affiliations to multiple institutions including TU Dresden and National University of Singapore. His research focuses on computer architecture, hardware acceleration, and approximate computing, with a strong emphasis on FPGA-based systems and neural network optimization. He has contributed extensively to embedded systems, mixed-criticality systems, and security in emerging technologies like reconfigurable nanodevices. His work spans cross-layer approximation methodologies, graph neural networks, and energy-efficient processing for edge AI. Collaborations with industry and academia highlight his leadership in VLSI design and secure hardware implementations. Notable contributions include frameworks for bounding time in mixed-criticality systems and resilient logic locking techniques. Research interests include hardware-software co-design, real-time systems, and efficient neural network architectures. His publications in top-tier conferences (DAC, DATE, FCCM) and journals (IEEE Trans. CAD, ACM TECS) underscore his impact in the field.
Prof. Dr.-Ing. Jürgen Teich is a full Professor and Chair for Hardware-Software Co-Design at the Department of Computer Science, Friedrich Alexander University Erlangen-Nuremberg (FAU). He serves as Head of Department Computer Science and Vice Dean of the Technical Faculty since August 2024, and has been Speaker of the FAU Research Center Embedded System Initiative (FAU ESI) since 2023. His educational background includes: Diploma degree in Electrical Engineering, University of Kaiserslautern (1989) Dr.-Ing. degree in Electrical Engineering, University of Saarland (1993) Habilitation (PD Dr.-Ing.) entitled "Synthesis and Optimization of Digital Hardware/Software Systems" (1996) Prof. Teich's research focuses on Embedded Systems , Invasive Computing , Hardware-Software Co-Design , and Reconfigurable Computing . His work spans from theoretical foundations to practical implementations, with particular emphasis on resource-constrained systems, many-core architectures, and energy-efficient computing. He has pioneered research in invasive computing paradigms that enable more efficient use of many-core processors by allowing applications to dynamically claim resources. His recent publications reveal a strong trend toward energy-efficient AI deployment on embedded devices , security of embedded systems , and novel memory technologies . There's a clear focus on practical implementations of machine learning on microcontrollers (TinyML), hardware acceleration for data processing, and innovative approaches to power management in self-powered systems. Among his notable scientific awards are: IEEE Fellow (since 2018) Member of Academia Europaea, Section Informatics (since 2011) Member of the National Academy of Science and Engineering (acatech) (since 2018) Member of the German Society of Humboldtians (since 2021) Prof. Teich has been Principal Investigator for numerous DFG-funded projects including SFB/Transregio 89 "Invasive Computing" (2010-2022), SFB 694, and multiple priority programs. He has coordinated large collaborative research efforts across Germany and internationally, with significant funding from DFG and other sources. His research group has produced influential work in embedded systems design and co-design methodologies. He leads the Hardware-Software Co-Design research group at FAU, which focuses on innovative approaches to embedded system design, invasive computing architectures, and efficient implementation of machine learning on resource-constrained devices. The group maintains strong collaborations with industry partners including Intel, Xilinx, and automotive companies.
Paul R. Genssler is a Dr.-Ing. researcher at the Chair of AI Processor Design (AI-Pro) within the Technical University of Munich (TUM), actively advancing hardware solutions for artificial intelligence under Prof. Hussam Amrouch. His work bridges computer engineering and emerging technologies, focusing on overcoming fundamental limitations in conventional computing architectures through brain-inspired paradigms. His research spans critical domains in next-generation computing: Hyperdimensional Computing for robust pattern recognition and bioinformatics applications Neuromorphic and In-Memory Computing architectures for energy efficiency Reliability engineering for emerging memory technologies (FeFET, etc.) Quantum computing support systems including cryogenic embedded electronics Machine learning-driven transistor aging prediction and mitigation Analysis of his 15 most recent publications (2023-2024) reveals a dominant trend toward hyperdimensional computing as a unifying framework for addressing reliability challenges in emerging technologies. His work consistently integrates in-memory computing techniques to bypass von Neumann bottlenecks while targeting real-world applications like genome matching and unsupervised learning. A significant portion focuses on error-resilient implementations for unreliable nanoscale devices, demonstrating exceptional cross-stack expertise from transistor physics to algorithm design. As a core member of TUM's AI Processor Design group affiliated with the Munich Institute of Robotics and Machine Intelligence (MIRMI), Genssler collaborates extensively on projects spanning cryogenic quantum control systems, FPGA-based AI resilience, and monolithic 3D integration. The team operates at the intersection of semiconductor physics, computer architecture, and machine learning, with strong industry connections evident through publications at DATE, ASP-DAC, and ICCAD.
Prof. Tim Güneysu is a full Professor and Head of the Security Engineering department at the Faculty of Computer Science, Ruhr-Universität Bochum. He serves as Vice Dean for Strategy and Finances (since 2023) and previously as Speaker of the Horst-Görtz Institute for IT-Security (2020-2023). His academic journey includes roles as Associate Professor at the University of Bremen (2015-2017) and Assistant Professor at Ruhr-Universität Bochum (2011-2015). He also holds positions at the German Research Center for Artificial Intelligence (DFKI) and has conducted postdoctoral research at UMass Amherst. His research focuses on Security-by-Design principles, CAD for Security, and countermeasures against physical attacks. He emphasizes efficient cryptographic implementations and system-level hardware security. Key areas include post-quantum cryptography, side-channel resistant designs, and secure embedded systems. He has contributed over 200 publications in top venues, with recent work on FPGA-based cryptographic accelerators, secure hardware extensions (e.g., KeyVisor), and post-quantum algorithms for IoT. His research themes include agile signature acceleration, fault attack mitigation, and hardware-software co-design for security. Notable projects include CONVOLVE (edge-AI security) and QuantumRISC (quantum-safe systems). His work bridges theoretical cryptography with practical hardware implementations, emphasizing real-world security applications.
Daniel Müller-Gritschnederمشاهده پروفایل
استاد مدعو
Daniel Müller-Gritschneder is an Adjunct Teaching Professor (Privatdozent) at the Technical University of Munich (TUM), affiliated with the Chair of Electronic Design Automation. He leads the 'Electronic System Level' research group, focusing on embedded systems, TinyML, virtual prototyping, and hardware resilience. He temporarily served as head of the Chair of Real-Time Systems (2019–2020) and holds a senior membership in IEEE. His research spans: TinyML : Optimizing neural network inference for microcontrollers. Virtual Prototyping : Fast simulation for embedded software development (e.g., ETISS simulator). Runtime Verification : Hardware monitoring for safety-critical systems. Fault Tolerance : Cross-layer resilience against soft errors. Design Automation : NoC synthesis and RISC-V toolchain optimization. His publications emphasize RISC-V-based systems, TinyML deployment, fault injection, and embedded AI. Recent works show trends toward compiler-assisted security, thermal management, and automated design-space exploration for edge devices. Awards: Best Paper Award (SiPS 2019) Habilitation Award (Bund der Freunde der TUM, 2019) 2nd Best Paper (SMACD'15) Best Paper nominations at DAC'07, DATE'10, Analog'10, NOCS'13 He advises researchers in the Electronic System Level group and contributes to EU projects (e.g., Scale4Edge). His lab develops tools like ETISS, MLonMCU, and Seal5 for RISC-V and TinyML ecosystems.
- Integrated Circuits
- Embedded Systems
- VLSI Design
- +۷ مورد دیگر
Prof. Dr.-Ing. Marc Reichenbach serves as the Chair of Integrated Systems at the Institute for Applied Microelectronics and Data Technology at the University of Rostock. His office is located at Albert-Einstein-Straße 26, 18059 Rostock, Room 102 (1st floor), with contact information including telephone (0381) 498 7270 and email marc.reichenbach@uni-rostock.de. Professor Reichenbach's research focuses on the intersection of hardware design and artificial intelligence, with particular expertise in memory technologies and computing architectures. His work spans several key areas: Development of specialized computer architectures for deep learning applications Advanced VLSI design and CPU architecture Emerging memory technologies, particularly RRAM (Resistive Random-Access Memory) FPGA-based acceleration systems Hardware implementations for neural networks and AI applications Analysis of Professor Reichenbach's recent publications (2023-2025) reveals a strong focus on memory computing technologies, particularly RRAM-based systems. His work demonstrates expertise across multiple dimensions of computer architecture including ASIC design, FPGA acceleration, and novel memory systems. The publications show a clear trajectory toward implementing AI and machine learning capabilities directly in hardware, with applications ranging from edge computing to satellite systems. A significant portion of his recent work addresses the challenges of implementing neural networks using emerging memory technologies, focusing on efficiency, reliability, and performance optimization. Professor Reichenbach teaches several advanced courses including: Computer architectures for deep learning applications Project seminar Embedded Systems Advanced VLSI Design (Advanced CPU Design) His research group appears to be actively engaged in several cutting-edge projects related to hardware acceleration for AI applications, memory computing, and embedded systems design. The group collaborates on projects involving digital twins for hardware systems, real-time operating systems for heterogeneous architectures, and specialized computing systems for various applications from medical devices to drone technology.
Prof. Dr. rer. nat. Rainer Leupers is a faculty member at RWTH Aachen University, chairing the Department of Software for Systems on Silicon. His research focuses on embedded systems, hardware-software co-design, virtual prototyping, and security in computing-in-memory architectures. He has published extensively on RRAM accelerators, logic locking, and neuromorphic security. Chair of Software for Systems on Silicon Research in hardware security and deep learning accelerators Recent publications on cross-tool virtual frameworks and thermal side-channel attacks His work bridges system-level modeling with practical security implementations, emphasizing reliability and performance in heterogeneous computing environments. Key trends in his 2025-2023 articles include compute-in-memory optimization, neural network inference efficiency, and security vulnerabilities in emerging hardware. Awards and formal recognitions are not explicitly detailed in the provided materials. He has not directly mentioned advising students or research grants in the given text fragments. The chair's contact information includes an office at ICT Cube 1, Electrical Engineering, Aachen, with direct email and website links.
Pascal Sasdrich is a Researcher at Ruhr University Bochum, Germany, affiliated with the Faculty of Computer Science and the Security Engineering department. He holds a PhD in IT-Security/Information Technology from the same university (2018), following M.Sc. (2015) and B.Sc. (2012) degrees in the same field. His research focuses on Hardware Security, Secure Processor Design, Computer-Aided Security, and Security by Design. He has extensive experience in cryptographic hardware implementations, including countermeasures against side-channel and fault attacks. Teaching includes courses on Processor Security and Implementation of Cryptographic Schemes. His work bridges theoretical security models with practical hardware implementations, emphasizing automated tools and formal verification for secure embedded systems. Key projects include contributions to Project HEP (open-source hardware security chip design) and development of methodologies like EASIMASK for automated masking in hardware. Publications span cryptographic hardware implementations, fault and side-channel countermeasures, and formal security verification. Notable works include combined threshold implementations, secure processor extensions, and automated generation of masked hardware circuits. Current research emphasizes securing embedded systems through holistic design approaches, including ISA extensions and automated EDA tools.
Nele Mentens is a full professor at both KU Leuven and Leiden University, where she leads cutting-edge research in applied cryptography, hardware security, and secure embedded systems. At KU Leuven, she is affiliated with the Faculty of Engineering Technology and the Electrical Engineering Department (ESAT), leading the Emerging Technologies, Systems & Security (ES&S) research group at the Diepenbeek campus. Simultaneously, she holds a full professorship at Leiden University’s Leiden Institute of Advanced Computer Science (LIACS), focusing on applied cryptography and security. She has been instrumental in numerous national and international research initiatives, including Horizon Europe and NWO-funded projects. Full Professor, KU Leuven (since 2023) Full Professor, Leiden University (since 2020) Associate Professor, KU Leuven (2014–2023) Post-doctoral Researcher & Lecturer, KHLim / KU Leuven (2007–2014) Ph.D. in Engineering Science, KU Leuven (2007) M.Sc. in Electrical Engineering, KU Leuven (2003) Her research focuses on secure and efficient hardware design, particularly for cryptographic applications on FPGAs, reconfigurable architectures, IoT security, and neuromorphic computing. She explores physical attack resistance, side-channel analysis protection, and trusted computing architectures, with applications in healthcare, industrial monitoring, and endpoint AI. Her work bridges theoretical cryptography with practical hardware implementations, emphasizing energy efficiency and real-time performance. The 15 most recent publications reflect a strong trend toward secure, energy-efficient, and intelligent embedded systems. Topics include neuromorphic AI accelerators, trusted IoT architectures, dynamic reconfiguration for side-channel protection, and secure medical data processing. These works span disciplines such as computer architecture, cybersecurity, digital design, and embedded systems, with a focus on hardware-software co-design and real-world deployment. Nele Mentens has received recognition for her contributions, including: Best Paper Award, DATE'16 Best Paper Nomination, AsianHOST'17 Best Paper Award, CHES'19 She has supervised over 15 Ph.D. students and post-docs, both current and former, and has served as principal investigator in approximately 25 funded research projects. Her work has attracted significant grants from Horizon Europe, NWO, FWO, and national innovation programs. She actively contributes to the academic community through editorial roles in top journals and leadership in major conferences. Nele Mentens leads the ES&S research group at KU Leuven and collaborates closely with LIACS at Leiden University. Her team includes Ph.D. students, post-docs, and research experts working on projects like NimbleAI, NeuroSoC, and TrustedIoT. She has also established secure electronics labs through infrastructure grants and maintains strong international ties with institutions such as EPFL, Ruhr University Bochum, and ETH Zurich.