Nikolaos Foutris is a Researcher at The University of Manchester, specializing in dependable and energy-efficient computer architectures. His work emphasizes hardware/software co-design, focusing on systems and processors that balance performance with reliability. Key research areas include memory optimization, GPU acceleration for cryptographic computations, and radiation effects on MPSoC systems. His research intersects with UN Sustainable Development Goals, particularly through energy-efficient technologies and resilient computing infrastructure. Collaborations span academia and industry, addressing challenges in NUMA systems, blockchain, and cloud applications. Recent publications highlight trends in memory analysis for managed applications, SPIR-V code generation frameworks, and mitigating radiation-induced errors in advanced embedded systems. No scientific awards or grants are explicitly mentioned in the provided text.
Professor Willy Zwaenepoel is a distinguished academic and Dean of the Faculty of Engineering at the University of Sydney. He holds Fellowships from ACM, IEEE, and ATSE. His research focuses on distributed systems, operating systems, and experimental computer science. Previously, he spent two decades at Rice University and nine years as Dean of EPFL's School of Computer and Communication Sciences before joining Sydney in 2018. Education: BS/MS, Ghent University (1979) MS/PhD, Stanford University (1980/1984) Research Interests: His work emphasizes distributed systems and operating systems, with contributions to key-value stores, transactional systems, and large-scale graph processing. Recent projects include optimizing geo-replicated systems and improving datacenter scheduling efficiency. Articles Trends: Recent publications address OS scheduling (Nest), distributed graph mining (Tesseract), and transactional systems' performance limits. He explores hardware-software co-design for multicore systems and energy-efficient data centers. Awards: Fellow of ACM (2021) Fellow of IEEE (2020) Fellow of ATSE (2019) Grants & Advising: Active grants include adaptive key-value store research (2021) and large-graph processing systems (2018). He advises PhD students and postdocs on distributed systems and storage challenges. Labs/Teams: Leads the Sydney systems research group focusing on scalable distributed systems and cloud infrastructure.
Andrew Nere serves as Assistant Professor of Computer Science in the Math & Computer Science Department at Western Colorado University, teaching courses including Introduction to Web Design, Computer Science I, and Software Entrepreneurship since joining the faculty in Fall 2022. His industry background includes co-founding Thalchemy (2013), a startup specializing in embedded machine learning for wearable and environmental sensor applications, alongside prior internships at IBM and Qualcomm. His educational credentials feature: PhD in Electrical Engineering from University of Wisconsin-Madison (2013) MS in Electrical Engineering from University of Wisconsin-Madison (2010) B.S. in Computer Engineering from St. Cloud State University (2007) Nere's research centers on hardware-software co-design for efficient AI deployment, with dual focus on neuromorphic computing architectures and practical embedded systems implementation. He bridges theoretical neuroscience with engineering solutions, particularly for resource-constrained environments like fitness trackers and environmental sensors where computational efficiency is paramount. His work emphasizes translating academic research into real-world applications rather than pure theoretical exploration. Analysis of his 2010-2013 publications reveals consistent innovation in brain-inspired computing hardware, with recurring themes of GPU-accelerated neural simulations, specialized cache architectures for AI workloads, and energy-efficient neuromorphic designs. The research demonstrates strong interdisciplinary collaboration across computer architecture, neuroscience, and machine learning communities, frequently targeting hardware acceleration for cognitive computing tasks. Scientific recognition includes: Best Paper Nomination at IEEE International Symposium on Workload Characterization (2012) Best Paper in Track at International Parallel and Distributed Processing Symposium (2011) Nere brings substantial industry experience to academia, having served as university collaborator on the DARPA/IBM SyNAPSE project modeling brain functionality in computing systems. His startup Thalchemy exemplifies his commitment to applied research translation, while his current Software Entrepreneurship course provides students with practical business development frameworks for technology ventures. He actively leverages Gunnison Valley's natural environment for both recreation and potential research applications, noting particular interest in environmental sensing opportunities afforded by the region's wilderness proximity and diverse ecosystems.
Stjepan Groš is an Associate Professor at the Faculty of Electrical Engineering and Computing (FER) , University of Zagreb. His research focuses on cybersecurity , industrial automation , and network traffic analysis . Department of Electronics, Microelectronics, Computer and Intelligent Systems Expertise in machine learning applications for security and formal methods in SCADA systems Extensive work on anomaly detection , firewall logs , and reputation systems His recent publications examine usability of cybersecurity solutions in industrial settings, JavaScript obfuscation analysis , and synthetic log generation for security testing. Themes include network anomaly detection , endpoint security , and attack modeling . No scientific awards were explicitly mentioned in the provided text. His research also addresses real-time processor modeling and distributed intrusion detection , with practical implementations in Linux environments.
Juan Jose Costa Prats is a researcher in the Department of Computer Architecture at the Universitat Politècnica de Catalunya (UPC), affiliated with the Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona. He is a key member of the CRAAX - Centre de Recerca d'Arquitectures Avançades de Xarxes, contributing to advanced research in computing systems and network architectures. His work is deeply integrated into competitive R&D projects, including Horizon Europe and national initiatives focused on digital innovation and infrastructure. Research Interests: Costa Prats specializes in high-performance and distributed computing, with a strong focus on parallel programming models (especially OpenMP), software distributed shared memory (SDSM), cloud computing, virtualization, and cybersecurity. His recent work emphasizes secure and resilient computing systems, particularly through RISC-V-based architectures, hypervisor extensions, and runtime malware detection using opcode analysis and machine learning. He also contributes to educational innovation through remote datacenter laboratories. Publication Trends: His recent publications (2021–2024) reflect a shift toward secure, trustworthy computing environments, especially in cloud and IoT contexts. Themes include RISC-V virtualization, intrusion detection using transfer learning, GPS spoofing detection, and secure development frameworks like Vitamin-V. These works highlight a convergence of system architecture, security, and machine learning. Scientific Awards: No specific awards mentioned in the provided text. Advising and Grants: While no formal students are listed, Costa Prats collaborates extensively with leading researchers such as Beatriz Otero, Ramon Canal, and Javier Verdú. He participates in numerous competitive R&D+i projects funded by the Spanish government and the European Union, including Horizon Europe, RIS3CAT, and national research programs, focusing on cloud resilience, intelligent cloud management, and RISC-V ecosystem development. Labs and Teams: He is an active member of the CRAAX research group at UPC, which works on advanced computing architectures. His research often involves collaboration with the Barcelona Supercomputing Center. His projects, such as Vitamin-V and Remote DasaLAB, indicate involvement in both secure computing environments and innovative educational platforms.
Ramon Canal Corretger is a Full Professor in the Department of Computer Architecture at the Faculty of Informatics of Barcelona (FIB), Universitat Politècnica de Catalunya (UPC). He previously served as Vice Dean of Postgraduate Studies at FIB and leads the VirtuOS (Virtualization and Operating Systems) research group. His work bridges computer architecture, hardware security, and system-level reliability. Doctorate from UPC, co-supervised at the University of Wisconsin-Madison Sabbaticals at Harvard University (2006–2007) and the University of Cyprus (2019–2020) Active leadership in EU-funded projects such as Vitamin-V (Horizon Europe) His research focuses on microarchitecture, processor and memory design, reliability under variability, and security at the hardware-software interface. He explores low-power multicore architectures, virtualization optimizations, and secure RISC-V-based systems. His recent work integrates AI for intrusion detection and privacy-preserving federated learning in fog computing environments. The most recent publications demonstrate a strong trend toward security, reliability, and trustworthy computing , particularly in RISC-V ecosystems and cloud/edge infrastructures. There is increasing emphasis on hardware-software co-design , attack detection via performance monitoring , and energy-efficient secure accelerators using emerging technologies like neuromorphic and photonic computing. Scientific Awards: HiPEAC Paper Awards (2017, 2010) IEEE Senior Member (2016) Fulbright Award (2006) IBM Faculty Award (2000) Best Student Paper at HPCA-6 (2000) Multiple teaching excellence recognitions from UPC and AQU Catalunya First Prize in Epson Foundation Rosina Ribalta Award (2001) He has advised several PhD students including Manish Rana, Zoran Jaksic, and Shrikanth Ganapathy, many of whom received honors such as the Intel Doctoral Student Programme recognition. His research is supported by competitive grants from the Spanish government, EU Horizon programs, and industry collaborations. He is actively involved in the design of secure, reliable, and efficient computing systems for future cloud and embedded applications. He leads the VirtuOS research group, which focuses on virtualization, operating systems, and hardware-software interface optimization. The group contributes to open-source RISC-V initiatives and participates in large-scale European R&D projects targeting trustworthy computing infrastructures.
Hwa Chang is a tenured Associate Professor in the Department of Electrical & Computer Engineering at Tufts University , where he has been a faculty member since 1987. He directs the Tufts Wireless Lab and oversees the Computer Engineering Program . His research focuses on wireless communications, sensor networks, distributed computing, and engineering education. Education: Ph.D. in Electrical and Computer Engineering (Drexel University, 1987), M.S. in Computer Science (Montana State University, 1983), B.S. in Engineering Science (National Cheng Kung University, 1977). Research Interests: Wireless Sensor Networks (WSNs), energy-efficient routing, mobile ad hoc networks, grid computing, and network security. Notable projects include the Wireless Grid initiative and WISeNET , exploring resource-sharing in dynamic environments. Awards: Outstanding Alumni Award (National Cheng-Kung University, 2005) Excellent Leadership and Service Award (New England Association of Chinese Professionals, 2005) $600K NSF grant for Virtual Markets research (2002-2004) Advising & Grants: Advised ~150 master students and 160 senior design projects Ph.D. graduates include Amlir Davis (2013), Na Wang (2009) Recipient of grants from BBN, NSF, and industry partnerships like A$W Technology Corp. Professional Activities: Leadership roles in New England Association of Chinese Professionals, IEEE, and global science organizations. Editor-in-chief for multiple conference proceedings.
Arvind is the Johnson Professor of Computer Science and Engineering at MIT and a member of CSAIL (Computer Science and Artificial Intelligence Laboratory). He holds a B.Tech. from IIT Kanpur (1969), M.S. and Ph.D. from the University of Minnesota (1972-1973). His research focuses on computer architecture, parallel computing, memory models, and hardware synthesis. He pioneered dataflow architectures and developed the pH programming language. Notable projects include the Monsoon dataflow machine and Sandburst, a semiconductor company for 10G-bit Ethernet routers. Arvind has received prestigious awards like the IEEE Harry H. Goode Memorial Award (2012) and ACM Fellow (2007). He co-founded Bluespec Inc. and managed collaborations like Nokia-CSAIL (2006-2010). His work spans academia and industry, emphasizing scalable systems and secure computing. Research interests include synthesis/verification of digital systems, graph algorithms, and weak memory models. Current projects explore next-gen Graph AI systems and financial security applications.
Dr. Marten van Dijk is a Full Professor in the Computer Security department at Vrije Universiteit Amsterdam (VU) since 2022 and a Group Leader for Computer Security at CWI since 2020. He also holds a Gratis Full Research Professor position at the University of Connecticut's ECE Department since 2020. Previously, he served as Associate and Full Professor at the University of Connecticut and held research roles at MIT CSAIL, RSA Laboratories, and Philips Research. PhD in Mathematics (1997, Eindhoven University of Technology) M.S. in Mathematics (Cum Laude, 1993) M.S. in Computer Science (Cum Laude, 1991) His research focuses on foundational computer security problems using cryptographic principles, including secure processor design, oblivious computation, and privacy-preserving machine learning. Notable contributions span Physical Unclonable Functions (PUFs), Aegis secure processor architecture, and oblivious RAM protocols. 15+ publications in 2023-2025 address topics like PUF cryptanalysis, differential privacy in federated learning, and Byzantine fault tolerance Key journals: IEEE Transactions on Computers, Journal of Cryptology, ACM CCS Conference Award highlights include: IEEE Fellow (2022) for secure processor design and encrypted computation IEEE Technical Achievement Award (2023) Intel Test of Time Award (2022) ACM CCS Best Paper (2013) A. Richard Newton Technical Impact Award (2015) His technical leadership spans hardware security (blu-ray error correction codes), cryptographic protocol design, and machine learning privacy frameworks. Current projects focus on secure processors with hardware-enforced isolation and differential privacy optimization.
Manuel Alejandro Pajuelo González is a researcher at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture and the School of Computer Science. His research focuses on Performance measurement Operating systems Virtualization Thread assignment in multithreaded processors Recent publications show strong trends in RISC-V architectures, cybersecurity, and performance optimization. Key themes include Hardware virtualization Intrusion detection frameworks Statistical thread assignment approaches Spin-lock overhead analysis Scientific awards include BDigital Global Congress 15ª Edició Computación de Altas Prestaciones VI HiPEAC Paper Award He participated in multiple competitive R&D projects, including the DRAC project focused on RISC-V accelerators for next-generation computing.
Dustin Richmond is an Assistant Professor in the Department of Computer Science and Engineering at the Baskin School of Engineering, University of California, Santa Cruz. His work focuses on secure, usable hardware systems with applications in FPGA acceleration, RISC-V architectures, and side-channel analysis. Email: drichmond@ucsc Office: Engineering 2, Room 221 Research Interests: Secure hardware systems FPGA-based computing Manycore processors High-level synthesis Side-channel vulnerabilities Notable Article Trends: Recent publications emphasize cloud FPGA security, manycore design optimization, and hardware security. Earlier works focus on RISC-V acceleration, OpenCL compiler enhancements, and heterogeneous computing systems. GitHub Contributions: Maintains open-source projects like RISC-V-On-PYNQ and PYNQ-HLS, addressing FPGA programming challenges and RISC-V integration. Active in resolving community issues related to toolchain compatibility and hardware-software interfaces.
Eva Rodríguez is an Associate Professor in the Department of Network Engineering at Pompeu Fabra University's School of Engineering, specializing in cybersecurity, digital rights management, and IoT security. With over 50 publications since 2003, she has established herself as a leading researcher in secure network architectures and privacy-preserving technologies. Her research focuses on applying machine learning techniques to cybersecurity challenges, particularly in mobile and IoT environments. Rodríguez has published extensively on deep learning for intrusion detection, privacy protection mechanisms, and security frameworks for next-generation networks (5G/6G). She has also made significant contributions to RISC-V processor security through the Horizon Europe Vitamin-V project. Recent work shows a strong emphasis on federated learning approaches for privacy preservation in fog computing environments and the development of security management architectures for resilient wireless ecosystems. Her publication record demonstrates consistent leadership in both theoretical frameworks and practical implementations of security solutions. Among her notable contributions are comprehensive surveys on deep learning techniques for mobile network security and machine learning methods for IoT privacy protection, which have become important references in these rapidly evolving fields. As a research supervisor, she has mentored several doctoral students including Norma Gutiérrez and Beatriz Otero, who now appear as co-authors on her recent publications. Her collaborative work extends across multiple European research projects, demonstrating strong integration within the international cybersecurity research community.
Eric Larson is a Professor and Associate Chair in the Department of Computer Science at Seattle University's College of Science & Engineering. He holds a PhD in Computer Science & Engineering from the University of Michigan and maintains an active research program focused on software engineering tools with educational applications. His research interests include: Software testing and verification Concurrency and parallel programming Educational tools for computer science education Static and dynamic program analysis Mobile security and Android applications Computer architecture and simulation Dr. Larson's publication record shows a consistent research trajectory from low-level architectural simulation (MASE, 2001) to educational concurrency tools (MDAT, 2013) and specialized analysis tools (EGRET, 2016). His work demonstrates strong practical applications in computer science education, with tools designed specifically to help students grasp challenging concepts in programming and systems. Notable contributions include: EGRET for regular expression testing MDAT for multithreading education Permeate for Android security analysis ANNA for computer architecture education SUDS for bug detection infrastructure MASE for microarchitectural simulation Dr. Larson actively collaborates with students, as evidenced by numerous co-authored publications, and maintains laboratory space for software analysis and educational tool development. His personal website (last updated September 2022) serves as a repository for his research tools and publications, reflecting his commitment to open dissemination of educational resources.
Resit Sendag is a Professor and Director of Graduate Studies in the Department of Electrical, Computer and Biomedical Engineering at the University of Rhode Island. He serves as Director of both the URI Computer Architecture Laboratory and the URI Generative AI Development Group, leading cutting-edge research in computer architecture and high-performance computing. His academic credentials include: Ph.D. in Computer Engineering from the University of Minnesota (2003) B.Sc. in Electrical Engineering from Hacettepe University, Ankara (1994) Professor Sendag specializes in computer architecture with research interests spanning processor design, memory systems, parallel computing, and hardware acceleration. His work focuses on improving computational performance through innovative techniques in cache management, prefetching, branch prediction, and specialized hardware implementations using FPGAs and GPUs. Recent research has expanded into applying these architectural principles to solve complex optimization problems like vehicle routing. His publication record demonstrates a consistent evolution from fundamental computer architecture research toward practical applications of architectural techniques. The most recent work shows strong emphasis on implementing genetic algorithms for vehicle routing problems using specialized hardware platforms (FPGAs and GPUs), while maintaining his foundational research on memory access optimization through sophisticated prefetching techniques. Professor Sendag has secured research funding from the Office of Naval Research through collaborative projects with the University of Connecticut focused on advanced manufacturing, shipbuilding processes, and material tracking systems. He actively mentors graduate students, with current advisees working on challenging computer architecture projects. His former students have achieved notable success at leading technology institutions including ETH-Zurich, Intel, NVIDIA, AMD, and various research laboratories. Professor Sendag leads key research initiatives including the URI Computer Architecture Laboratory, the Generative AI Development Group, and the PatternFinder project (an NSF-funded open-source tool for program behavior analysis).
Kaan UYAR is an Assistant Professor in the Department of Software Engineering at Near East University since March 2023, with continuous academic service at the institution since 1993. His career progression includes roles as Lecturer in Electrical and Electronic Engineering (1995-2000), Dr (2006-2007), Assistant Professor in Computer Engineering (2008-2011, 2013-2023), and administrative positions including Vice-Chair of Computer Engineering (2007-2010) and Chair of Information Systems Engineering (2011-2013). His extensive educational background includes: BSc in Electrical and Electronics Engineering from Anadolu University (1992) MA in International Relations from Near East University (1994) Pedagogical formation from Ataturk Teacher Training Academy (1996) BA in Public Administration from Anadolu University (1998) MSc in Computer Engineering from European University of Lefke (1999) PhD in Computer Engineering from Near East University (2006) Uyar's research spans artificial intelligence , systems and control , engineering education , and e-government , with emphasis on practical applications of computational intelligence. His work demonstrates deep integration of deep learning for medical image analysis and neuro-fuzzy systems for forecasting, applied to critical domains including cancer diagnosis, disease outbreak prediction, and accessibility compliance. Analysis of his 2018-2024 publications reveals three dominant research trajectories: (1) web accessibility assessments across Cyprus, Ethiopia, and the EU focusing on government, health, and retail sectors; (2) medical diagnostics using AI for lung, colon, and breast cancer detection; and (3) forecasting systems for public health (measles) and agriculture (food security) using adaptive neuro-fuzzy techniques. His regional focus on Cyprus and Ethiopia highlights contextualized problem-solving. Uyar maintains active professional engagement through membership in the IEEE and Cyprus Turkish Chamber of Electrical Engineers , reflecting his commitment to engineering standards and academic discourse within regional and international communities.
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