جستجوی استاد راهنمای دانشگاهی

Michael O'Boyleمشاهده پروفایل

استاد

• Heterogeneous Code discovery and Optimisation
• Neural Machine Translation and Neural Synthesis
• Deep Neural Network system stack
• +۷ مورد دیگر

Michael O'Boyle is a Professor at the University of Edinburgh's School of Informatics, where he serves as Director of the ARM Research Centre of Excellence and the EPSRC Centre for Doctoral Training in Pervasive Parallelism. Holding an EPSRC Established Career Research Fellowship, he leads pioneering work in compiler technology for heterogeneous architectures, bridging theoretical advances with practical high-performance computing applications. Professor O'Boyle's research spans multiple cutting-edge areas including heterogeneous code discovery and optimization, neural machine translation for program synthesis, deep neural network system stack optimization, software-defined hardware, and compiler/architecture co-design. His approach integrates constraint analysis, program synthesis, and machine learning to address complex challenges in high-performance computing across diverse hardware platforms. His recent publications reveal a strong trend toward integrating machine learning with traditional compiler techniques, particularly in neural program synthesis, tensor optimization, and architecture-aware compilation. This work represents a paradigm shift in compiler design, moving from rule-based systems to learning-based approaches that can automatically adapt to diverse hardware targets. IEEE/ACM CGO 2025 Distinguished Paper Award for 'Tensorize: Fast Synthesis of Tensor Programs from Legacy Code' IEEE/ACM CGO 2024 Test of Time Award ACM GPCE 2023 Best Paper Award for 'C2TACO: Lifting Tensor Code to TACOM' ACM ASPLOS 2021 Distinguished Paper Award IEEE HPCA 2021 Best Paper Award for 'Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads' Professor O'Boyle has successfully mentored numerous PhD students who have secured prominent positions in academia (including at Cambridge, Edinburgh, Leeds, and McGill) and industry (including Meta, NVIDIA, Qualcomm, Huawei, and Microsoft). His research is supported by significant funding from EPSRC, ARM, and European projects including Bonseyes and Transmuter, demonstrating strong international recognition and industry impact. He leads the influential Compiler and Architecture Design (CArD) Group at the University of Edinburgh and is a founder of the HiPEAC Network of Excellence, which has grown into a major European initiative connecting researchers and practitioners in high-performance and embedded computing.

James C. Hoeمشاهده پروفایل

استاد

• Computer Architecture
• Reconfigurable Computing
• High-Level Hardware Design and Synthesis
• +۴ مورد دیگر

James C. Hoe is Professor of Electrical and Computer Engineering at Carnegie Mellon University (College of Engineering). He is on sabbatical at MangoBoost and directs research in computer architecture, reconfigurable computing, and high-level hardware design. Education Ph.D., Electrical Engineering and Computer Science, MIT (2000) M.S., Electrical Engineering and Computer Science, MIT (1994) B.S., Electrical Engineering and Computer Science, UC Berkeley (1992) Research Interests Professor Hoe’s work spans computer architecture , reconfigurable computing , FPGA architectures , and high-level hardware synthesis . His group created the CoRAM abstraction for virtualized FPGA computing and leads efforts in power-efficient accelerators, in-network computing, and security-oriented FPGA systems. Scientific Awards IEEE Fellow (2013) Intel Outstanding Researcher Award (2021) Research Funding & Projects Intel / VMware Crossroads 3D-FPGA Academic Research Center – co-leading exploration of FPGA roles in future datacenters. DARPA BRASS program ($2.7 M, 4 years) – ensuring long-lived software systems remain robust to resource changes. Pigasus open-source IDS – world’s fastest FPGA-accelerated intrusion-detection system (100 Gb/s on one server). Labs & Teams He heads activities within the Computer Architecture Lab at Carnegie Mellon (CALCM) , supervising graduate researchers on CoRAM++, SPIRAL autotuning, and FPGA overlays for stream processing.

Rabi N. Mahapatraمشاهده پروفایل

استاد

• Embedded systems
• System-on-chip
• Reconfigurable architectures
• +۸ مورد دیگر

Rabi N. Mahapatra is a Professor in the Department of Computer Science & Engineering at Texas A&M University, within the College of Engineering. His research focuses on embedded systems, reconfigurable architectures, real-time systems, and semantic networks. He holds a Ph.D. in Computer Engineering from the Indian Institute of Technology (1992), an M.S. in Electrical Engineering (Sambalpur University, 1984), and a B.S. in Electronics & Communication (Sambalpur University, 1979). His research interests include Network-on-Chip (NoC), data analytic co-design, IoT protocols, and temperature-aware energy management. His work emphasizes hardware-software co-design for complex systems, with applications in many-core processors, semantic search engines, and real-time embedded systems. Key publications highlight contributions to collaborative filtering on many-core architectures, low-jitter clock distribution circuits, and energy-efficient scheduling. He has been recognized as an IEEE Computer Society Distinguished Visitor (2005–2007) and received the BOYS-CAST Indo-US Young Scientist Award. He leads the Codesign Embedded Systems group at Texas A&M, exploring cutting-edge topics such as photonics NoC, reservoir computing, and IoT security. His research bridges theory and practice, addressing challenges in scalable systems and embedded applications.

Mohamed Hassanمشاهده پروفایل

استادیار

• Computer Architecture
• Embedded Systems
• Real-Time Systems
• +۱۲ مورد دیگر

Dr. Mohamed Hassan is an Assistant Professor in the Department of Electrical & Computer Engineering at McMaster University. His research focuses on Cyber-Physical Systems-on-Chip (iCPSoCs) , emphasizing design, analysis, and deployment for critical domains like Unmanned Aerial Vehicles (UAVs), Autonomous Cars, and healthcare systems. Key research areas include hardware/software codesign, real-time systems, embedded systems, and security. He teaches courses such as COMPENG 4DM4 (Computer Architecture) and COMPENG 4DS4 (Embedded Systems) . His work bridges foundational theories (e.g., scheduling, AI) with infrastructure-level innovations (e.g., compilers, memory systems). The Fanos Research Lab he leads explores interdisciplinary solutions for efficient CPS-on-Chip, addressing challenges in multicore predictability, memory latency, and edge computing. Recent contributions include frameworks for explainable memory-centric workloads and techniques to accelerate TinyML inference. Dr. Hassan serves on Technical Program Committees for conferences like RTAS and OSPERT, highlighting his role in advancing real-time embedded systems research.

Vincent John Mooney IIIمشاهده پروفایل

دانشیار

• Hardware-Software Co-Design
• Cyber Physical Systems Security
• System Level Design
• +۷ مورد دیگر

Vincent John Mooney III is an Associate Professor at the School of Electrical and Computer Engineering and an Adjunct Associate Professor at the School of Computer Science, Georgia Institute of Technology. His research focuses on Hardware-Software Co-Design , Cyber Physical Systems Security , and Low-Power Architectures . He has authored numerous publications on topics such as probabilistic computing, hardware security, and embedded systems design. Dr. Mooney has received prestigious awards including the NSF Career Award , National Semiconductor Fellowship , and ARCS Best Paper Award . Education: Ph.D. in Electrical Engineering (1998), Stanford University MA in Philosophy (1997), Stanford University MS in Electrical Engineering (1994), Stanford University Certificate of Graduate Study (1992), University of Navarra BS in Electrical Engineering and Computer Science (1991), Yale University Research interests span hardware/software codesign, cybersecurity in embedded systems, and synthesis of reconfigurable architectures. His recent work includes Gridtrust for decentralized supply chain cybersecurity and COPPER for computation obfuscation. Dr. Mooney has supervised numerous Ph.D. students and held leadership roles in conferences such as HOST and CASES . Scientific awards include NSF Career Award (2000) National Semiconductor Fellowship (1997-1998) AT&T Engineering Scholarship Program (1987-1991) NCAA Postgraduate Scholar (1991) Senior Member, IEEE (2003) ARCS 2012 Best Paper Award Advising and grants highlight his mentorship of students like Jun Cheol Park and Yudong Tan , along with grants such as the U.S. Air Force Summer Faculty Fellowship (2007). He leads the Hardware/Software Codesign for Security Group at Georgia Tech and has contributed to advancements in real-time operating systems and deadlock detection algorithms.

Trevor Brownمشاهده پروفایل

دانشیار

• Concurrent Data Structures
• Lock-Free Algorithms
• Transactional Memory
• +۴ مورد دیگر

Trevor Brown is an Associate Professor in the Computer Science department at the University of Waterloo, affiliated with the Cheriton School of Computer Science. He leads the Multicore Lab and specializes in concurrent data structures, non-blocking algorithms, and memory management. His research bridges theory and systems, focusing on practical implementations of lock-free trees, transactional memory, and techniques for non-uniform memory architectures. Education includes a PhD in Computer Science from the University of Toronto and a B.Sc. in Computer Science and Mathematics from York University. Research interests center on concurrent systems, with recent work exploring hardware-accelerated indexing, memory reclamation techniques, and performance anomalies in microbenchmarks. His publications demonstrate consistent innovation in parallel computing, with articles frequently appearing at top conferences like PPoPP, SPAA, and DISC. Sustainable energy research includes optimizing hybrid power systems and battery storage solutions. Awards include multiple best paper/artifact recognitions at SPAA and PPoPP, teaching excellence honors, and nominations for the Governor General’s Gold Medal. Extensive advising includes 13+ graduate students and PDFs, with research grants exceeding $965K from NSERC, Huawei, and CFI. He directs the Multicore Lab, developing open-source tools like SetBench for rigorous performance benchmarking.

Xin Fuمشاهده پروفایل

استاد

• Computer Architecture
• Machine Learning
• Energy-Efficient Computing
• +۲ مورد دیگر

Dr. Xin Fu is a Professor in Electrical and Computer Engineering at the University of Houston's Cullen College of Engineering, holding a PhD from the University of Florida. His research spans computer architecture, energy-efficient systems, machine learning acceleration, and hardware reliability, with applications in edge computing and quantum systems. Awarded the NSF CAREER Award and named Miller Scholar, he leads innovations in heterogeneous computing architectures. Research focuses on optimizing hardware-software co-design for AI workloads, with current projects in federated learning optimization, quantum computing reliability, and neural network acceleration. Recent publications demonstrate cross-cutting work in mobile AI deployment, adversarial defense mechanisms, and quantum error correction. Honors include: NSF Faculty Early CAREER Award (2014) Four-time recipient of competitive NSF research grants Miller Scholar recognition for teaching and research excellence

Nele Mentensمشاهده پروفایل

استاد

• Applied Cryptography
• Hardware Security
• Secure Coprocessor Design
• +۱۲ مورد دیگر

Nele Mentens is a full professor at both KU Leuven and Leiden University, where she leads cutting-edge research in applied cryptography, hardware security, and secure embedded systems. At KU Leuven, she is affiliated with the Faculty of Engineering Technology and the Electrical Engineering Department (ESAT), leading the Emerging Technologies, Systems & Security (ES&S) research group at the Diepenbeek campus. Simultaneously, she holds a full professorship at Leiden University’s Leiden Institute of Advanced Computer Science (LIACS), focusing on applied cryptography and security. She has been instrumental in numerous national and international research initiatives, including Horizon Europe and NWO-funded projects. Full Professor, KU Leuven (since 2023) Full Professor, Leiden University (since 2020) Associate Professor, KU Leuven (2014–2023) Post-doctoral Researcher & Lecturer, KHLim / KU Leuven (2007–2014) Ph.D. in Engineering Science, KU Leuven (2007) M.Sc. in Electrical Engineering, KU Leuven (2003) Her research focuses on secure and efficient hardware design, particularly for cryptographic applications on FPGAs, reconfigurable architectures, IoT security, and neuromorphic computing. She explores physical attack resistance, side-channel analysis protection, and trusted computing architectures, with applications in healthcare, industrial monitoring, and endpoint AI. Her work bridges theoretical cryptography with practical hardware implementations, emphasizing energy efficiency and real-time performance. The 15 most recent publications reflect a strong trend toward secure, energy-efficient, and intelligent embedded systems. Topics include neuromorphic AI accelerators, trusted IoT architectures, dynamic reconfiguration for side-channel protection, and secure medical data processing. These works span disciplines such as computer architecture, cybersecurity, digital design, and embedded systems, with a focus on hardware-software co-design and real-world deployment. Nele Mentens has received recognition for her contributions, including: Best Paper Award, DATE'16 Best Paper Nomination, AsianHOST'17 Best Paper Award, CHES'19 She has supervised over 15 Ph.D. students and post-docs, both current and former, and has served as principal investigator in approximately 25 funded research projects. Her work has attracted significant grants from Horizon Europe, NWO, FWO, and national innovation programs. She actively contributes to the academic community through editorial roles in top journals and leadership in major conferences. Nele Mentens leads the ES&S research group at KU Leuven and collaborates closely with LIACS at Leiden University. Her team includes Ph.D. students, post-docs, and research experts working on projects like NimbleAI, NeuroSoC, and TrustedIoT. She has also established secure electronics labs through infrastructure grants and maintains strong international ties with institutions such as EPFL, Ruhr University Bochum, and ETH Zurich.

Frank Piessensمشاهده پروفایل

استاد

• Software Security
• System Security
• Formal Methods
• +۲ مورد دیگر

Frank Piessens is a Professor in the Department of Computer Science at Katholieke Universiteit Leuven (Belgium). His work bridges software security, systems security, formal methods, and programming languages. He actively investigates information flow security, with a dual focus on attack techniques and defense mechanisms. Current role: Professor at KU Leuven (Belgium) Research areas: Software Security, System Security, Formal Verification, Programming Languages Research Interests: His defense work includes formal verification for C-like languages, memory safety hardening, micro-architectural side-channel mitigation, and embedded security architectures. On the attack side, he studies transient execution attacks, memory safety exploits, and controlled channel attacks. Recent Article Trends: His publications span secure compilation techniques (2025), control-flow linearization (2024), functional reactive programming (2021-2014), formal verification (2020-2016), and hardware/software co-design security (2022). Keywords cluster around Computer Science , Security , and Programming Languages .

Changhee Jungمشاهده پروفایل

دانشیار

• Compilers
• Computer Architecture
• Performance Optimization
• +۷ مورد دیگر

Changhee Jung is the Samuel D. Conte Associate Professor of Computer Science at Purdue University, Department of Computer Science. His research focuses on compilers and computer architecture with an emphasis on performance, reliability, and security. He joined Purdue in Fall 2019 after serving as an Assistant Professor at Virginia Tech (2013–2019). Prior academic roles include a post at ETRI (2005–2008) and internships at Google (2010–2012). Education: PhD in Computer Science from Georgia Institute of Technology (2013) under Prof. Santosh Pande. His work spans compiler-architecture co-design for intermittent computing, nonvolatile memory systems, and security frameworks like PeX for Linux kernel permission checks. Notable recognitions include the NSF CAREER Award (2018) and induction into the MICRO Hall of Fame (2021). Research interests include energy-efficient computing, fault resilience, and compiler-driven hardware optimizations. His lab, CompArch, emphasizes cross-layer solutions for performance, reliability, and security challenges. Recent projects include IPEX (ISCA 2025), Write-Light Cache (ISCA 2023), and DevFuzz (Oakland 2023). Awards: NSF CAREER, MICRO Hall of Fame, Memorable Paper Finalist (NVMW 2024), Best Student Paper Finalist (SC 2016), and multiple industry awards. Active in service roles, including program chair for LCTES 2020 and editorial roles for ACM journals. Teaching: Courses include CS 352 (Compilers), CS 502 (Compiling Systems), and advanced special topics. Supervised over 15 graduate students and postdocs, with alumni in academia and industry (e.g., Samsung, Intel, Xilinx).

Catherine Schumanمشاهده پروفایل

استادیار

• Neuromorphic Computing
• Artificial Intelligence
• Hardware-Software Co-Design
• +۷ مورد دیگر

Catherine Schuman is an Assistant Professor in the Min H. Kao Department of Electrical Engineering and Computer Science at the University of Tennessee, Knoxville, part of the Tickle College of Engineering. Her work focuses on neuromorphic computing, spiking neural networks, and AI-driven hardware-software co-design. She holds a Ph.D. and B.S. in Computer Science and Mathematics from the University of Tennessee (2015 and 2010, respectively). Research interests include neuromorphic systems, energy-efficient computing architectures, stochastic devices, and applications of neuromorphic computing in scientific domains like materials science and quantum materials. She emphasizes benchmarking frameworks (NeuroBench) and real-world applications such as radiation detection and control systems. Her recent publications (2023-2025) highlight advancements in neuromorphic hardware-software co-design, spiking reinforcement learning frameworks, and neuromorphic implementations for scientific computing. Notable contributions include frameworks like SpikeRL, NeuroPong, and the RISP neuroprocessor, emphasizing open-source tools for embedded neuromorphic computing. No scientific awards are explicitly listed in the provided information. She actively explores cross-disciplinary applications, including combustion control and materials discovery through AI-enhanced device design.

Alex K. Jonesمشاهده پروفایل

استاد

• Quantum Computing
• Computer Architecture
• Nanoscale Magnetic Memory Systems
• +۵ مورد دیگر

Dr. Alex K. Jones is a Professor in the Department of Physics & Astronomy at the University of Pittsburgh, with a secondary appointment. His research focuses on quantum computing architectures, sustainable computing, and emerging memory technologies. He leads projects funded by NSF, DARPA, NSA, ARO, and industry, emphasizing energy-efficient computing systems and fault-tolerant designs. Dr. Jones' work spans quantum system co-design (e.g., superconducting qubit architectures), nanoscale magnetic memories (racetrack/STT-MRAM), and carbon lifecycle modeling for computing systems. He has pioneered concepts like GreenChip sustainability tools and CORUSCANT processing-in-memory frameworks. His IEEE Fellowship and Best Paper Award (IGSC 2018) highlight his impactful contributions. Key Research Areas: Quantum Computing, Non-Volatile Memories, Sustainable Computing, Fault Tolerance Funding Agencies: NSF, DARPA, NSA, ARO, Industry Collaborations Major Projects: Quantum circuit decomposition, racetrack memory applications, carbon modeling for datacenters His 200+ publications include seminal works on fault tolerance in domain-wall memories, energy-efficient architectures, and cross-disciplinary innovations at the intersection of physics and computer engineering. Current efforts explore carbon depreciation models and real-time accelerator customization for edge computing.

Patrick Robert Schaumontمشاهده پروفایل

استاد

• Hardware Security
• Cryptographic Engineering
• Tamper-Resistant Design
• +۴ مورد دیگر

Patrick Robert Schaumont is a Professor of Electrical & Computer Engineering at Worcester Polytechnic Institute (WPI), holding the Joseph Samuel S. Satin Distinguished Fellowship. He specializes in hardware security, cryptographic engineering, and tamper-resistant design. His research focuses on challenges in secure hardware/software codesign, side-channel analysis, and fault injection countermeasures. Education: BS in Electrical Engineering from Ghent University College (1988), MS in Computer Science from University of Ghent (1990), and PhD in Electrical Engineering from UCLA (2004). Research Interests: Schaumont's work spans hardware security topics such as cryptographic implementation security, embedded systems protection, and secure design methodologies. He emphasizes real-world demonstrations and student-driven innovation, with projects like the Vernam Lab at WPI. His research has produced numerous demonstrators and open-source tools, including the SCAPEgoat library for side-channel analysis. Notable Contributions: IEEE Fellow (2025), Dean's Excellence Professor, and Radboud Excellence Program Visiting Professor. He has advised over 50 students, many of whom work at leading tech companies like NVIDIA, Google, and Qualcomm. Labs & Teams: Director of the Vernam Lab, focused on advancing secure hardware and embedded systems research. Collaborates with industry and academia on topics like post-quantum cryptography and fault-resistant designs.

Gregor Sneltingمشاهده پروفایل

استاد

• Programming Languages
• Compiler Construction
• Program Analysis
• +۷ مورد دیگر

Gregor Snelting is a Professor and head of the Chair of Programming Paradigms at the Karlsruhe Institute of Technology (KIT), Faculty of Computer Science, Institute for Programming Languages and Compiler Construction. His research focuses on compiler construction, program analysis, software security, and verification. His primary research interests include programming languages, compiler design, program analysis, software security, information flow control, formal verification, object-oriented and concurrent programming, and software reengineering using concept analysis. His work aims to provide solid theoretical foundations and empirical validation. The research output, particularly the 15 most recent articles, shows a strong emphasis on software security and program analysis, with a focus on information flow control in Java using the JOANA tool. There is also a significant thread on invasive computing and resource-aware parallel programming. The work combines deep theoretical contributions, such as formal semantics and correctness proofs, with practical tool development and empirical validation. Faculty Teaching Award for the course 'Practice in Software Development' Snelting leads a research group that has developed several significant tools, including JOANA for security analysis, the Praktomat system for automated grading of programming assignments, and contributions to the libFirm compiler framework. His group is a key participant in major research initiatives like the DFG Collaborative Research Center InvasIC and the DFG Priority Program RS3. He advises students and supervises theses, fostering research in programming paradigms and software security. The group is involved in several key research projects: JOANA for information flow control in Java, InvasIC for invasive computing and dynamic parallelism, Quis-Custodiet for machine-checked correctness proofs of security analyses, and the development of the libFirm compiler framework.

Ranga Vemuriمشاهده پروفایل

استاد

• Hardware Trust and Security
• VLSI Design
• Formal Verification
• +۵ مورد دیگر

Dr. Ranga Vemuri is a Professor in the Department of Electrical and Computer Engineering at the University of Cincinnati since 1989. His research focuses on Hardware Security, VLSI Design, Formal Verification, Reconfigurable Computing, and Electronic Design Automation. He has advised over 40 PhD and 60 MS students, and his work is funded by agencies like AFRL, DARPA, NSF, and industry partners. Education: Ph.D. in Computer Engineering, Case Western Reserve University (1988) M.Tech. in Computer Engineering, Indian Institute of Technology Kharagpur (1984) B.Tech. in Electronics and Communications Engineering, Nagarjuna University (1983) Research Interests: Dr. Vemuri's work spans Hardware Trust and Security , VLSI Design and Architectures , Formal Methods , and Reconfigurable Computing . He pioneers techniques in analog and digital circuit synthesis, FPGA architectures, and leakage-power reduction strategies. His contributions include innovations in post-silicon validation, secure IC design, and side-channel attack mitigation. Grants & Collaborations: He has led over 20 grants totaling millions in funding, including projects on secure system design (SETS), obfuscation of hardware designs, and formal security assertions. Key collaborators include Galois Inc., Air Force Research Laboratory, and EDAptive Computing. Labs & Teams: His research group focuses on secure embedded systems, trusted microelectronics, and post-silicon validation methodologies. Collaborates extensively with industry and government labs on hardware security and design automation challenges.