برای مسیر پژوهشیتان، استاد راهنما، استاد دانشگاه و پژوهشگر مناسب را پیدا کنید و با آنها ارتباط بگیرید.
نمایش ۳۱-۴۵ از ۵۱ استاد راهنما
اطلاعات پروفایلها از صفحات عمومی دانشگاهها گرفته شده و ممکن است بهروز نباشد.
Manuel E. Acacio is Full Professor in the Computer Engineering Department at the University of Murcia, Spain, leading the Computer Architecture & Parallel Systems (CAPS) research group. His research advances multiprocessor systems through innovations in cache coherence protocols, hardware transactional memory, and synchronization mechanisms. Recent work explores efficient concurrency management, speculative execution, and hardware support for deep neural networks.
استادیار
Sanket Tavarageri is an Assistant Professor in the Computer Engineering Department at San José State University. He holds a Ph.D. in Computer Science and Engineering from The Ohio State University and a B.Tech from National Institute of Technology Karnataka. His research encompasses big data systems, machine learning infrastructure, and high-performance compiler technologies. Research areas include: Polyhedral compilation techniques for deep learning workloads Automatic parallelization and optimization frameworks Hardware-software co-design for computational efficiency Scalable machine learning systems His publication portfolio demonstrates consistent innovation in compiler architecture and parallel systems from 2013-2021. Recent work focuses on AI-enhanced compilation, automatic parallelism for deep learning models, and hardware-aware optimizations. Publications appear in ACM TACO, IEEE Big Data, IPDPS, and PLDI conferences. Tavarageri maintains an active industry connection as a researcher at Google. Tools developed through his BRIGHT laboratory are available on GitHub and Bitbucket. His teaching covers compiler technology, parallel computing, and systems design with emphasis on practical implementation.
استادیار
Mario Badr is an Assistant Professor (Teaching Stream) in the Department of Computer Science at the University of Toronto, part of the Faculty of Arts and Science. His research focuses on computer architecture, with an emphasis on simulation tools for evaluating multi-core, heterogeneous, and energy-harvesting systems. He has contributed to methodologies for analyzing memory behavior, synchronization performance, and cache coherence in modern architectures. Key research areas include parallel computing, performance analysis of GPU offloading, and energy-efficient computing models like the EH framework. His work often involves developing synthetic traffic models (e.g., SynFull) to assess architectural designs under realistic conditions. These tools enable early-stage exploration of trade-offs in processor architectures, particularly for mobile and embedded systems. Dr. Badr’s publications span topics such as cache behavior modeling, multi-core scalability, and intermittent computing. His research bridges theoretical analysis and practical implementation, with applications in both academic and industry contexts. While no specific awards or grants are listed, his contributions to architecture evaluation frameworks reflect a strong focus on advancing computational efficiency and system design.
Professor Alastair Donaldson is a faculty member in the Department of Computing at Imperial College London. He leads the Multicore Programming research group and teaches Object-Oriented Programming. His work focuses on programming languages, compiler verification, and GPU computing. Research Areas: Compiler fuzzing and testing Formal verification of GPU programs Memory and cache coherence protocols Concurrency and synchronization Language design for parallel computing Software reliability and bug detection Recent Contributions: His publications highlight advancements in fuzzing techniques for compilers, formal analysis of hardware-software interfaces, and GPU concurrency challenges. Key areas include zero-knowledge proofs, LLM code testing, and multi-level compiler verification. Groups & Labs: He directs the Multicore Programming research group, focusing on scalable concurrency solutions and programming language semantics.
Prof Susmit Sarkar is a Professor and Director of Research in the School of Computer Science at the University of St Andrews. He has been at St Andrews since 2013, following postdoctoral work at the University of Cambridge and a PhD from Carnegie Mellon University. He holds honorary fellowships at the University of Edinburgh and is a Fellow of the BCS and Senior Member of the ACM. His research focuses on concurrency, low-level software, and hardware-software interfaces, with contributions to memory consistency models (ARM, IBM POWER, RISC-V), parallel programming languages (C/C++/Java), and formal verification. He has served as an invited expert for RISC-V architecture and reviewed for top conferences/journals like PLDI and POPL. Teaching responsibilities in 2023-24 include CS3050 (Logic), CS4204 (Concurrency), and CS5031 (Software Engineering). Past teaching includes database systems and advanced programming projects. He supervises student research projects at all levels. Key awards include BCS Fellowship (201X), ACM Senior Membership (201X), and Honorary Fellowship at Edinburgh (20XX). Research has been funded by EPSRC/ERC/ANR grants, with projects on cache coherence verification, scalable shared memory, and parallel algorithm patterns. Publications span over 39 peer-reviewed works, including seminal papers on ARMv8 operational models, POWER memory synchronisation, and RISC-V architecture validation. Active in open-source projects like ModRef2018-MCM and community engagement through programming workshops.
Randal Burns is a Professor and Chair of the Department of Computer Science at Johns Hopkins University, where he leads the Hopkins Storage Systems Laboratory. He is also affiliated with the Kavli Neuroscience Discovery Institute, the Institute for Data-Intensive Science, and the Science of Learning Institute, reflecting his interdisciplinary research in data systems and neuroscience. His research focuses on building scalable data systems for big data exploration and analysis. Key areas include storage system performance, delta compression, distributed file systems, and data-intensive computing. He has made significant contributions to reliable storage, file access prediction, caching strategies, and in-place data reconstruction. The analysis of his recent publications shows a strong trend in optimizing large-scale storage systems, with emphasis on efficiency, scalability, and reliability. His work bridges theoretical algorithm design with practical system implementation in mass storage, distributed environments, and web-scale infrastructures. Dr. Burns has not been listed with any specific scientific awards in the provided text. He advises students and leads research projects through the Hopkins Storage Systems Laboratory, where he mentors advisees in storage systems and data-intensive computing. While no specific grants are mentioned, his lab leadership and publication record suggest active external funding and collaborative research. He directs the Hopkins Storage Systems Laboratory, a research group focused on advancing the design and performance of storage systems for modern data challenges, including big data, neuroscience applications, and distributed environments.
Ricardo Fernández Pascual is an Associate Professor at the Computer Engineering Department (DITEC) of the Universidad de Murcia , Spain. He teaches introductory and advanced computer architecture courses like ' Estructura y Tecnología de Computadores ' and ' Organización y Arquitectura de Computadores '. His academic work focuses on computer architecture , particularly in memory hierarchies for chip multiprocessors cache coherence protocols fault tolerance energy-efficient design His PhD thesis (2009) at the Universidad de Murcia, titled ' Fault-tolerant Cache Coherence Protocols for CMPs ', was supervised by José Manuel García Carrasco and Manuel Eugenio Acacio Sánchez. He has also collaborated with institutions like Intel Barcelona Research Center and FORTH. Recent research trends in his publications include optimizing coherence directories for manycore scalability hybrid photonic-electronic interconnects fault-tolerant mechanisms in CMP architectures transactional memory enhancements dynamic resource management private-shared cache organization He has advised PhD student Antonio García Guirado, who completed his thesis on energy-efficient cache-coherent multi-cores in 2013. His work has been published in leading journals like IEEE Transactions on Parallel and Distributed Systems, Journal of Parallel Distributed Computing, and conferences including ICS, HPCA, and SBAC-PAD.
Pen-Chung Yew is a Professor in the Department of Computer Science and Engineering at the University of Minnesota at Twin Cities. His research focuses on computer architectures, compilers, and system security, with particular emphasis on dynamic binary translation (DBT), system virtualization, and leveraging machine learning for compiler optimization. He holds a Ph.D. from the University of Illinois at Urbana-Champaign (1981), an M.S. from the University of Massachusetts Amherst (1977), and a B.S. from National Taiwan University (1972). Key research areas include enhancing security at micro-architectural and code levels, memory systems optimization, and parallel program debugging. Notable contributions include scalable emulators with retargetable DBT (DQEMU), efficient cross-ISA virtualization, and learning-based approaches for dynamic binary translation. He has been involved in NSF-funded projects exploring retargetable DBT and dynamic runtime optimization. Education: Ph.D., Computer Science, University of Illinois at Urbana-Champaign (1981) M.S., Computer Engineering, University of Massachusetts Amherst (1977) B.S., Electrical Engineering, National Taiwan University (1972) His work has received recognition, including a Best Paper Award Finalist at CGO 2020. Collaborations span institutions like the National Science Foundation and international conferences, with contributions to journals such as IEEE Transactions on Parallel and Distributed Systems and ACM Transactions on Architecture and Code Optimization. Grants and projects include NSF support for dynamic binary translation research and petascale simulation of turbulent stellar hydrodynamics. His research bridges theoretical advancements with practical applications in high-performance computing and secure systems.
Mark Greenstreet is a Professor in the Department of Computer Science at the University of British Columbia. He specializes in formal verification, VLSI design, and analog/mixed-signal (AMS) circuit analysis. His research includes developing tools like PReach (a parallel model checker) and COHO (reachability analysis), with applications in cyber-physical systems and energy-efficient computation. He holds affiliations with the Institute for Computing, Information, and Cognitive Systems (ICICS). Research Focus: Formal verification of hardware/software systems, model checking, analog circuit verification, energy-time trade-offs in VLSI, and theorem-proving integration with SMT solvers. His work bridges theoretical mathematics and practical circuit design, addressing challenges in reliability, scalability, and performance. Awards & Recognition: Recipient of Best Paper Awards at ASYNC 2011 and ASYNC 2003 for contributions to synchronizer analysis and self-timed interfaces. His research is supported by NSERC, Intel, and Oracle. Supervision & Teaching: Supervised over 20 graduate students, focusing on formal methods, parallel computing, and verification. Teaches courses on parallel computation, formal verification, and computer architecture. Labs & Tools: Developed PReach and COHO as open-source verification tools. Active in research groups exploring analog circuit modeling, reachability analysis, and hybrid systems verification.
John L. Hennessy is a renowned computer scientist and former President of Stanford University (2000–2016). As a professor of Electrical Engineering and Computer Science since 1977, he pioneered RISC architecture and co-founded MIPS Computer Systems and Atheros Communications. He currently serves as the Shriram Family Director of the Knight-Hennessy Scholars program and chairs Alphabet’s board. His leadership revitalized Stanford’s financial aid and arts programs, and his research contributions include seminal work in computer architecture and parallel processing. Education: Bachelor’s in Electrical Engineering from Villanova University (1973) Master’s and Ph.D. in Computer Science from Stony Brook University (1975–1977) Hennessy’s research interests span computer architecture, RISC technology, and high-performance computing. He co-authored landmark textbooks Computer Architecture: A Quantitative Approach and Computer Organization and Design , which are industry standards. His leadership roles include Dean of Engineering, Provost, and President at Stanford, and board memberships at Alphabet and the Gordon and Betty Moore Foundation. His articles and books focus on multiprocessor systems, cache coherence, and hardware-software co-design, reflecting his deep impact on both academia and industry. Key awards include the ACM Turing Prize (2017), IEEE Medal of Honor (2012), and the Vannevar Bush Award (2024). Grants & Leadership: Launched Knight-Hennessy Scholars, the world’s largest graduate fellowship program Directed Stanford’s growth in interdisciplinary research and accessibility initiatives Hennessy’s legacy combines technical innovation with transformative leadership in higher education.
دانشیار
Yufei Ding is an Associate Professor in the Computer Science & Engineering Department at the University of California, San Diego (UCSD), and founder of the PICASSO Lab. She earned a Ph.D. in Computer Science from North Carolina State University and a B.S. in Physics from the University of Science and Technology of China. Research Interests: Quantum Computing Machine Learning Domain-Specific Languages Compiler Optimization Hardware Acceleration High-Performance Computing Her recent publications focus on quantum compilation, error correction, and machine learning systems, with a particular emphasis on hardware-aware optimizations. She has received multiple prestigious awards, including the NSF CAREER Award (2020) and the IEEE TCHPC Early Career Researchers Award (2019). Scientific Awards: NSF CAREER Award (2020) IEEE Computer Society TCHPC Early Career Researchers Award (2019) Yufei actively advises Ph.D. students and postdoctoral researchers in quantum computing and machine learning systems. Her lab offers openings for both quantum computing and machine learning research.
دانشیار
Samira Khan is an Associate Professor in the Department of Computer Science at the University of Virginia (UVA), leading the ShiftLab research group. Her research focuses on computer architecture, high-performance computing, persistent memory systems, and processing-in-memory (PIM) technologies. Prior to UVA, she completed a postdoctoral fellowship at Carnegie Mellon University, supported by Intel Labs and an NSF GOALI award. She earned her Ph.D. in Computer Science from the University of Texas at San Antonio. Her work addresses challenges in memory and storage systems, including optimizing persistent memory reliability, enhancing PIM architectures, and mitigating security vulnerabilities in modern hardware. Notable projects include CRISP (a $29.7M initiative to tackle the 'memory wall'), and the development of tools like PiMulator and PIMProf for PIM emulation and profiling. Research trends in her articles emphasize advancing PIM efficiency, persistent memory security, and cloud-scale system optimization. She has pioneered techniques like NearPM for storage-class applications and EdgeRAG for edge device computing. Her work frequently intersects with real-world applications, such as improving data persistence in networks and enhancing fault tolerance in memory systems. Grants include NSF GOALI funding and Intel Labs support. She collaborates on multi-institutional projects and maintains an active open-source infrastructure (e.g., SoftMC for DRAM studies). Her lab focuses on bridging hardware-software gaps to deliver scalable, energy-efficient computing solutions.
استادیار
Dr. Ahmed Hassan is an Assistant Professor in the Department of Computer Science and Engineering at Lehigh University, part of the P.C. Rossin College of Engineering and Applied Science. He is a core member of the Scalable Systems Software (SSS) research group. Previously, he held an Assistant Professor position at Alexandria University and a Postdoctoral Research Associate role at Virginia Tech. His research focuses on distributed computing, concurrent and transactional data structures, multiprocessor programming, and NUMA-aware software design. He teaches courses including Analysis and Design of Algorithms, Advanced Programming Techniques, and Distributed Systems. Education: Ph.D., Computer Engineering, Virginia Tech, 2015 M.S., Computer Engineering, Alexandria University, Egypt, 2011 B.S., Computer Science, Alexandria University, Egypt, 2006 Research Interests: Hassan’s work spans distributed systems, transactional memory, and high-performance computing. He explores synchronization protocols, concurrent data structures, and optimizing software for multi-core architectures. His projects often address challenges in scalability, consistency, and efficiency in modern computing environments. Advising & Grants: While specific student advisees or grant details are not listed, his involvement with the SSS group suggests active participation in collaborative research projects. His work has been disseminated through top-tier conferences and technical reports, reflecting a strong focus on applied and theoretical systems research. Labs/Teams: Member of the Scalable Systems Software (SSS) research group at Lehigh University, focused on advancing scalable systems software and distributed computing solutions.
Eddie Kohler is the Microsoft Professor of Computer Science at Harvard University's Harvard John A. Paulson School of Engineering and Applied Sciences (SEAS), where he also serves as Director of Undergraduate Studies in Computer Science. His research focuses on high-performance systems, networks, and databases with an emphasis on concurrency control, data privacy, and scalable software design for multicore processors. He has contributed to foundational work in transactional systems, web application backends (e.g., Noria), and privacy-preserving technologies (e.g., Edna). His research spans theoretical frameworks like the Scalable Commutativity Rule and practical implementations such as the Alto lightweight virtualization system. Kohler's work often bridges theory and practice, addressing challenges in distributed systems, sensor networks, and regulatory compliance (e.g., GDPR). Notable contributions include innovations in in-memory database concurrency, optimistic transaction processing, and network congestion control protocols (e.g., TFRC-SP). His projects frequently emphasize system correctness through formal verification and empirical evaluation. His articles reflect a trajectory from foundational concurrency research to applied systems engineering, with recent focus on privacy in web applications and optimizing modern multicore architectures. No specific grants or advisees are listed in the provided information. Kohler leads research initiatives in scalable systems and maintains active collaboration with industry through his academic leadership roles.
Anant Agarwal is a Professor of Electrical Engineering and Computer Science at MIT, holding the rank of 'Professor Post-Tenure' in both CS and EE disciplines. He serves as CEO of edX, a leading platform for open online education. His primary affiliation is with the MIT Electrical Engineering & Computer Science Department within the MIT College of Engineering. Agarwal's research focuses on computer architecture, parallel processing, caching systems, and the integration of AI in clinical information systems. He has pioneered work on multicore processors, memory management, and self-optimizing computing systems. His academic contributions span over two decades, with notable advancements in tiled processor architectures, cache coherence protocols, and the design of energy-efficient embedded systems. Agarwal has been instrumental in developing MITx and edX, revolutionizing online education through scalable platforms like the 6.002x Circuits course. His work emphasizes blending traditional and digital learning modalities to enhance global access to education. Key research themes include parallel computing, machine learning applications in healthcare, and the future of higher education. His publications reflect a sustained focus on improving system performance, optimizing data management, and advancing educational technologies. Agarwal's leadership at edX underscores his commitment to democratizing access to world-class learning resources.
