Zhun Deng is a tenure-track Assistant Professor at the Department of Computer Science, University of North Carolina at Chapel Hill. His research bridges machine learning, statistics, and theoretical computer science, focusing on rigorous frameworks for responsible AI systems. He previously held postdoctoral positions at Columbia University and completed his Ph.D. at Harvard's Theory of Computation group under Cynthia Dwork. Ph.D. in Computer Science, Harvard University (2022) B.Sc. in Mathematics, Chu Kochen Honors College, Zhejiang University His research spans theoretical foundations of machine learning, including: Quantile-based risk control and conformal prediction Fairness guarantees in algorithmic decision-making Uncertainty quantification for LLMs Copyright frameworks for generative AI Physics-informed hybrid models Multi-agent reinforcement learning with constraints Recent work analyzes LLM alignment through distribution-free methods (ICML 2025), explores performativity challenges (ICML 2025), and develops calibration techniques (ICLR 2024). Collaborations include research interns from Stanford, MIT, and NYU. Students in his group include: Ruomeng Ding (Ph.D., UNC) Xiaowei Yin (Ph.D., UNC) Kaicheng Zhang (Ph.D., UNC)
Eric Wong is an Assistant Professor in the Department of Computer and Information Science at the University of Pennsylvania, affiliated with the ASSET Center and leading the Brachio Lab. His research focuses on robust and reliable machine learning, including model debugging, adversarial robustness, and explainable AI. He holds a PhD from Carnegie Mellon University (CMU), advised by J. Zico Kolter, and completed a postdoc with Aleksander Madry. His work bridges theory and practice, addressing challenges in model interpretability, safety, and scalability. Teaching includes CIS 5200 (Machine Learning), CIS 3333 (Mathematics for Machine Learning), and a specialized course on debugging ML pipelines. Notable contributions include the FIX Benchmark for interpretable features and defenses against LLM jailbreaking attacks. He received an Amazon Research Award in 2024 and has published extensively in top conferences like ICML, NeurIPS, and ICLR. Affiliations: University of Pennsylvania (CIS), ASSET Center, Brachio Lab Education: PhD in Machine Learning (CMU), Postdoc at MIT Key Projects: FIX Benchmark, DOLPHIN framework, SmoothLLM defense Awards: Amazon Research Award (2024) Lab Focus: Safe AI, model debugging, neurosymbolic learning
Florian Tramèr is an Assistant Professor in the Department of Computer Science at ETH Zurich, Switzerland, leading research at the intersection of machine learning security, privacy, and AI safety. His work focuses on identifying and mitigating security vulnerabilities in machine learning systems, particularly in large language models and other AI systems. Tramèr's primary research interests include adversarial machine learning, membership inference attacks, privacy-preserving AI, and the security implications of large language models. His work has significantly advanced our understanding of how machine learning models memorize training data, how this memorization creates privacy risks, and how to evaluate the robustness of machine learning systems against various attacks. His recent publications demonstrate a strong focus on practical security challenges in deployed AI systems, including data extraction from language models, adversarial attacks against generative AI, and developing more rigorous evaluation methodologies for machine learning security. Tramèr's research has been published in top venues including ICLR, NeurIPS, ICML, and IEEE Security & Privacy. Tramèr is actively collaborating with leading researchers in the field including Nicholas Carlini, Matthew Jagielski, and Javier Rando, contributing to important initiatives like the International AI Safety Report. His work bridges theoretical security concepts with practical implications for real-world AI deployment.
Subhasish Mitra is the William E. Ayer Professor of Electrical Engineering and Computer Science at Stanford University, holding dual appointments in both departments. He leads the Stanford Robust Systems Group and serves on the leadership team of the Microelectronics Commons AI Hardware Hub under the US CHIPS and Science Act. His research spans Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences, with breakthroughs in X-Compact test compression, carbon nanotube computing, and 3D integration. He has held international roles like the Carnot Chair at CEA-LETI and Visiting Professorships globally. Education & Honors: Recipient of over 40 awards including the IEEE Computer Society’s Harry H. Goode Memorial Award, ACM/IEEE’s A. Richard Newton Technical Impact Award, and the Intel Achievement Award. He earned top academic accolades from IIT Kharagpur and Jadavpur University, and is a Fellow of ACM and IEEE. Research Impact: Pioneered first-of-their-kind systems like the carbon nanotube computer and monolithic 3D integration. His work on robust computing techniques like QED validation and X-Compact compression has industry-wide adoption, saving billions in manufacturing costs. Collaborates with industry leaders like Intel, Google, and Samsung. Publications & Grants: Over 400 publications, including award-winning papers in DAC, ISSCC, and IEEE journals. Leads grants from NSF, DoE, and industry partnerships. His lab explores cutting-edge topics like neuromorphic computing, 3D thermal scaffolding, and AI hardware acceleration. Administration & Outreach: Serves as Associate Chair (Faculty Affairs) for Stanford’s Computer Science Department. Recognized by students for mentorship, and frequently invited to global forums like the World Economic Forum and National Academy of Engineering.
Steven I-Jy Chien serves as Professor and Director of the Transportation Program within the Department of Civil and Environmental Engineering at the New Jersey Institute of Technology (NJIT). His career spans academia, government, and industry with significant contributions to transportation engineering research and practice. His educational credentials include: Ph.D. in Civil and Environmental Engineering from University of Maryland-College Park (1995) M.S. in Civil and Environmental Engineering from University of Maryland-College Park (1991) B.S. in Civil Engineering from Tamkang University (1983) Professor Chien's research focuses on transportation system resilience, sustainable transit operations, and advanced traffic modeling. His work addresses critical challenges in urban rail networks, demand-responsive transit services, and energy-efficient transportation systems. He employs sophisticated computational methods including genetic algorithms, machine learning, and Bayesian approaches to solve complex transportation problems involving network vulnerability, passenger behavior, and infrastructure optimization under uncertainty. Analysis of his recent publications reveals strong emphasis on transportation resilience against cascading failures, sustainable operations for electric transit systems, and pandemic-responsive aviation scheduling. His research spans diverse geographic contexts including major Chinese metropolitan areas and U.S. transportation networks, demonstrating global applicability of his methodologies. His professional recognition includes: 2024 Keynote Speaker at Union-Tech Lecture, National Taiwan Ocean University 2022 Keynote Speaker at International Conference of Chinese Institute of Transportation 2022 Best Poster Award from New Jersey Department of Transportation Professor Chien has secured research funding from federal agencies including the Federal Highway Administration (FHWA) where he contributed to CORSIM traffic simulation software development. His industry experience with China Engineering Consultants Inc. and Information Dynamic Inc. informs his practical approach to transportation challenges. As Transportation Program Director, he oversees curriculum development and industry partnerships that prepare students for transportation sector careers. He maintains active collaboration with transportation agencies globally, particularly through his leadership in the Transportation Program at NJIT which serves as a hub for innovation in urban mobility solutions.
Vijay Raghunathan is a Professor in the Department of Electrical and Computer Engineering at Purdue University's College of Engineering. His work focuses on hardware and software architectures for embedded systems, wireless sensors for IoT, and wearable/implantable electronics with emphasis on low power design, energy harvesting, emerging memory technologies, and secure system design. Academic Rank: Professor Department: Electrical and Computer Engineering University: Purdue University Research Focus: Energy-efficient embedded systems, IoT, wearable devices His research explores low power design at both board-level and system-on-chip scales, micro-scale energy harvesting , and reliable/secure system design for medical devices. Recent work focuses on Processing-in-Sensor/Memory for battery-free AIoT devices, state space models for neural processing units, and security coprocessor integration in autonomous systems. Analysis of his publications reveals trends in energy-efficient neural network acceleration , approximate computing for edge inference , and compute-in-memory architectures . Key subfields include collaborative edge-cloud partitioning , sparse DNN accelerators , and security frameworks for medical devices. Vijay's work also addresses energy-accuracy tradeoffs in multimodal cognitive systems and intermittent computing using non-volatile memory technologies. His contributions span from microcontroller energy management to security protocols for implantable electronics.
Rakesh Kumar is a Professor and John Bardeen Faculty Scholar in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign. His work focuses on computer architecture, system-level design automation, and low-power computing. PhD in Computer Engineering from University of California, San Diego BS in Electrical Engineering from IIT Kharagpur His research spans all layers of the computing stack, with key contributions to flexible computer systems , waferscale computing , error-resilient architectures , and approximate computing . He has pioneered work on voltage-reliability tradeoffs and peak power management techniques. Recent publications highlight trends in space microdatacenters , printed microprocessors , and neural graph accelerators . His work on plastic chips was recognized as one of the three biggest semiconductor headlines of 2022 by IEEE Spectrum. IEEE Fellow (2024) ISCA Influential Paper Award MICRO Test-of-Time Award ICCAD Ten Year Retrospective Most Influential Paper Award Best Paper Awards at CASES, SELSE, HPCA He has received teaching accolades including the Stanley H. Pierce Faculty Award and Ronald W. Pratt Outstanding Teaching Award . His research group explores hardware-software co-design for emerging applications in AI, IoT, and sustainable computing.
Nate Foster is a Professor of Computer Science at Cornell University and currently serves as the Associate Dean for Research in the Ann S. Bowers College of Computing and Information Science. He is also a Visiting Researcher at Jane Street and served as a Visiting Professor at École Polytechnique Fédérale de Lausanne during the 2023-24 academic year. His research uses ideas from programming languages to solve problems in networking, databases, and security. BA in Computer Science, Williams College (2001) MPhil in History and Philosophy of Science, University of Cambridge (2008, all work completed in 2003) PhD in Computer and Information Science, University of Pennsylvania (2009) Foster's research focuses on developing languages and tools that make it easy for programmers to build secure and reliable systems. His current work centers on the design and implementation of languages and tools for programmable networks, particularly using the P4 language. His past work includes bidirectional languages (also known as 'lenses'), database query languages, data provenance, type systems, mechanized proof, and formal semantics. His research group at Cornell has made significant contributions to network verification, software-defined networking, and formal foundations for programmable data planes. Analysis of Foster's recent publications reveals a strong focus on network verification and programming language foundations for networking. His work consistently applies formal methods to practical networking problems, with a particular emphasis on the NetKAT and P4 languages. Over the past five years, his research has evolved toward more complex network verification techniques, including infinite state verification, active learning of network models, and dependently-typed approaches to network programming. His work bridges theoretical computer science with practical networking systems, making formal methods accessible to network engineers. ACM Fellow (2025) ACM SIGPLAN Robin Milner Award (2023) ACM SIGCOMM Rising Star Award (2018) NSF CAREER Award (2013) Alfred P. Sloan Fellowship (2012) Multiple distinguished paper awards across top conferences including POPL, PLDI, and SIGCOMM Foster has advised numerous PhD and Master's students who have gone on to prominent positions in both industry and academia, with many continuing work in programming languages and networking. He has led multiple significant research grants including an NSF CAREER Award and has been involved in the P4 Language Consortium, serving as Chair of the P4 Language Governing Board. His work has been supported by various organizations including NSF, DARPA, and industry partners like Intel and Jane Street. Foster is also active in the programming languages research community, serving on numerous program committees and as Vice Chair of DARPA's Information Science and Technology (ISAT) study group. Foster leads a vibrant research group at Cornell focused on programming languages for networks, with collaborators from academia and industry. His group has developed several influential tools and frameworks including NetKAT, Petr4, and KATch. They maintain strong connections with the P4 community and work closely with industry partners to ensure their research has practical impact on real-world networking systems.
Pramod Bhatotia is a Full Professor and Chair at the Technical University of Munich (TUM) and an Honorary Professor at the University of Edinburgh. Previously, he held professorial roles at the University of Edinburgh and was the Founding Technical Director of Huawei Dresden Research Center. He earned his PhD in Computer Science from the Max Planck Institute for Software Systems (MPI-SWS). His research focuses on building reliable, secure, and scalable computer systems, encompassing distributed systems, cloud computing, operating systems, and quantum computing. **Education**: PhD in Computer Science from MPI-SWS. **Research Interests**: Distributed Systems, Cloud Computing, Operating Systems, Virtualization, Compilers, Quantum Computing, Dependable Systems, and System Security. His work emphasizes practical system design to address real-world challenges. **Awards**: A prolific award recipient, Bhatotia has received grants and recognition from ERC, NVIDIA, Google, Huawei, and others, including the DSN Rising Star Award (2024) and the EuroSys Young Researcher Award (2023). His contributions span academic and industrial collaborations. Service**: Organized major conferences like HotOS 2027 and SOSP 2026. Served as PC Co-Chair for EuroSys 2027 and Middleware 2023. Editorial roles include Communications of the ACM (2022–2024). Labs & Industry**: Leadership roles at Huawei Research, Microsoft Research, IBM Research, and Bell Labs. Founded the Huawei Dresden Research Center. Global Engagement**: Presented at over 30 international conferences and delivered invited talks at institutions worldwide, including KAUST, Imperial College London, and TU Munich.
Goran Strbac is a Professor of Energy Systems at Imperial College London's Faculty of Engineering, holding the Chair in Electrical Energy Systems. He leads the Department of Electrical and Electronic Engineering and directs the joint Imperial-Tsinghua Research Centre on Intelligent Power and Energy Systems. His roles include IPCC WG 3 Leading Author, OFGEM RIIO-2 Challenging Group Member, and member of multiple EU energy platforms. Strbac's research focuses on multi-energy systems integration, energy market design, renewable integration, distributed energy resources, and grid resilience. Notable contributions include whole-energy system modeling across operation and investment scales, market mechanisms for flexibility services, and security assessments for low-carbon infrastructure. His work emphasizes resilience and decarbonization, with over 500 publications and 4 co-authored books. He advises governments and regulatory bodies on energy policy, including contributions to UK Smart System Forum and European Technology and Innovation Platforms. His recent articles explore AI-driven grid optimization, hydrogen integration, and transactive energy systems. Strbac leads major initiatives like the UK Centre for Grid Scale Energy Storage and chairs resilience-focused research clusters. His research bridges academia and industry, informing policy through rigorous systems analysis and innovative modeling frameworks.
Prof. Dr. Timothy Roscoe is a Full Professor in the Department of Computer Science at ETH Zurich. His research focuses on operating systems, networking, and distributed systems. He was inducted as an ACM Fellow in 2014 for contributions to these fields. Previously, he worked at Intel Research Berkeley, UC Berkeley (Adjunct Professor), and Sprint Labs. His work includes foundational contributions to systems like PlanetLab, P2 Declarative Networking, and the Nemesis OS. Roscoe holds a PhD from the University of Cambridge and has led projects in cloud computing, wide-area network measurement, and secure systems design. His current research emphasizes hardware-software co-design, formal verification of systems, and scalable memory architectures. Education: PhD in Computer Science, University of Cambridge (1995) Key Roles: Principal Researcher at Intel Berkeley Lab, Visiting Researcher at National ICT Australia Research Highlights: Contributions to distributed systems (PlanetLab), declarative networking (P2), and secure microkernels (seL4 integration). Current projects address challenges in disaggregated memory systems, coherent interconnects, and trustworthy embedded systems. Awards: ACM Fellow (2014), numerous grants and industry collaborations. Labs/Teams: Systems Group at ETH Zurich, focusing on OS design, hardware architectures, and formal methods.
Daniel E. Ho holds multiple prestigious positions at Stanford University: William Benjamin Scott and Luna M. Scott Professor of Law Professor of Political Science Professor of Computer Science (by courtesy) Senior Fellow, Stanford Institute for Economic Policy Research Senior Fellow, Stanford Institute for Human-Centered Artificial Intelligence Faculty Fellow, Center for Advanced Study in the Behavioral Sciences He serves on the National Artificial Intelligence Advisory Commission (NAIAC), as Senior Advisor on Responsible AI at the U.S. Department of Labor, and as a Public Member of the Administrative Conference of the United States (ACUS). Ho earned his J.D. from Yale Law School and Ph.D. from Harvard University, completing a clerkship with Judge Stephen F. Williams on the U.S. Court of Appeals for the District of Columbia Circuit. His research bridges artificial intelligence, law, and public policy with emphasis on: Regulatory governance frameworks for AI systems Fairness and bias mitigation in algorithmic decision-making Environmental enforcement using satellite imagery and computer vision Methods for estimating racial disparities without direct demographic data Legal AI reliability and statutory research systems Analysis of his 2025 publications reveals a consistent focus on practical AI governance tools addressing real-world regulatory challenges. Key themes include developing benchmarks for legal applications, mitigating hallucination in legal AI tools, and creating systems for statutory research. His work demonstrates strong integration of technical AI methods with policy implementation, particularly in environmental enforcement and fairness assessment. As Director of the Regulation, Evaluation, and Governance Lab (RegLab), Ho leads interdisciplinary research partnerships with government agencies. While specific grant details aren't provided, RegLab's operational model indicates substantial research funding for policy-relevant AI projects. No student advisees are mentioned in available materials. Ho's leadership extends to national advisory roles where he shapes federal AI policy through evidence-based recommendations, particularly regarding environmental protection and civil rights enforcement mechanisms.
Dr. Mo Adda is a Principal Lecturer at the University of Portsmouth's School of Computing, part of the Faculty of Technology. He holds a PhD in Distributed Systems and Parallel Processing from the University of Surrey. His research focuses on network security, distributed systems, wireless networks, and cybercrime prevention. He leads projects in the Centre for Cybercrime and Economic Crime, exploring fault management in networks, blockchain applications, and IoT forensics. With 16 supervised theses, he advises on topics like energy-efficient cloud systems and machine learning for environmental modeling. His work bridges academia and industry, addressing challenges in software-defined networks, traffic control, and secure data sharing in social networks. Education: PhD in Distributed Systems (University of Surrey) Affiliations: Centre of Excellence in Defence, Risk & Resilience; Portsmouth Centre for Advanced Materials and Manufacturing Research Interests Dr. Adda's research spans: Network security and fault detection mechanisms Blockchain applications in IoT and forensics Energy-efficient cloud data center optimization Machine learning for climate modeling Self-organizing network protocols Grants & Collaborations His projects include collaborations with industry partners on secure data leakage detection in cloud systems and resilient wireless protocols for harsh environments. He has pioneered fault classification systems using clustering algorithms and fuzzy logic. Labs & Teams He contributes to the Centre for Cybercrime and Economic Crime, focusing on digital forensics and network intrusion analysis. His team develops frameworks for privacy management in social networks and proactive routing in software-defined networks.
Sumeet Kumar Gupta is an Associate Professor in the Department of Electrical and Computer Engineering at Purdue University. His academic career spans from his current role to a prior Assistant Professorship at Pennsylvania State University (2014-2017) and an engineering position at Qualcomm Inc. (2012-2014). He holds a PhD in Electrical and Computer Engineering from Purdue University (2012), an M.S. from the same institution (2008), and a B.Tech in Electrical Engineering from IIT Delhi (2006). B.Tech, Electrical Engineering, IIT Delhi (2006) M.S., Electrical and Computer Engineering, Purdue University (2008) PhD, Electrical and Computer Engineering, Purdue University (2012) Dr. Gupta's research focuses on neuromorphic computing, low power variation-aware VLSI design in emerging nanotechnologies, device-circuit co-design, and nano-scale device modeling/simulations. His work addresses challenges in ferroelectric materials, crossbar arrays for deep neural networks, and energy-efficient AI hardware. Recent publications (2025-2024) highlight trends in: Ferroelectric HfO2/HZO thin films Compute-in-memory architectures Variability/stochasticity analysis Machine learning for device optimization Interconnect resistance/temperature effects AI hardware fault tolerance Scientific Awards & Recognitions: DARPA Young Faculty Award (2016) Early Career Professorship, Penn State (2014) 6th TSMC Outstanding Student Research Bronze Award (2012) Magoon Award (Purdue) Outstanding Teaching Assistant Award (Purdue, 2007) Intel PhD Fellowship (2009) His professional journey includes academic appointments at Purdue University (2020-present, Associate Professor) and Pennsylvania State University (2014-2017, Assistant Professor) after industry experience at Qualcomm Inc. (2012-2014). He maintains IEEE and EDS membership while publishing over 100 refereed works.
Matteo Sonza Reorda is a Full Professor at the Polytechnic University of Turin, affiliated with the Department of Automatic Control and Computer Science (DAUIN). He holds roles such as Partnership Agreement Coordinator with SMAT and has served as Vice-Rector for Research (2021–2024). His research focuses on fault tolerance, hardware reliability, and AI acceleration, with contributions to GPU/CNN reliability, self-test libraries, and defect-oriented testing. Education: M.S. in Electronics Engineering, Politecnico di Torino (1986) Ph.D. in Computer Engineering, Politecnico di Torino (1990) Research Interests: His work spans automatic test equipment, circuit reliability, GPU fault tolerance, neural network hardening, and embedded systems safety . He leads the Electronic CAD & Reliability Group and collaborates with institutions like the ISI Foundation and the National Research Council (CNR). Publications & Impact: With over 180 publications, his recent work emphasizes AI accelerator reliability, fault injection techniques, and safety-critical systems. Key trends include GPU resilience for CNNs, self-test library optimization, and radiation fault modeling in neural networks. Awards & Recognition: IEEE Fellow (2016–) Multiple best-paper awards at IEEE conferences (DDECS, DATE, etc.) Grants & Collaborations: Coordinator of EU projects (RESCUE, TUTORIAL) Partnerships with EDF, Marelli Europe, and SMAT Lead on National HPC/Quantum Computing Spoke 1 (2022–2025) Labs/Teams: Leads the CAD Group and collaborates with the French-Italian LIA LAFISI lab on hardware-software integration.
