Dr. Liang Cheng is the Department Chair and Professor in the Department of Electrical Engineering and Computer Science at the University of Toledo. He leads a department with ~700 students across CS, CSE, and EE programs. His research focuses on Cyber-Physical Systems (CPS), IoT, AI/ML, and intelligent infrastructure, supported by over $30M in funding from NSF, DOE, DOT, and industry. Notable projects include CPS Breakthrough initiatives and underground sensing systems. He co-edited a multidisciplinary book on Underground Sensing and contributed to smart grid cybersecurity. Dr. Cheng has held leadership roles at Lehigh University, shaping faculty governance and equity policies. His 100+ publications span networking, real-time systems, and sensor networks. He advises on funded projects totaling $30M+ and has pioneered pedagogical approaches in computer science education. Research Interests: Cyber-Physical Systems (CPS): Focuses on autonomous drones, energy systems, and real-time infrastructure Networking: Expertise in TSN, DTN, and wireless protocols Cybersecurity: SCADA systems, PLC attack detection, and blockchain energy modeling Underground Sensing: Geo-sensing via wireless signals and subsurface tomography Grants & Projects: Over 20 sponsored projects including NSF CPS Breakthrough (2018-2023), ABB smart grid projects, and DARPA-funded EDIFY systems. Key contributions include reconfigurable wireless architectures and network calculus tools for real-time systems. Teaching: Courses span senior design, compiler design, parallel computing, and wireless sensor networks. Developed pedagogical patterns for non-CS programming education. Awards: Recognized for leadership in academic governance and interdisciplinary research collaboration.
Muhannad S. Bakir is the Dan Fielder Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology and serves as the Director of the 3D Systems Packaging Research Center. His research focuses on heterogeneous integration of microsystems, including 2.5D and 3D ICs and packaging technologies, with significant contributions to advanced cooling systems, electrical and photonic interconnects, and biosensor integration with CMOS. Dr. Bakir's research interests span heterogeneous microsystem design and integration, advanced cooling and power delivery for emerging architectures, electrical and photonic interconnect technologies, biosensor technologies, and nanofabrication. His work addresses critical challenges in next-generation electronics, enabling polylithic integration that concatenates heterogeneous ICs of various functionalities while mimicking monolithic-like densities. His research particularly focuses on co-design of thermal technologies, power delivery networks, and signaling networks for silicon nanoelectronic systems. His recent publications demonstrate strong trends in fused-silica stitch-chip technology for heterogeneous integration, with particular emphasis on RF and mm-wave applications, power delivery for AI accelerators, and thermal management solutions. His work bridges electrical engineering, materials science, and thermal management to solve critical bottlenecks in computing performance and efficiency. 2013 Intel Early Career Faculty Honor Award 2012 DARPA Young Faculty Award 2011 IEEE CPMT Society Outstanding Young Engineer Award 2012 National Academy of Engineering Frontiers of Engineering Symposium Invited Participant 2015 IEEE CPMT Society Distinguished Lecturer 2014 Best Paper of the IEEE Transactions on Components Packaging and Manufacturing Technology More than 25 conference and student paper awards Twelve issued US Patents Dr. Bakir leads the Integrated 3D Systems Lab (I3DS) at Georgia Tech, which is actively researching advanced packaging, interconnects, electrical and thermal design, and system integration. His team has received significant recognition for their work, including multiple best paper awards from major conferences like ECTC, IITC, and CICC. The lab is currently seeking postdoctoral researchers and research faculty to advance next-generation electronics through collaborative research. His lab focuses on enabling the next phase of Moore's Law through polylithic integration, which concatenates heterogeneous ICs of various functionalities (digital, analog, photonic, and mm-wave) using advanced off-chip '2.5D' and '3D' heterogeneous interconnects and packaging. This work impacts applications in high-performance computing, machine learning, edge intelligence, autonomous vehicles, augmented/virtual reality, and healthcare.
Dr. Mo Adda is a Principal Lecturer at the University of Portsmouth's School of Computing, part of the Faculty of Technology. He holds a PhD in Distributed Systems and Parallel Processing from the University of Surrey. His research focuses on network security, distributed systems, wireless networks, and cybercrime prevention. He leads projects in the Centre for Cybercrime and Economic Crime, exploring fault management in networks, blockchain applications, and IoT forensics. With 16 supervised theses, he advises on topics like energy-efficient cloud systems and machine learning for environmental modeling. His work bridges academia and industry, addressing challenges in software-defined networks, traffic control, and secure data sharing in social networks. Education: PhD in Distributed Systems (University of Surrey) Affiliations: Centre of Excellence in Defence, Risk & Resilience; Portsmouth Centre for Advanced Materials and Manufacturing Research Interests Dr. Adda's research spans: Network security and fault detection mechanisms Blockchain applications in IoT and forensics Energy-efficient cloud data center optimization Machine learning for climate modeling Self-organizing network protocols Grants & Collaborations His projects include collaborations with industry partners on secure data leakage detection in cloud systems and resilient wireless protocols for harsh environments. He has pioneered fault classification systems using clustering algorithms and fuzzy logic. Labs & Teams He contributes to the Centre for Cybercrime and Economic Crime, focusing on digital forensics and network intrusion analysis. His team develops frameworks for privacy management in social networks and proactive routing in software-defined networks.
Sumeet Kumar Gupta is an Associate Professor in the Department of Electrical and Computer Engineering at Purdue University. His academic career spans from his current role to a prior Assistant Professorship at Pennsylvania State University (2014-2017) and an engineering position at Qualcomm Inc. (2012-2014). He holds a PhD in Electrical and Computer Engineering from Purdue University (2012), an M.S. from the same institution (2008), and a B.Tech in Electrical Engineering from IIT Delhi (2006). B.Tech, Electrical Engineering, IIT Delhi (2006) M.S., Electrical and Computer Engineering, Purdue University (2008) PhD, Electrical and Computer Engineering, Purdue University (2012) Dr. Gupta's research focuses on neuromorphic computing, low power variation-aware VLSI design in emerging nanotechnologies, device-circuit co-design, and nano-scale device modeling/simulations. His work addresses challenges in ferroelectric materials, crossbar arrays for deep neural networks, and energy-efficient AI hardware. Recent publications (2025-2024) highlight trends in: Ferroelectric HfO2/HZO thin films Compute-in-memory architectures Variability/stochasticity analysis Machine learning for device optimization Interconnect resistance/temperature effects AI hardware fault tolerance Scientific Awards & Recognitions: DARPA Young Faculty Award (2016) Early Career Professorship, Penn State (2014) 6th TSMC Outstanding Student Research Bronze Award (2012) Magoon Award (Purdue) Outstanding Teaching Assistant Award (Purdue, 2007) Intel PhD Fellowship (2009) His professional journey includes academic appointments at Purdue University (2020-present, Associate Professor) and Pennsylvania State University (2014-2017, Assistant Professor) after industry experience at Qualcomm Inc. (2012-2014). He maintains IEEE and EDS membership while publishing over 100 refereed works.
Matteo Sonza Reorda is a Full Professor at the Polytechnic University of Turin, affiliated with the Department of Automatic Control and Computer Science (DAUIN). He holds roles such as Partnership Agreement Coordinator with SMAT and has served as Vice-Rector for Research (2021–2024). His research focuses on fault tolerance, hardware reliability, and AI acceleration, with contributions to GPU/CNN reliability, self-test libraries, and defect-oriented testing. Education: M.S. in Electronics Engineering, Politecnico di Torino (1986) Ph.D. in Computer Engineering, Politecnico di Torino (1990) Research Interests: His work spans automatic test equipment, circuit reliability, GPU fault tolerance, neural network hardening, and embedded systems safety . He leads the Electronic CAD & Reliability Group and collaborates with institutions like the ISI Foundation and the National Research Council (CNR). Publications & Impact: With over 180 publications, his recent work emphasizes AI accelerator reliability, fault injection techniques, and safety-critical systems. Key trends include GPU resilience for CNNs, self-test library optimization, and radiation fault modeling in neural networks. Awards & Recognition: IEEE Fellow (2016–) Multiple best-paper awards at IEEE conferences (DDECS, DATE, etc.) Grants & Collaborations: Coordinator of EU projects (RESCUE, TUTORIAL) Partnerships with EDF, Marelli Europe, and SMAT Lead on National HPC/Quantum Computing Spoke 1 (2022–2025) Labs/Teams: Leads the CAD Group and collaborates with the French-Italian LIA LAFISI lab on hardware-software integration.
Joseph Bentsman is a Professor in the Department of Mechanical Science and Engineering at the University of Illinois at Urbana-Champaign's Grainger College of Engineering. He also holds affiliate appointments in the Department of Aerospace Engineering (since 2015) and the Department of Electrical and Computer Engineering (since 2018). His academic journey began with an M.S. from Byelorussian Polytechnic Institute in Minsk, USSR (1979), followed by a Ph.D. in Electrical Engineering from Illinois Institute of Technology (1984). Professor Bentsman's research focuses on control of nonlinear and distributed parameter systems, nonlinear oscillations, network control, stability theory, and stochastic multiscale methods. He pioneered a new class of dynamical systems with active singularities that admit control actions during singular phases of motion, which represent a novel category of hybrid systems characterized by impulsively controlled discrete transitions. His recent work has expanded into biomedical applications, particularly thermophysical modeling of tissue during electrosurgery and control of phase change processes. His recent publications (2021-2024) reveal a strong trend toward biomedical applications of control theory, particularly in modeling heat conduction in biological tissues, electrosurgical processes, and phase change phenomena. Approximately 60% of his recent work focuses on biomedical applications, while the remainder continues his foundational work on nonlinear control systems, distributed parameter systems, and systems with active singularities. Key subfields include Stefan problems, enthalpy-based control, telegraph equation modeling, and PDE-based control of complex physical processes. NSF Presidential Young Investigator Award (1989) Life Fellow of American Society of Mechanical Engineers Life Senior Member of IEEE IEEE Control Systems Society Technical Committee Chair on Power Generation (2015-2019) International Society of Automation POWID Achievement Award (2014) 2018 AIST Computer Applications Best Paper Award Featured in 'People in Control', IEEE Control Systems Magazine (2018) Professor Bentsman has been instrumental in developing educational approaches that integrate signal processing, instrumentation, control, and machine learning, as evidenced by his two textbooks. His work on the steel continuous casting process, particularly the mold oscillation system, has led to practical industrial applications. He has also made significant contributions to power plant control systems and boiler/turbine control. His research group appears to focus on both theoretical control systems development and practical implementation in industrial and biomedical settings, with strong connections to steel manufacturing, power generation, and medical device industries.
Jan Madsen is a Professor at DTU Compute, Technical University of Denmark, and Head of the Embedded Systems Engineering section. His research focuses on system-level modeling and design of embedded computing systems, particularly cyber-physical systems, microfluidic biochips, and synthetic biology applications. Develops design automation tools and methodologies for embedded systems Supervises numerous PhD students and leads major research projects Research Interests Key areas include: Embedded systems-on-a-chip Cyber-Physical Systems (Internet-of-Things) Microfluidic Lab-on-Chip devices Synthetic biology with molecular computing Design, modeling, and optimization of complex systems Scientific Awards DATE Fellow (2019) IEEE CEDA Outstanding Recognition (2019) DTU Scientific Advise Award (2013) Best Paper Awards at MECO (2013) and CASES (2009) Jorck’s Foundation Research Award (1995) Publications His 14+ journal papers and 115+ conference papers demonstrate expertise in: SystemC-based modeling frameworks Energy-aware sensor networks Self-healing eDNA architectures Microfluidic biochip synthesis RTOS modeling and MPSoC exploration
Navid Azizan is the Alfred H. (1929) and Jean M. Hayes Career Development Assistant Professor at Massachusetts Institute of Technology (MIT), holding dual appointments in the Department of Mechanical Engineering (in Control, Instrumentation & Robotics) and the Schwarzman College of Computing's Institute for Data, Systems & Society (IDSS). He is also a Principal Investigator in the Laboratory for Information & Decision Systems (LIDS), and a faculty member of the MIT Statistics and Data Science Center, the Center for Computational Science and Engineering, and the Operations Research Center. Dr. Azizan received his PhD in Computing and Mathematical Sciences from the California Institute of Technology (Caltech) in 2020, his MSc in Electrical Engineering from the University of Southern California in 2015, and his BSc in Electrical Engineering with a minor in Physics from Sharif University of Technology in 2013. Prior to joining MIT, he completed a postdoc at Stanford University's Autonomous Systems Laboratory and was a research scientist intern at Google DeepMind. His research spans the intersection of machine learning, systems and control, mathematical optimization, and network science. Dr. Azizan's work focuses on developing principled learning and optimization algorithms for reliable intelligent systems, with applications to autonomy and sociotechnical systems. His research has significant implications for creating trustworthy AI systems that can operate effectively in complex, uncertain environments. Dr. Azizan's recent publications demonstrate a strong focus on uncertainty quantification, reliable AI systems, constrained optimization, and control-oriented learning. His work bridges theoretical foundations with practical applications, particularly in autonomous systems where safety and reliability are paramount. His research group has made notable contributions to areas including neural network verification, multi-agent reinforcement learning, and adaptive inference techniques for large language models, with several papers featured on MIT News and selected for oral presentations at top conferences. Alfred H. (1929) and Jean M. Hayes Career Development Professorship (2025-present) Frank E. Perkins Award for Excellence in Graduate Advising (2025) List of Outstanding Academic Leaders in Data from the CDO Magazine (2024, 2023) Amazon Science Hub Research Award (2023) Outstanding UROP Faculty Mentor (2023) Esther and Harold E. Edgerton (1927) Career Development Chair (2022-2025) Information Theory and Applications (ITA) Gold Graduation Award (2020) Dr. Azizan has been recognized for his excellence in graduate advising, receiving the Frank E. Perkins Award for Excellence in Graduate Advising in 2025. During the pandemic, he founded and co-organized the 'Control meets Learning' virtual seminar series, connecting researchers across disciplines. His work has attracted significant research funding from industry partners including Google, Amazon, and MathWorks, supporting both fundamental research and practical applications in reliable intelligent systems. The Azizan Lab at MIT brings together researchers from mechanical engineering, computer science, and applied mathematics to tackle challenges at the intersection of learning and control. The lab emphasizes both theoretical foundations and practical implementations, with a particular focus on developing algorithms that provide guarantees of performance and safety. Current research directions include uncertainty quantification in AI systems, constrained optimization for neural networks, and control-oriented learning for autonomous systems, with applications spanning robotics, transportation, and complex sociotechnical systems.
Geng Yuan is an Assistant Professor at the University of Georgia's School of Computing, specializing in AI systems, energy-efficient deep learning, and hardware-software co-design. His work bridges machine learning algorithms with emerging hardware technologies like superconducting circuits and ReRAM. He holds a Ph.D. in Computer Engineering from Northeastern University (2023) and a Master's in Electrical & Computer Engineering from Syracuse University (2016). Doctor of Philosophy (Ph.D.) in Computer Engineering, Northeastern University (2023) Master of Science (M.S.) in Electrical & Computer Engineering, Syracuse University (2016) Bachelor of Science (B.S.) in Electrical Engineering, Beijing University of Technology (2014) His research focuses on optimizing deep learning systems for edge computing and mobile platforms through techniques like model compression, sparse training, and hardware-aware neural architecture search. Recent projects include adapting large language models via hybrid-grained pruning and developing ultra-low-power AQFP circuits for binary networks. Geng Yuan's publications span top venues like NeurIPS, CVPR, ICML, ICLR, ISCA, and DAC, with notable awards including a Best Paper Award at ICLR Workshop 2021, Spotlight Papers at ICLR 2023 and NeurIPS 2021, and a Design Contest 1st Place at ISLPED 2020. Best Paper Award (ICLR Workshop'21) Spotlight Paper Award (ICLR'23, NeurIPS'21) Design Contest 1st Place (ISLPED'20) Best Paper Nomination (DATE'21, ISQED'18) He actively recruits Ph.D., Master's students, and interns to his research group, focusing on advancing AI systems through interdisciplinary approaches combining machine learning, computer architecture, and electronic design automation.
André DeHon is the Oliver C. Boileau Jr. and Nan Eleze Boileau Professor of Electrical Engineering at the University of Pennsylvania, with affiliations in the Electrical and Systems Engineering (ESE) and Computer and Information Science (CIS) departments. He founded the Penn Computer Engineering (CMPE) program and directs the DARPA-sponsored CyberSavvy Security Center. His research spans reconfigurable computing, FPGA architecture, interconnect design, hardware security, and energy efficiency, with a focus on adapting to fabrication imperfections and runtime variability. His work explores programmable substrates (e.g., CMOS VLSI, molecular electronics) and algorithmic mappings to create resilient, efficient systems. Current projects include runtime feedback mechanisms (REFINE), partial reconfiguration (ExHiPR), and security frameworks like SCALPEL and μSCOPE. Recent publications highlight advancements in FPGA compilation (PLD, HiPR), security (SCALPEL, μSCOPE), and interconnect optimization (Asymmetry in NoC). These studies intersect computer architecture, security, and embedded systems. Scientific awards and recognitions: 2023 IEEE Fellow 2020 IEEE Mary Kenneth Keller Teaching Award 2018 ACM Fellow TCFPGA Hall of Fame (2019) Best Paper at ICFPT 2015 Academic leadership: He chairs the ACM/SIGDA Technical Committee on FPGAs and Reconfigurable Computing, previously held faculty roles at Caltech (1999–2006), and was a postdoc at UC Berkeley (1996–1999). Education includes MIT SB (1990), SM (1993), and PhD (1996) in Electrical Engineering and Computer Science.
Zhonghai Lu is a Professor of Electronic Systems Design (specializing in Dependable and Autonomous Systems) at KTH Royal Institute of Technology, part of the Department of Electrical Engineering in the School of Electrical Engineering and Computer Science (EECS). He serves as Program Director for KTH's Embedded Systems master's program and Director of Studies at the Division of Electronics and Embedded Systems. His research focuses on Network-on-Chip (NoC), computer architecture, embedded systems, and Prognostics and Health Management (PHM) of power electronics. He leads a research group exploring in-network processing and embedded intelligence, transforming passive networks into active computational frameworks. Lu holds a BSc from Beijing Normal University (1989), MSc and PhD from KTH (2002, 2007), and an MBA in Innovation and Growth from the University of Turku (2012). He has authored over 240 scientific papers, including journal articles and peer-reviewed conferences, with notable recognitions such as Best Paper Awards at NOCS’2015 and EU HiPEAC, and a Featured Paper in IEEE Transactions on Computers (2020). He serves as Associate Editor for ACM Transactions on Architecture and Code Optimization (TACO) and has chaired major conferences like HiPEAC’2017 and NOCS’2018. His research group’s recent work includes integrating AI into hardware acceleration, fault-tolerant neural networks, and RUL estimation for power electronics using recurrent neural networks. Lu has secured grants from the Swedish Research Council and Intel Corporation and developed courses like IL2230 (Hardware Architectures for Deep Learning) and IL2233 (Embedded Intelligence), pioneering embedded AI education at KTH. Education: BSc (Beijing Normal University), MSc/PhD (KTH), MBA (University of Turku) Awards: Best Paper Awards (NOCS, EU HiPEAC), Swedish Research Council Grants, Intel Research Gifts Labs/Teams: Research Group on In-Network Processing and Embedded Intelligence
Josiah Hester is Associate Professor of Interactive Computing and Computer Science at Georgia Tech's College of Computing, where he also directs the Center for Advancing Responsible Computing and the Ka Moamoa – Ubiquitous and Mobile Computing Lab . His research focuses on sustainable, battery-free computing systems for health, conservation, and education, informed by his Native Hawaiian heritage. Education: Ph.D. in Computer Science, Clemson University, 2017 B.S. in Computer Science, Clemson University Honors College, 2011 Research Interests: Hester’s group pioneers intermittent computing —devices that harvest ambient energy (solar, radio, thermal, microbial) and operate reliably despite frequent power loss. Applications span: Large-scale conservation sensing with Indigenous communities Battery-free health wearables (smart masks, implantables) Educational tools for sustainable design Carbon-aware IoT and recyclable robotics Recent Work & Trends: His 2024–2025 publications unveil soil-powered sensors, recyclable electronics, and culturally-grounded CS education tools. A consistent theme is co-design with underserved communities and embedding sustainability metrics at every layer—from hardware to curriculum. Scientific Awards: Presidential Early Career Award for Scientists and Engineers (PECASE) – 2025 Alfred P. Sloan Fellowship – 2022 NSF CAREER Award – 2022 Popular Science “Brilliant 10” – 2021 3M Non-Tenured Faculty Award – 2021 Multiple best-paper & best-presentation awards Grants & Teams: Hester’s lab is supported by >$50 million in active funding from NSF, NIH (ARPA-H), DARPA, DoD, Sloan, VMware, and 3M. He leads interdisciplinary teams on projects such as: $35 million ARPA-H bioelectronics initiative for diabetes and cancer $5 million NSF “Coastlines and People” Hub for Manoomin conservation $2 million NSF-DELPHI sustainable edge device design Laboratory & Mentorship: The Ka Moamoa Lab (named with Hawaiian meaning “lamp of the moamoa fish”) hosts graduate, undergraduate, and post-doctoral researchers. Hester actively recruits Native and Indigenous students and has mentored award-winning advisees such as Nivedita Arora (ACM Doctoral Dissertation Award 2024).
Naresh R. Shanbhag is the Jack Kilby Professor in the Department of Electrical and Computer Engineering and the Coordinated Science Laboratory at the University of Illinois at Urbana-Champaign. He serves as Director of the Systems on Nanoscale Information fabriCs (SONIC) Center and held the D.J. Gandhi Distinguished Visiting Professorship at IIT Mumbai from 2015-2020. Previously, he was a visiting faculty member at National Taiwan University (2007) and Stanford University (2014). Dr. Shanbhag received his doctorate from the University of Minnesota (1993) in Electrical Engineering. From 1993 to 1995, he worked at AT&T Bell Laboratories as the lead chip architect for AT&T's 51.84 Mb/s transceiver chips over twisted-pair wiring for Asynchronous Transfer Mode (ATM)-LAN and very high-speed digital subscriber line (VDSL) chip-sets. His research focuses on the design of energy-efficient machine learning, communications, and signal processing systems on resource-constrained embedded platforms. He explores fundamental trade-offs between energy efficiency, latency and accuracy of decision-making systems implemented in nanoscale technologies, with applications to computer vision, biomedicine, automatic target recognition, and imaging. His work spans four primary focus areas: Resource-efficient Machine Learning for the Edge, In-memory Computing (IMC), Energy-efficient High Data Rate Communications, and Shannon-inspired Statistical Error Compensation (SEC). Analysis of his recent publications reveals a strong emphasis on in-memory computing architectures (SRAM, MRAM, RRAM) for machine learning acceleration. His work consistently addresses energy-accuracy trade-offs, with increasing attention to security aspects of hardware implementations and applications to MIMO signal processing and edge AI systems. His research demonstrates a progression from theoretical foundations to practical silicon implementations. 2024 Semiconductor Research Corporation Innovation Award 2018 Semiconductor Industry Association/Semiconductor Research Corporation University Researcher Award 2018 IEEE International Symposium on Circuits and Systems Best Paper Award 2006 IEEE Fellow 1996 National Science Foundation CAREER Award Professor Shanbhag has mentored over 50 graduate students who now work at leading technology companies including Qualcomm, Amazon, Nvidia, Intel, and Apple. His research has been generously supported by the National Science Foundation, DARPA, AFRL, Semiconductor Research Corporation, Texas Instruments, Sandia National Laboratories, and industry partners including IBM, GlobalFoundries, and Intel Corporation. He led the Alternative Computational Models research theme (2006-2012) and was the founding Director of the SONIC Center (2013-2017), a 5-year multi-university center funded by DARPA and SRC. Currently, he leads research themes in the SRC and DARPA funded JUMP 2.0 Program's Center for Co-Design of Cognitive Systems and the Center for Ubiquitous Connectivity, and in the NSF IUCRC Center for Advanced Semiconductor Chips with Accelerated Performance (ASAP). As Director of the Systems on Nanoscale Information fabriCs (SONIC) Center, Professor Shanbhag leads a multidisciplinary team exploring novel computing paradigms for the nanoscale era. His group has benchmarked an extensive collection of in-memory computing and digital accelerator IC designs, maintaining a publicly available IMC benchmarking repository of metrics extracted from published IC prototypes. His research philosophy integrates concepts from information theory, statistical signal processing, detection and estimation, VLSI architectures, and digital and analog integrated circuits to develop energy-efficient systems from algorithms to silicon implementations.
Dr. Hiren Patel is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. He holds a Doctorate in Computer Engineering from Virginia Tech and previously worked as a postdoctoral fellow at UC Berkeley under Edward A. Lee. His research focuses on real-time embedded systems, computer architecture, machine learning hardware, and cybersecurity. He teaches courses like ECE 150 (Programming), ECE 320/429 (Computer Architecture), and ECE 327 (Digital Systems). Research Interests: Cyber-physical systems and hybrid architectures Hardware/software co-design methodologies Predictable cache coherence protocols IoT and edge computing systems Security in embedded and real-time systems Recent work emphasizes cache coherence solutions for safety-critical systems and GPU acceleration strategies. His publications address challenges in multicore predictability, FPGA bandwidth optimization, and autonomous robotics orchestration. No specific awards are listed, though his extensive publication record indicates significant contributions to embedded systems research. He currently oversees graduate student applications focusing on his core research areas.
Jingtong Hu is an Associate Professor at the Swanson School of Engineering, University of Pittsburgh, where he also holds the William Kepler Whiteford Faculty Fellowship. His research focuses on Cyber-Physical Systems and Infrastructure Security, with significant contributions to embedded systems, non-volatile memory architectures, and hardware/software co-design for energy-constrained environments. Dr. Hu received his PhD from the University of Texas at Dallas (2007-2013) and his Bachelor of Engineering from Shandong University (2003-2007). His research spans multiple interdisciplinary areas including energy harvesting systems, non-volatile processors, FPGA acceleration, and machine learning at the edge. His recent publications demonstrate a strong focus on algorithm-hardware co-design, particularly for vision transformers, federated learning, and non-volatile memory systems. His work often addresses the challenges of implementing AI on resource-constrained edge devices, with emphasis on energy efficiency, reliability, and performance optimization. The trend in his publications shows increasing focus on sustainable AI processing, heterogeneous computing architectures, and personalized machine learning for IoT applications. Selected Awards: IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award (2021) ACM SIGDA Meritorious Service Award (2019) Multiple Best Paper Award nominations at top conferences including DAC, ASP-DAC, and CODES+ISSS Dr. Hu's research has been supported by multiple grants focusing on energy-efficient computing, non-volatile memory systems, and hardware acceleration for machine learning. His collaborative work spans numerous institutions and involves interdisciplinary teams working at the intersection of computer architecture, embedded systems, and artificial intelligence. His publications show extensive collaboration with researchers at the University of Pittsburgh, particularly with Albert K. Jones and Yiyu Shi. His laboratory work focuses on implementing practical systems for energy harvesting powered devices, non-volatile processors, and hardware accelerators for machine learning applications. Current projects appear to emphasize sustainable AI processing at the edge, heterogeneous FPGA acceleration, and personalized federated learning for health monitoring applications.
