جست‌وجوی استاد و پژوهشگر

Marco Platznerمشاهده پروفایل

استاد

• Reconfigurable Computing
• Approximate Computing
• Self-Aware Computing
• +۷ مورد دیگر

Marco Platzner is a Professor for Computer Engineering at Paderborn University , Germany. He serves as the Dean of Research for the Faculty of Computer Science, Electrical Engineering and Mathematics and heads the Department of Computer Science. Previously, he held research positions at ETH Zurich, Stanford University, GMD (now Fraunhofer IAIS), and Graz University of Technology. Education: Diploma and PhD in Telematics (Graz University of Technology, 1991 and 1996), Habilitation in Hardware-Software Co-Design (ETH Zurich, 2002) Research Interests focus on reconfigurable computing, approximate computing, self-* computing, and embedded systems. His work addresses hardware security, FPGA design, and sustainable AI in data centers. Current projects include energy-efficient AI through deep neural network approximation for FPGAs (EKI-App) and lifecycle sustainability of socio-technical systems (SAIL). Publication Trends show expertise in FPGA security, approximate circuit synthesis, robotics, and hardware acceleration. Collaborations span robotics (ROS 2 integration), AI (transformer optimization), and cybersecurity (Trojan detection). Scientific Awards: ACM SIGDA Hall of Fame (2020) Significant Paper Award (FPL 2015) Best Paper Awards at IEEE ISVLSI (2024), ARC (2018), IEEE ReConFig (2015), and others Weierstraß Prize for Teaching (2008) Leadership Roles include membership in the board of Paderborn Center for Parallel Computing (PC2) and the Jenny Aloni Centre for Early Career Researchers. He has contributed to EU FP7 FET project EPiCS and German priority programs on embedded systems and organic computing.

Edoardo Charbonمشاهده پروفایل

استاد

• Ultra High-Speed Optical Sensors
• 3D Optical Sensors
• LiDAR
• +۱۰ مورد دیگر

Edoardo Charbon is a Full Professor at École Polytechnique Fédérale de Lausanne (EPFL) in the School of Engineering, where he leads the Advanced Quantum Architecture Lab (AQUA). He also serves on the School Council STI and is Co-Director of STI-SSIQ Administration. Previously, he was a full professor and chair at Delft University of Technology from 2008 to 2016. Charbon received his Elektrotechnik Diploma from ETH Zurich, M.S. from UC San Diego, and Ph.D. from UC Berkeley, all in electrical engineering. His career spans industry experience at Cadence Design Systems and Canesta Inc. before joining EPFL in 2002. His research focuses on ultra high-speed and 3D optical sensors, with applications in LiDAR, FLIM (Fluorescence Lifetime Imaging Microscopy), PET (Positron Emission Tomography), FCS (Fluorescence Correlation Spectroscopy), and NIROT (Near-Infrared Optical Tomography). He has pioneered deep-submicron CMOS SPAD technology, which is now mass-produced and used in smartphones, telemeters, and medical diagnostics. His recent work bridges cryo-CMOS circuits for quantum computing with advanced optical sensing techniques. Analysis of his recent publications reveals a strong trend toward integrating quantum technologies with practical imaging applications. His work spans from fundamental device development (SPAD sensors, cryo-CMOS circuits) to applied systems (LiDAR engines, medical imaging devices), with increasing integration of machine learning techniques for real-time processing. 2023 IISS Pioneering Achievement Award Fellow of the IEEE Distinguished visiting scholar, W. M. Keck Institute for Space at Caltech Fellow, Kavli Institute of Nanoscience Delft Distinguished lecturer, IEEE Photonics Society Professor Charbon has authored or co-authored over 500 papers and two books, and holds 27 patents. His research has been supported by collaborations with organizations including Bosch, X-Fab, Texas Instruments, Maxim, Sony, Agilent, and the Carlyle Group. He has driven significant innovation in CMOS SPAD technology, which is now commercially deployed in various applications. He leads the Advanced Quantum Architecture Lab (AQUA) at EPFL, which focuses on the development of advanced sensor systems combining quantum technologies with conventional electronics. The lab has been instrumental in creating SPAD-based imaging systems that push the boundaries of time-resolved optical detection.

Manoj Sachdevمشاهده پروفایل

استاد

• Semiconductor Devices
• Low-Power Electronics
• VLSI Design
• +۷ مورد دیگر

Manoj Sachdev is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo, Faculty of Engineering. His research focuses on semiconductor devices, low-power electronics, and secure hardware systems. He leads projects in flexible electronics, nanotechnology, and radiation-hardened circuits, with applications in displays, memory technologies, and biomedical sensors. His work integrates advanced materials science with circuit design to address challenges in energy efficiency and security. Education: Not explicitly stated in provided text. Research interests span thin-film transistors (TFTs), resistive switching memories, neuromorphic computing, and physically unclonable functions (PUFs). Recent efforts include developing low-power circuits for flexible substrates and secure microprocessors. His contributions to semiconductor device physics and integration techniques have advanced applications in wearable electronics and medical diagnostics. Publications highlight innovations in low-power flip-flops, energy-efficient display drivers, and memristor-based systems. He collaborates on interdisciplinary projects combining photonics, nanoelectronics, and biomedical engineering. Awards: None explicitly listed in provided text. Grants and advising: Advises on semiconductor fabrication, secure hardware design, and radiation effects in electronics. Leads research groups focused on next-generation memory technologies and flexible integrated systems. Labs/Teams: Active in the University of Waterloo's semiconductor and flexible electronics research clusters, contributing to both academic and industry partnerships.

Robert W. Heath Jr.مشاهده پروفایل

استاد

• MIMO Wireless Communications
• Millimeter Wave Communication Systems
• Terahertz Communication Systems
• +۳ مورد دیگر

Robert W. Heath Jr. is the Charles Lee Powell Chair in Wireless Communications at the University of California, San Diego (UCSD), part of the Jacobs School of Engineering's Electrical and Computer Engineering Department. Previously, he held the Lampe Distinguished Professorship at North Carolina State University (2020–2023) and the Cockrell Family Regents Chair at The University of Texas at Austin (2002–2020). He is also the President and CEO of MIMO Wireless Inc. His research focuses on MIMO (multiple-input multiple-output) wireless communications, millimeter wave/terahertz systems, and next-generation cellular networks (5G/6G). Key contributions include pioneering work on hybrid beamforming architectures (widely adopted in 5G) and machine learning-driven MIMO configurations. He explores emerging areas like quantum communications and reconfigurable antennas. Education & Career: Extensive academic and industry collaborations; authored/co-authored over 800 papers and 65 patents. Research Interests: MIMO theory, massive MIMO, millimeter wave applications, and interdisciplinary innovations at the intersection of communications, circuits, and photonics. Recipient of prestigious awards including the IEEE Kiyo Tomiyasu Award and multiple best paper honors. His work bridges theoretical advancements and practical implementations through prototyping and industry partnerships. Labs/Teams: Leads a research group advancing MIMO systems for future networks. Future Work: Expanding MIMO into terahertz spectra and quantum communication domains.

Morteza Fayaziمشاهده پروفایل

استادیار

• Electronic Design Automation (EDA)
• Machine Learning (ML) in Analog Circuit Design
• System-on-Chip (SoC) Design Automation
• +۳ مورد دیگر

Morteza Fayazi is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Utah, with an adjunct position in the Kahlert School of Computing. His research focuses on Electronic Design Automation (EDA), applying machine learning to automate analog and mixed-signal circuit design, and developing high-performance computing systems. He holds a B.Sc. from Sharif University of Technology, and M.S.E./Ph.D. degrees from the University of Michigan. His research interests include AI-driven EDA, RF/circuit automation, and energy-efficient processors. Key achievements include the MEDAL lab’s work on terahertz radars, systolic-array processors (e.g., DAP and Versa), and open-source frameworks like FASCINET and Tablext. He has received awards such as the 2024 College of Engineering Dean’s ETR Fund and the 2017 Outstanding Undergraduate Thesis Award. Teaching responsibilities include multiple iterations of the Digital System Design course (ECE/CS 3700). His work spans over 15 peer-reviewed articles in IEEE Transactions, ACM, and top conferences like ICCAD and VLSI-SOC, emphasizing automation, efficiency, and AI integration in hardware design.

• Reconfigurable Computing
• Field-Programmable Gate Arrays (FPGA)
• High-Level Synthesis
• +۳ مورد دیگر

Paolo Ienne is a Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL), where he leads the Processor Architecture Laboratory (LAP) within the School of Computer and Communication Sciences. His research focuses on advancing reconfigurable computing systems through innovative FPGA architectures and high-level synthesis methodologies. His primary research domains include reconfigurable computing, FPGA architecture design, dynamically scheduled dataflow circuits, and hardware acceleration techniques. Recent work emphasizes memory system optimization for FPGAs, formal verification of circuit transformations, and rapid C-to-hardware compilation flows. He has pioneered approaches for handling thousands of outstanding memory misses in FPGA accelerators and developed novel techniques for switch-block exploration without explicit pattern enumeration. Analysis of his 2023-2025 publications reveals a strong trend toward practical FPGA deployment challenges, with increasing focus on HBM integration, virtual memory systems for PCIe-attached devices, and formally verified circuit transformations. His work consistently targets real-world bottlenecks in high-level synthesis toolchains while maintaining theoretical rigor in dataflow architecture design. Professor Ienne's laboratory receives support from the Swiss National Science Foundation and industry partners including Huawei, enabling cutting-edge research in FPGA-based acceleration. His collaborative network spans major semiconductor companies and academic institutions worldwide, with frequent co-authorship on conference proceedings and journal publications in IEEE and ACM venues.

• Embedded Security
• Cryptography
• Hardware Security
• +۵ مورد دیگر

Christof Paar is a Professor of Embedded Security at Ruhr University Bochum's Faculty of Computer Science. His work focuses on hardware security, cryptography, and embedded systems security. He leads the Embedded Security Group within the CASE Cluster of Excellence (Cyber Security in the Age of Large-Scale Attacks), addressing cutting-edge challenges in hardware Trojans, side-channel attacks, and cryptographic engineering. His research spans FPGA and IoT security, with contributions to physical-layer security, wireless jamming defenses, and tamper-resistant systems. Research Interests: Paar's expertise lies in hardware-software co-design for security, with a focus on embedded systems. His work includes analyzing vulnerabilities in FPGAs, developing countermeasures against side-channel attacks, and exploring physical-layer security mechanisms. He also investigates the human factors in hardware reverse engineering and the implications of adversarial machine learning on security systems. Notable Work: Recent publications highlight breakthroughs in detecting hardware Trojans across CMOS generations, breaking industry-standard IP protection mechanisms (IEEE 1735), and proposing novel defenses like IRShield against adversarial wireless sensing. His group actively contributes to standards for secure embedded systems and IoT devices, emphasizing practical implementations.

Jingtong Huمشاهده پروفایل

دانشیار

• Cyber-Physical Systems
• Infrastructure Security
• Non-Volatile Memory Systems
• +۶ مورد دیگر

Jingtong Hu is an Associate Professor at the Swanson School of Engineering, University of Pittsburgh, where he also holds the William Kepler Whiteford Faculty Fellowship. His research focuses on Cyber-Physical Systems and Infrastructure Security, with significant contributions to embedded systems, non-volatile memory architectures, and hardware/software co-design for energy-constrained environments. Dr. Hu received his PhD from the University of Texas at Dallas (2007-2013) and his Bachelor of Engineering from Shandong University (2003-2007). His research spans multiple interdisciplinary areas including energy harvesting systems, non-volatile processors, FPGA acceleration, and machine learning at the edge. His recent publications demonstrate a strong focus on algorithm-hardware co-design, particularly for vision transformers, federated learning, and non-volatile memory systems. His work often addresses the challenges of implementing AI on resource-constrained edge devices, with emphasis on energy efficiency, reliability, and performance optimization. The trend in his publications shows increasing focus on sustainable AI processing, heterogeneous computing architectures, and personalized machine learning for IoT applications. Selected Awards: IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award (2021) ACM SIGDA Meritorious Service Award (2019) Multiple Best Paper Award nominations at top conferences including DAC, ASP-DAC, and CODES+ISSS Dr. Hu's research has been supported by multiple grants focusing on energy-efficient computing, non-volatile memory systems, and hardware acceleration for machine learning. His collaborative work spans numerous institutions and involves interdisciplinary teams working at the intersection of computer architecture, embedded systems, and artificial intelligence. His publications show extensive collaboration with researchers at the University of Pittsburgh, particularly with Albert K. Jones and Yiyu Shi. His laboratory work focuses on implementing practical systems for energy harvesting powered devices, non-volatile processors, and hardware accelerators for machine learning applications. Current projects appear to emphasize sustainable AI processing at the edge, heterogeneous FPGA acceleration, and personalized federated learning for health monitoring applications.

Dimitra Psychogiouمشاهده پروفایل

استاد

• Microwave Engineering
• RF Filters
• Millimeter-wave Technology
• +۴ مورد دیگر

Dimitra Psychogiou is a Full Professor of Microwave Engineering at University College Cork and Principal Investigator at Tyndall National Institute's CONNECT Centre in Cork, Ireland. She leads the Advanced RF Technology Group, driving innovation in reconfigurable RF systems for next-generation wireless networks. Her academic credentials include: Dipl.-Eng. in Electrical and Computer Engineering, University of Patras (2008) Ph.D. in Electrical Engineering, ETH Zurich (2013) Prof. Psychogiou's research pioneers reconfigurable microwave filters , non-reciprocal RF components , and additive manufacturing for antenna systems . Her work bridges theoretical microwave engineering with practical implementations in 5G/6G front-ends, emphasizing sustainability through hyperflexible filtering architectures that reduce hardware complexity and energy consumption. Key innovations include acoustic-wave resonator filters and 3D-printed RF components enabling unprecedented miniaturization. Analysis of her 2022-2025 publications reveals a strategic shift toward multifunctional RF integration , where filtering coexists with isolation, amplification, and switching in single modules. This trend addresses critical industry needs for compact, software-defined radio front-ends in satellite communications and IoT networks, with increasing emphasis on reflectionless topologies and spatiotemporal modulation techniques. Her scientific recognition includes: 2023 MTT-S Outstanding Young Engineer Award 2021 Roberto Sorrentino Prize 2021 SFI Research Professorship 2020 NSF CAREER Award 2020 URSI Young Scientist Award UC Boulder Junior Faculty Research Award Prof. Psychogiou actively shapes her field through leadership roles as Chair of IEEE MTT-13 Committee and Secretary of USNC-URSI Commission D, while serving as Associate Editor for IEEE MWCL and IJMWT. Her group collaborates extensively with semiconductor foundries and wireless infrastructure companies to transition lab innovations to commercial applications. The Advanced RF Technology Group operates state-of-the-art facilities for GaAs MMIC prototyping, 3D-printed RF component fabrication, and full-wave electromagnetic characterization, supporting Ireland's strategic position in European telecommunications research.

Andrea Martinelliمشاهده پروفایل

مدرس

• Optimal Control
• Reinforcement Learning
• Decentralized Control
• +۴ مورد دیگر

Dr. Andrea Martinelli is a Lecturer and Postdoctoral Researcher at the Automatic Control Laboratory (IfA), ETH Zurich. He holds a PhD in Automatic Control from ETH Zurich (2024) under Prof. John Lygeros, an MSc in Control Engineering (2017) from Politecnico di Milano, and a BSc in Management Engineering (2015). His research focuses on optimal control, reinforcement learning, and decentralized control strategies for large-scale systems, emphasizing scalability and applicability to renewable energy systems. He received the ETH Medal for his doctoral thesis on data-driven control methods. Education: BSc in Management Engineering, Politecnico di Milano (2015) MSc in Control Engineering with Honours, Politechnico di Milano (2017) PhD in Automatic Control, ETH Zurich (2024) Research Interests: Optimal control and reinforcement learning Data-driven methods for control systems Decentralized control of interconnected systems Dissipativity theory and passivity-based approaches Applications in renewable energy systems (DC microgrids) Teaching & Outreach: Program Manager for the CAS ETH in Automation Teaching a post-graduate course on automation in 2025 Professional Activities: Worked at Laboratoire d'Automatique (EPFL) during MSc thesis (2017) Research Assistant with Prof. R. Scattolini, Politecnico di Milano (2018)

Kyle Jamiesonمشاهده پروفایل

استاد

• Wireless Networks
• 5G Technology
• Quantum Computing in Communications
• +۳ مورد دیگر

Dr. Kyle Jamieson is a Professor of Computer Science at Princeton University, leading the Princeton Advanced Wireless Systems (PAWS) lab within the Department of Computer Science. He is also Affiliated Faculty in the Department of Electrical and Computer Engineering. His research focuses on wireless networking systems, 5G architecture, IoT networks, and quantum computing applications in wireless communication. He has pioneered work in reconfigurable intelligent surfaces, MIMO detection algorithms, and metamaterials for millimeter-wave networks. Dr. Jamieson has developed courses such as COS 597S: Recent Advances in Wireless Networks (graduate seminar), COS 463: Wireless Networks , and COS 418: Distributed Systems . His teaching emphasizes interdisciplinary approaches to networking challenges, including physical-layer design, computational structures for wireless processing, and cross-layer optimization. His lab’s research spans smart surfaces for 5G networks, quantum annealing for MIMO processing, and edge computing for live video analytics. Recent work includes deploying reconfigurable metamaterials for enhanced mmWave networks and developing tools like NR-Scope for 5G telemetry. While no awards are listed in the provided text, his contributions to wireless systems have advanced both academic and industrial applications in areas such as network resilience, IoT scalability, and quantum-enabled wireless processing. Dr. Jamieson’s advising focuses on graduate and undergraduate students working in wireless systems, though specific advisee names are not provided. His lab collaborates on projects like Wall-Street for roadside networking and Spider for multi-hop mmWave video analytics. External collaborations include work with Microsoft Research and guest lecturing roles at Berkeley. His research bridges theoretical foundations with practical implementations, often addressing real-world challenges in wireless infrastructure and next-generation communication systems.

Soheil Salehiمشاهده پروفایل

استادیار

• Hardware Security
• AI-Enabled Security
• Internet of Things (IoT) Security
• +۱۵ مورد دیگر

Soheil Salehi is a tenure-track Assistant Professor in the Department of Electrical and Computer Engineering at the University of Arizona, with a joint appointment in Systems and Industrial Engineering. He is the Director of the Privacy-preserving, Intelligent, and Secure Computing (PRISM) Lab, established in August 2022. Prior to this, he was an NSF-Sponsored Computing Innovation Fellow and Postdoctoral Research Fellow at the University of California, Davis. Ph.D., Electrical and Computer Engineering, University of Central Florida, 2020 M.S., Electrical and Computer Engineering, University of Central Florida, 2016 B.S., Isfahan University of Technology, Iran, 2014 Dr. Salehi's research focuses on the intersection of hardware, AI, and security. His work spans hardware and AI-enabled security in IoT , Generative AI for hardware design and security , neuromorphic and biologically-inspired AI hardware , emerging spin-based devices , reconfigurable architectures , low-power VLSI circuits , and digital twins and mixed reality for semiconductor workforce development . He also explores the application of Generative AI in personalized education . His recent publications, spanning 2023–2025, reveal a strong trend toward integrating AI and machine learning into hardware security and design. Key themes include automated secure IC design flows , AI-driven hardware obfuscation , firmware and side-channel attack analysis , security in neuromorphic and spiking neural networks , and educational frameworks using digital twins and generative models . His work appears in top venues like DAC, ICCAD, USENIX Security, IEEE TCAS-I, and ISCAS. Outstanding Reviewer Award, IEEE/ACM Design Automation Conference (DAC), 2023 Best Presentation of the Symposium Award, UC Davis Postdoctoral Research Symposium, 2021 UCF Excellence by a Graduate Teaching Assistant (University-Level), 2016 Nominated for 30-under-30 Award, UCF, 2020 Nominated for Postdoctoral Research Excellence Award, UC Davis, 2022 Dr. Salehi has secured significant research funding as PI and Co-PI, including a $300K NSF SaTC EAGER grant on Generative AI-based Personalized Cybersecurity Tutor, a $174,000 University of Arizona PIF Award, and multiple RII grants totaling over $198K. He has also received industry funding from CHEST. He actively mentors students and leads the PRISM Lab, which focuses on privacy-preserving and intelligent secure computing. His service includes roles as Technical Program Committee (TPC) Member and Session Chair at premier conferences such as DAC, ICCAD, CCS, NDSS, and GLSVLSI. The PRISM Lab, under his direction, conducts cutting-edge research in secure and intelligent hardware systems, with applications in IoT, edge computing, and workforce development. The lab emphasizes interdisciplinary collaboration and innovation in both research and education.

Jonathan M. Bakerمشاهده پروفایل

استادیار

• Quantum Computing
• Quantum Computer Architecture
• Quantum Error Correction
• +۴ مورد دیگر

Jonathan M. Baker is an Assistant Professor in the Department of Electrical and Computer Engineering at The University of Texas at Austin, holding the Advanced Micro Devices Chair in Computer Engineering. His research centers on quantum computer architecture with emphasis on practical quantum error correction implementation across the quantum computing stack. His educational background includes a Ph.D. in Computer Science from the University of Chicago (advised by Fred Chong) and dual B.S. degrees in Mathematics and Chemistry and Computer Science from the University of Notre Dame. Baker's research spans quantum compilation, logic synthesis, multi-radix architectures, and error mitigation for both near-term and fault-tolerant quantum systems. His work addresses critical challenges in quantum hardware-software co-design, with particular focus on optimizing quantum circuits for real-world hardware constraints and noise characteristics. Current projects emphasize qudit-based computing, neutral atom architectures, and efficient error correction implementations. His publication record shows strong focus on quantum architecture innovations, with recent work exploring qudit advantages, modular chiplet designs, and dynamic noise adaptation. Key trends include hardware-aware compilation techniques, communication optimization across quantum systems, and practical approaches to fault tolerance. Best Paper Award Runner Up, MICRO 2020 IEEE Micro Top Pick, 2020 (Virtualized Logical Qubits) IEEE Micro Top Pick, 2020 (Extending Frontier with Qutrits) IEEE Micro Top Pick, 2021 (Emerging Technologies) Best Poster Award, MICRO 2018 Baker actively mentors graduate students in quantum computing architecture research and serves on conference review committees including MICRO and ASPLOS. His teaching includes specialized quantum systems courses at UT Austin and online EdX modules covering quantum computation fundamentals and architecture. He collaborates with the Duke Quantum Center and maintains strong industry connections through the AMD Chair position, focusing on bridging academic research with practical quantum computing implementations.

Tulika Mitraمشاهده پروفایل

استاد

• Hardware-Software Co-design
• Real-Time Embedded Systems
• Energy-Efficient Computing
• +۷ مورد دیگر

Professor Tulika Mitra is the Dean of the School of Computing and Vice Provost (Special Projects) at the National University of Singapore (NUS). She holds the Provost’s Chair Professor in the Department of Computer Science and has been instrumental in shaping academic policies and strategic initiatives at NUS since joining in 2001. PhD in Computer Science, Stony Brook University (2000) M.E. in Computer Science, Indian Institute of Science (1997) B.E. in Computer Science, Jadavpur University (1995) Her research focuses on hardware-software co-design for energy-efficient computing systems, particularly in real-time embedded systems, heterogeneous architectures, and AI accelerators. She leads major research programs such as the NRF Competitive Research Programme on Low-Power Edge Accelerators and the MOE Tier-3 Programme on Green AI , collaborating with industry leaders like ARM, AMD, and Meta. Her recent publications highlight innovations in CGRA optimization , sparse attention mechanisms , photonic-digital hybrid architectures , and low-power ML inference . These works often integrate compiler techniques, architectural design, and real-time constraints for edge computing applications. Scientific Awards : ESWEEK Test-of-Time Award (2022), ACM SIGDA Distinguished Service Award, IEEE CEDA Outstanding Service Recognition Award, Teaching Excellence Award (2006), and multiple best paper recognitions. Education Leadership : Spearheaded the Computer Engineering (CEG) Programme at NUS, a joint initiative between Engineering and Computing. As a mentor , she has supervised over 25 PhD students , many now in prominent academic or industrial roles. Her research group eCO Lab focuses on embedded computing challenges, while her grant collaborations include projects on 5G base stations, reconfigurable architectures, and IoT-optimized SoCs.

• Computer Hardware
• FPGA Acceleration
• Artificial Intelligence
• +۸ مورد دیگر

Professor Wayne Luk is a Professor of Computer Engineering at the Department of Computing, Faculty of Engineering, Imperial College London. He leads the Programming Languages and Systems Section and the Custom Computing Research Group, and directs the EPSRC Centre for Doctoral Training in High-performance Embedded and Distributed Systems and the Centre for Advanced Financial Engineering. He previously served as a Visiting Professor at Stanford University from 2006 to 2009. His research spans FPGA acceleration, quantum computing, deep learning optimization, and algorithm-hardware co-design, with affiliations to the CRUK Convergence Science Centre and the Engineering Secure Software Systems group. His research interests include computational modeling for particle physics, causal discovery in agent-based systems, and high-throughput digital electronics. Notable contributions include FPGA-accelerated algorithms for neural networks, quantum circuit simulation, and Bayesian optimization frameworks. His work emphasizes practical applications of reconfigurable hardware in fields like medical imaging, high-energy physics, and financial systems. Professor Luk is a Fellow of the Royal Academy of Engineering, IEEE, and BCS. His publications focus on advancing hardware-aware machine learning, FPGA-based acceleration techniques, and scalable design methodologies. His research bridges theoretical computer science with applied engineering, addressing challenges in real-time systems, embedded computing, and next-generation computing architectures. His academic leadership includes directing interdisciplinary centers and training programs, fostering collaboration across computing, engineering, and physics. Current projects explore quantum computing tools, causal inference systems, and high-performance graph neural networks for particle physics applications.