José Cano Reyes is a Senior Lecturer (Associate Professor) at the University of Glasgow's School of Computing Science, leading the Glasgow Intelligent Computing Lab (gicLAB) and serving as deputy Head of the GLAsgow Systems Section (GLASS). His academic career includes postdoctoral roles at the University of Edinburgh (2014-2018) and Universitat Politècnica de Catalunya (2012-2013), with a PhD and engineering degree from Universitat Politècnica de Valencia (2004-2012). He has held visiting and guest lecturer positions at Edinburgh and Glasgow across computer architecture, compilers, and embedded systems topics. Research focuses on hardware-software co-design for edge AI, including DNN acceleration (FPGA/GPU), encrypted AI systems, and secure mission-critical SoCs. Key projects include EU's dAIEDGE, EPSRC IDEAL, and UKRI AppControl. He leads over 15 research staff and students in areas like quantization, sparsity exploitation, and robust AI deployment. Notable contributions span 100+ peer-reviewed publications across top venues (ISCA, IJCNN, IEEE TPDS) and 3 authored books on ad hoc networks and embedded systems. Academic service includes organizing 20+ conferences (ISPASS, Euro-Par, ASPLOS) and serving on editorial boards for ACM TACO and IEEE TPDS. His educational efforts include teaching Computer Architecture (Year 4), Computer Systems (Year 1), and supervising over 20 PhD/MSc students since 2017.
Dustin Richmond is an Assistant Professor in the Department of Computer Science and Engineering at the Baskin School of Engineering, University of California, Santa Cruz. His work focuses on secure, usable hardware systems with applications in FPGA acceleration, RISC-V architectures, and side-channel analysis. Email: drichmond@ucsc Office: Engineering 2, Room 221 Research Interests: Secure hardware systems FPGA-based computing Manycore processors High-level synthesis Side-channel vulnerabilities Notable Article Trends: Recent publications emphasize cloud FPGA security, manycore design optimization, and hardware security. Earlier works focus on RISC-V acceleration, OpenCL compiler enhancements, and heterogeneous computing systems. GitHub Contributions: Maintains open-source projects like RISC-V-On-PYNQ and PYNQ-HLS, addressing FPGA programming challenges and RISC-V integration. Active in resolving community issues related to toolchain compatibility and hardware-software interfaces.
Prof. Dr.-Ing. Ulrich Rückert is a Professor at the Faculty of Engineering of the University of Bielefeld , where he leads the Cognitronics & Sensor Technology Group and participates in CITEC (Center for Cognitive Interaction Technology). He serves as Vice Rector for Digitalization and Data Infrastructure , driving university-level digital transformation initiatives. Research Focus : Neuromorphic computing, spiking neural networks (SNNs), embedded systems, robotics, UWB localization, and reconfigurable hardware. Projects : Leading federal and EU-funded initiatives like eProcessor (RISC-V multi-core systems), VEDLIoT (efficient deep learning in IoT), and Al4DG (AI in distribution grid control). Teaching & Leadership : Academic advisor for the Master in Biomechatronics , chairs examination boards, and leads the Library Commission . His work integrates neuromorphic hardware with edge computing and real-time systems , supported by grants from the European Union and German Federal Government . Recent publications analyze FPGA-based SNNs , UWB localization , and resource-efficient embedded architectures . Scientific Contributions : Over 200 publications in robotics, neural networks, and hardware-software co-design. Notable collaborations with institutions in Germany, Switzerland, and Italy.
Benaoumeur Senouci is an Associate Professor at the Institute of Mechanical and Electrical Engineering, University of Southern Denmark (SDU). His research spans interdisciplinary domains including wireless communication, artificial intelligence, and embedded systems. Research Focus: Wireless Communication Engineering, Neural Networks, and Edge Computing Key Collaborations: Active partnerships in 6G wireless systems, autonomous vehicle efficiency, and precision agriculture technologies Recent work highlights machine learning applications in fuel consumption estimation (2025), hybrid beamforming for 6G networks (2025), FPGA-based neural network prototyping (2024), and smart agriculture control systems (2024). Research outputs demonstrate strong integration of AI techniques with mechanical/electrical engineering challenges.
Bo Zeng is an Associate Professor in the Swanson School of Engineering at the University of Pittsburgh. His research focuses on developing and utilizing optimization and analytics tools to address challenges in real systems, particularly in discrete optimization models with uncertainties, game theory models, and advanced data analysis and computing methods. His work is extensively applied in engineering, healthcare, and management systems. Dr. Zeng earned his PhD from Purdue University in 2007 and his BS from Xian Jiaotong University in 1998. His research interests span optimization, robust optimization, stochastic programming, power systems, demand response, renewable energy integration, high performance computing, game theory, mixed integer programming, and multilevel optimization. Analysis of Dr. Zeng's recent publications reveals a strong focus on power systems and energy applications, with significant contributions to microgrid planning, demand response modeling, renewable energy integration, and robust optimization techniques. His work demonstrates a consistent pattern of applying advanced mathematical optimization methods to solve complex problems in energy systems, with increasing attention to uncertainty modeling and risk management in power grid operations. Dr. Zeng has collaborated extensively with researchers across multiple institutions, particularly in China, reflecting the global nature of energy research and the international collaboration needed to address complex energy challenges. His publications span high-impact journals in power systems, optimization, and interdisciplinary energy research.
Dr. Irina Zeleneva is an Associate Professor at the Department of Computer Systems and Networks, Faculty of Computer Science and Technologies, Zaporizhzhia Polytechnic National University. With a Ph.D. in Computers, Systems, and Networks, she has 15+ years of academic experience since joining the university in 2003. Specializes in FPGA-based digital system design Focuses on hardware acceleration and reliability optimization Teaches advanced topics in microprocessor architecture Her research includes: Development of energy-efficient FPGA systems Hardware-software co-design Neural network text classification accelerators Reliable embedded control architectures Recent publications analyze FPGA implementation of floating-point multipliers, finite state machines with elementary state chains, and AI-enhanced educational frameworks . Her work frequently appears in international conferences like IDAACS and PIC S&T, with multiple Scopus/WoS indexed articles. Dr. Zeleneva's contributions: Co-author of two monographs on FPGA acceleration PI in multiple university research projects Active participant in annual "Week of Science" conferences
Assoc. Prof. Dr. Ali GÜLBAĞ is an academic at the Faculty of Computer and Information Sciences , Sakarya University , specializing in Computer Engineering . His career spans over two decades, focusing on FPGA-based hardware design, machine learning applications, and educational methodologies in computer architecture. Doctorate (2003-2006): Quantitative determination of volatile organic compounds using artificial neural network and fuzzy logic-based algorithms MSc (1998-2000): Building automation using telephone lines BSc (1994-1998): Electrical-Electronics Engineering His research interests include Artificial Neural Networks , FPGA Design , and Water Resource Management , with applications in seismic event differentiation, environmental modeling, and educational technologies. Recent work emphasizes water consumption prediction using machine learning. Key projects: BZK.SAU.FPGA microcomputer architecture , Remote FPGA laboratories Publications demonstrate expertise in combining machine learning techniques (ANNs, gradient boosting, random forests) with hardware implementations for real-world problem-solving.
Dr. Jose A. Boluda is an Associate Professor in the Department of Computer Engineering at the University of Valencia's School of Engineering. He holds a B.S. in Physics (Electricity, Electronics and Computer Science, 1992) and a Ph.D. (2000) from the same institution. With 6 teaching quinquenios and 4 research sexenios, his academic career spans over two decades. His research focuses on: Computer vision hardware design Smart vision sensors and neuromorphic computing Reconfigurable architectures (FPGA) High-speed motion analysis and change-driven processing Biomimetic visual sensing strategies He has authored over 50 international publications and participated in 15 research projects. His publications predominantly explore: Event-based vision sensors Hardware-accelerated image processing Neuromorphic engineering applications Real-time systems for robotics and 3D scanning Low-power circuit design for computer vision Awards include: Fernando Sapiña Award 2023 for Valencian teaching materials Fernando Sapiña Award 2021 for English teaching materials Fernando Sapiña Award 2021 for Valencian teaching materials He has directed 2 doctoral theses and supervised multiple master's projects. Research includes international collaborations at the University of Virginia, University of Macedonia, and Universitat Jaume I. His lab focuses on developing novel vision sensors and processing architectures.
Ernst Gunnar Gran is Associate Professor at the Department of Information Security and Communication Technology at the Norwegian University of Science and Technology (NTNU), where he heads the communication technology discipline. He also holds an adjunct research scientist position at Simula Research Laboratory, where he headed the Cloud department until December 2016. His research spans high performance computing (HPC), HPC interconnection networks, enterprise data centre networks, cloud computing, and data-intensive processing in multi-clouds. He serves as the Scientific Leader of Communication Technologies in the RCN-funded infrastructure project eX3 (Experimental Infrastructure for Exploration of Exascale Computing) and has significant experience with both RCN-funded and EU-funded research projects, including the H2020 project Melodic (Multi-cloud Execution-ware for Large-scale Optimised Data-Intensive Computing). Gran received his M.Sc. and Ph.D. degrees in computer science from the Department of Informatics, University of Oslo, in 2007 and 2014, respectively. Both theses focused on different aspects of resource management in high performance interconnection networks. He previously headed the RCN-funded project ERAC (Efficient and Robust Architecture for Big Data Clouds) and led the design, implementation, and deployment of the multi-homed IP-based research testbed NorNet Core. Gran also has several years of experience as a system administrator and scientific programmer. His research interests center on the intersection of high performance computing and networking, with particular focus on anomaly detection in time series data, HPC interconnection networks, network virtualization, and cloud computing infrastructure. His work demonstrates a consistent evolution from fundamental networking research to applied solutions for modern computing challenges, particularly in IoT security and smart home applications. His recent publications show a strong emphasis on developing lightweight, real-time anomaly detection systems using deep learning techniques. Analysis of his publication trends reveals a clear progression from traditional HPC networking research toward time series anomaly detection applications, particularly for IoT systems. His 15 most recent publications show dual focus areas: approximately 60% concentrate on anomaly detection methods for time series data (particularly for IoT applications), while the remaining 40% maintain his foundational work in HPC networking, virtualization, and cloud infrastructure. This evolution demonstrates his ability to adapt core networking expertise to emerging application domains while maintaining technical depth. While no specific scientific awards are mentioned in the provided text, Gran's leadership roles in significant research projects (eX3, Melodic, ERAC) indicate recognition of his research capabilities within the academic and research funding communities. His position as Scientific Leader of Communication Technologies in the RCN-funded eX3 project further demonstrates his standing in the Norwegian research community. Gran's teaching responsibilities include serving as course coordinator for DCSG1006 Data Communication and Networks, DCSG2001 Interconnected Networks and Network Security, and Networks: Administration, Programming and Security. His research leadership extends to significant grant-funded projects, including the RCN-funded eX3 infrastructure project and the EU H2020 Melodic project. His previous leadership of the ERAC project and the NorNet Core research testbed demonstrates sustained ability to secure and manage substantial research funding. His laboratory and team affiliations include the Department of Information Security and Communication Technology at NTNU, where he heads the communication technology discipline, and Simula Research Laboratory, where he maintains an adjunct position. The NorNet Core research testbed, which he led the development of, represents a significant infrastructure contribution to the networking research community. His current work with the eX3 project suggests ongoing involvement in experimental infrastructure for exascale computing exploration.
Ragnar Weilandt is a postdoctoral research fellow at the Norwegian University of Science and Technology (NTNU) in Trondheim, conducting research within the Reconfiguring EU Democracy Support (REDEMOS) project. His work centers on European Union external action with specific focus on Euro-Mediterranean relations and political dynamics in West Asia and North Africa. Education: PhD in EU democracy promotion in Tunisia, jointly awarded by Université libre de Bruxelles and University of Warwick through the GEM programme Dr. Weilandt's research examines the complex interplay between security imperatives, stability concerns, and democratic governance in EU external relations. His scholarship critically analyzes EU democracy promotion efforts in Tunisia and Morocco, investigating how crises like the Covid-19 pandemic accelerate democratic backsliding while exploring the contested reception of EU norms in recipient states. His work reveals persistent tensions between EU normative aspirations and practical implementation challenges in volatile political contexts. Analysis of his 2018-2025 publications shows consistent thematic focus on democracy support mechanisms in the Mediterranean and Eastern neighbourhood, with increasing attention to conceptual frameworks for evaluating success/failure in democracy building. His interdisciplinary approach bridges political science, international relations, and area studies, frequently employing comparative case analysis of Tunisia, Morocco, and Eastern European states to expose limitations in EU democracy promotion strategies. Scientific Awards: No awards documented in available sources As a postdoctoral fellow, Dr. Weilandt currently serves as a researcher within the REDEMOS project framework rather than as a primary advisor. His work receives institutional support through NTNU's research infrastructure and project-specific funding for the REDEMOS initiative, which examines EU democracy support reconfiguration in response to global democratic challenges. Dr. Weilandt operates within the REDEMOS project team at NTNU's Dragvoll campus, collaborating with international researchers including Anna Khakee and Madalina Dobrescu. His research contributes to NTNU's political science expertise in EU external relations, with particular emphasis on developing more nuanced frameworks for understanding democracy support effectiveness in complex political environments.
Carl-Johannes Johnsen is a Ph.D. student and Guest Researcher in the Department of Computer Science at the University of Copenhagen, specializing in reconfigurable computing and machine learning acceleration for X-ray food inspection systems. His research integrates FPGA-based hardware acceleration with compiler design for high-performance computing, focusing on programming models for Field-Programmable Gate Arrays and optimization of machine learning pipelines. Additional interests include concurrent and distributed programming education methodologies that prioritize conceptual understanding over formal proofs. Publication analysis (2019-2022) reveals consistent contributions to FPGA acceleration of scientific workloads (molecular dynamics), novel compiler vectorization techniques, and minimalist hardware implementations. His work bridges computer architecture, parallel computing, and practical applications in food safety inspection through cross-disciplinary collaboration. No scientific awards were documented in the source material. As an active doctoral candidate, Johnsen has no advisory responsibilities. Research grant details were not specified in the provided information. He operates within the Programming Languages and Theory of Computation research environment at the Department of Computer Science, engaging in international collaborations focused on hardware-software co-design as indicated by network analysis metrics.
Professor Luca Fanucci is a Full Professor of Electronics at the Department of Information Engineering , University of Pisa. He serves as Rector's Delegate for Inclusion of Students with Disabilities and leads research in integrated circuits, embedded systems, and assistive technologies . Institutional roles include membership in the National University Conference of Delegates for Disability (CNUDD) and leadership in the PhD program in Information Engineering. Born: Montecatini Terme (1965) Education: Laurea in Electronic Engineering (1992), PhD in Information Engineering (1996), University of Pisa Professional Journey: ESA research (1992-1996), CNR researcher (1996-2004), University of Pisa faculty (2004-present) His research focuses on: System-level design of integrated circuits and embedded systems Hardware-software co-design for low power consumption Spacecraft and satellite communication systems Medical devices and telemonitoring platforms Assistive technologies for disabilities Recent publications highlight AI in space applications and telemedicine systems . Key projects include the Ingeniars spin-off for satellite communications and the AsTech National Laboratory for assistive technologies. Scientific Recognition : IEEE Fellow (2019) 40+ patents H-index 34 (5000+ citations) He coordinates international conferences (DATE, HiPEAC, Spacewire) and serves as Associate Editor for Technology and Disability and Microprocessors and Microsystems journals.
Adriano José Conceição Tavares is an Associate Professor at the School of Engineering, University of Minho, Portugal. He serves as a Senior Researcher at Centro ALGORITMI, where he is affiliated with both the IE R&D Group and the ESRG R&D Lab. His academic credentials include a PhD in Industrial Electronics from the University of Minho, a Master of Science in Information Technology from the University of Coimbra, and an undergraduate degree in Informatics from the University of Coimbra. Professor Tavares specializes in embedded systems with particular expertise in: Embedded systems modeling and design System software design System-on-chip design Real-time operating systems Hardware acceleration and FPGA design Virtualization for embedded systems IoT frameworks and protocols His publication record demonstrates a strong research trajectory in hardware-software co-design, with recent work showing an increasing integration of machine learning techniques into embedded systems. His publications span theoretical frameworks to practical implementations addressing real-time performance, resource constraints, and security challenges. Among his scholarly metrics: h-index of 18 126 publications with 1148 citations 20 publications in Q1/Q2 journals Author of a book on microcontroller programming Professor Tavares has supervised students including Miguel Ângelo Fernandes Silva and has established international collaborations through the Erasmus Program with institutions in China, Iran, Thailand, Jordan, and Cambodia. He teaches advanced courses on embedded and real-time systems modeling, compiler design, system-on-chip design, real-time operating system design, and advanced computer architectures at University of Minho.
Dr. Johannes Pfau serves as a Scientific Assistant at the Institute for Information Processing Technology (ITIV) within Karlsruhe Institute of Technology (KIT), working in Prof. Becker's research group. His position combines postdoctoral research in advanced FPGA architectures with teaching responsibilities including System-on-Chip internships and academic advising for specialized engineering tracks. Education: Doctorate (Dissertation) in Electrical Engineering and Information Technology, Karlsruhe Institute of Technology, 2024 Research Interests: Pfau's work centers on reconfigurable computing with three interconnected pillars: (1) Next-generation FPGA architectures using emerging technologies like RFETs that require fundamental toolchain redesigns; (2) Digital beamforming systems for satellite Earth observation that replace analog processing with FPGA-based solutions to enable on-orbit data compression; and (3) High-throughput data acquisition systems for 6G prototyping handling multi-100Gbps streams through RFSoC platforms. His research bridges semiconductor physics, hardware architecture, and practical applications in communications and remote sensing. Publication Trends: Pfau's 15 most recent publications (2021-2024) reveal a strong focus on practical FPGA implementations addressing real-world constraints. His work increasingly integrates power management (7 papers), 6G infrastructure (5 papers), and novel semiconductor technologies (4 papers), with a clear trajectory toward hardware solutions for satellite communications and next-generation wireless systems. The research demonstrates consistent progression from architectural innovations (RFET, V-FPGAs) to applied systems (beamforming, 6G testbeds). Advising and Mentorship: Pfau maintains an active student supervision portfolio with documented guidance of 7+ Bachelor's and Master's theses since 2021. His projects emphasize hands-on hardware development, spanning power management techniques, beamforming filter design, and prosthetic control systems. The academic advising role for specializations 13 and 21 positions him at the intersection of computer science and electrical engineering education. Research Context: As a core member of Prof. Becker's group at ITIV, Pfau contributes to KIT's leadership in reconfigurable systems research. The group maintains strong industry connections through 6G initiatives and satellite technology development, with Pfau's work directly supporting German and European efforts in secure communications infrastructure and Earth observation systems.
François-Raymond Boyer is an Associate Professor in the Department of Computer Engineering and Software Engineering at Polytechnique Montréal. He holds a B.Sc. and Ph.D. from Université de Montréal and teaches courses in programming and digital audio. His research spans: Computer architecture and VLSI systems Network processing and traffic management Digital audio signal processing Hardware acceleration and optimization He is affiliated with ReSMiQ (Strategic Cluster for Microsystems) and OICRM (Music Research Observatory). Recent publications focus on 5G network processing, modular programming frameworks, and high-speed traffic management architectures, primarily in IEEE Access and IEEE Transactions on VLSI Systems. Professor Boyer has supervised 3 PhD and 6 Master's students, with research topics including network architecture, audio processing, and hardware design. No scientific awards are mentioned in the available records.
