Prof. Dr.-Ing. Ulrich Rückert is a Professor at the Faculty of Engineering of the University of Bielefeld , where he leads the Cognitronics & Sensor Technology Group and participates in CITEC (Center for Cognitive Interaction Technology). He serves as Vice Rector for Digitalization and Data Infrastructure , driving university-level digital transformation initiatives. Research Focus : Neuromorphic computing, spiking neural networks (SNNs), embedded systems, robotics, UWB localization, and reconfigurable hardware. Projects : Leading federal and EU-funded initiatives like eProcessor (RISC-V multi-core systems), VEDLIoT (efficient deep learning in IoT), and Al4DG (AI in distribution grid control). Teaching & Leadership : Academic advisor for the Master in Biomechatronics , chairs examination boards, and leads the Library Commission . His work integrates neuromorphic hardware with edge computing and real-time systems , supported by grants from the European Union and German Federal Government . Recent publications analyze FPGA-based SNNs , UWB localization , and resource-efficient embedded architectures . Scientific Contributions : Over 200 publications in robotics, neural networks, and hardware-software co-design. Notable collaborations with institutions in Germany, Switzerland, and Italy.
Luca Barbierato is a Fixed-term Assistant Professor at the Department of Control and Computer Engineering (DAUIN), Politecnico di Torino, specializing in applied artificial intelligence, cybersecurity, and co-simulation infrastructures for integrated energy systems. He actively contributes to research in edge computing, IoT, and sustainable energy technologies. Research Focus: AI applications in energy systems, secure IoT infrastructures, and co-simulation frameworks Teaching Roles: Invited PhD teaching component (2025/26), teaching assistant across multiple programs His recent publications address critical areas including OpenTitan-based security controllers, urban building energy modeling, and distributed power system co-simulation. Barbierato's work aligns with SDG Goals 7 (Affordable Energy), 9 (Innovation Infrastructure), and 11 (Sustainable Cities). Notable scientific recognition includes the Learning to Teach (L2T) badge from Politecnico di Torino.
Rafael Medina Morillas is a researcher at the Embedded Systems Laboratory (ESL) at Ecole Polytechnique Fédérale de Lausanne (EPFL), where he focuses on computer architecture and hardware acceleration for edge AI systems. His research addresses the memory wall problem through innovative architectural designs that improve energy efficiency and performance in data-intensive applications. His primary research interests include: Compute-near-Memory architectures Hardware acceleration for machine learning Edge AI systems Chiplet architectures and interconnects Wireless communication for computing systems Medina Morillas' publication record demonstrates significant advancements in memory systems and hardware acceleration. His work on SideDRAM shows up to 83% EDAP reduction compared to state-of-the-art designs, while his research on wireless communication achieves up to 2.64x speedup for deep neural networks. His recent publications focus on structured pruning techniques for transformers, co-design frameworks for edge AI, and thermal management solutions for heterogeneous systems. His research is supported by collaborations with IMEC, Université de Bordeaux, and HEIG-VD, as well as funding from EC H2020 projects and the ACCESS-AI Chip Center. These partnerships enable comprehensive exploration of architectural innovations across different technology domains. As evidenced by his doctoral thesis 'System-aware Architectural Co-design to Tackle the Memory Wall,' Medina Morillas takes a cross-layer approach to system design, integrating hardware and software optimizations to address fundamental bottlenecks in modern computing systems. His work demonstrates how system-aware architectural design can achieve improvements in runtime, energy consumption, and thermal behavior for data-intensive applications.
Pengbo Yu is a researcher at the Embedded Systems Laboratory (ESL) within the School of Engineering at École polytechnique fédérale de Lausanne (EPFL). His work focuses on developing energy-efficient hardware architectures for edge artificial intelligence applications, with particular emphasis on variable-precision computing techniques. His research interests span computer architecture, edge AI hardware acceleration, neural network quantization, memory systems, and low-power computing. Dr. Yu's work bridges the gap between algorithmic robustness in quantized neural networks and specialized hardware implementations that can dynamically adjust precision to maximize efficiency in resource-constrained environments. His recent publications demonstrate a strong focus on the SoftSIMD paradigm, Dynamic Bitwidth-Frequency Scaling techniques, and near-memory computing solutions that achieve significant energy savings (up to 67%) compared to state-of-the-art approaches. His work shows consistent output in top venues including IEEE Transactions on VLSI Systems and ACM Transactions on Embedded Computing Systems. Dr. Yu's research is supported by multiple funding agencies including EC H2020, H2020, and SNSF. He maintains active collaborations with researchers across Europe, including institutions like IMEC and National Technical University of Athens. His laboratory work centers around the Embedded Systems Laboratory at EPFL, where he develops and validates novel hardware architectures for energy-efficient AI acceleration. Current projects include silicon validation of his proposed architectures on open-source RISC-V platforms and integration of variable-precision computing techniques into memory systems.
Lecturer Rok Češnovar is affiliated with the Laboratory for Adaptive Systems and Parallel Processing (LASPP). His work focuses on computational methods in adaptive systems and parallel processing. Teaches classes in Computer Systems Organisation, Input-Output Systems, and Embedded Systems Active in research projects related to computationally intensive statistical analysis, sensor networks, and RISC-V vector processors Research Focus Rok Češnovar specializes in embedded systems and signal processing , with emphasis on computationally intensive methods and approximate computing . His work bridges theoretical statistics with practical implementation in adaptive systems. Project History He has contributed to projects including: ARRS-funded research on computationally intensive statistical methods (2016-2019) Decomposing cognition in working memory studies (J3-9264, 2018-2021) High-performance RISC-V vector processor computing (BI-HR/23-24-009, 2023-2025)
George Papadimitriou is an Assistant Professor in the Computer Engineering & Informatics Department at the University of Patras , Greece, hosted within the School of Engineering . His primary affiliation lies with the Computer Hardware and Architecture division, where he leads research and teaching activities focused on dependable, energy-efficient computer architectures. Education: PhD in Computer Science, Department of Informatics & Telecommunications, National and Kapodistrian University of Athens (2019) Post-doctoral researcher, Computer Architecture Lab, National and Kapodistrian University of Athens Research Interests: Dr Papadimitriou’s research lies at the intersection of computer architecture , energy efficiency , and microprocessor reliability . His work specifically targets: Robust and energy-efficient CPU/GPU/accelerator architectures Post-silicon validation techniques for catching elusive hardware bugs Silent data corruption detection and mitigation across the compute stack Characterization of voltage margins and power consumption in modern microprocessors Modeling and simulation of domain-specific accelerators for low-power, dependable operation More recently, his team has been extending these methodologies to RISC-V and neuromorphic photonic accelerators within large European consortia. Scientific Awards & Recognition: Eight HiPEAC Paper Awards for top-tier conference publications (MICRO, HPCA, ISCA) between 2017–2024 IEEE Transactions on Computers 2022 Best Paper Award for the article “Anatomy of On-Chip Memory Hardware Fault Effects Across the Layers” TTTC/ITC Gerald W. Gordon Student Award 2023 Research Funding & Projects: Dr Papadimitriou is principal investigator or key technical contributor in multiple Horizon Europe and industry-backed projects that collectively exceed €50 M in funding. Current leadership roles include: DARE (Digital Autonomy for RISC-V in Europe) NEUROPULS (Neuromorphic Energy-Efficient Secure Accelerators) REBECCA (Reconfigurable Heterogeneous Highly Parallel Processing Platform) Vitamin-V (Virtual Environment & Tool-boxing for Trustworthy RISC-V Cloud Services) Intel, IBM, and Thales bilateral research contracts on energy-efficient and resilient microarchitectures Laboratory & Team: He leads the Energy-Efficient and Dependable Architectures (EEDA) research group at University of Patras, operating laboratory facilities for silicon measurement, FPGA emulation, and full-system simulation (gem5, MARSS, custom tools). The team currently comprises 3 PhD candidates, 2 post-docs, and several MSc thesis students collaborating with European and US partners.
Veysel Harun ŞAHİN is an Associate Professor at the Department of Software Engineering , Faculty of Computer and Information Sciences , Sakarya University. He has been affiliated with Sakarya University since 2007, initially serving as a Research Assistant (2007–2014) and later as a Lecturer (2014–present) before advancing to his current role. Education: Doctorate in Computer and Information Engineering (2005–2013), Sakarya University, thesis: 'Switched approach to allocating memory for large objects in real-time Java' Master’s in Electrical and Electronics Engineering (2002–2005), Sakarya University, thesis: 'Generalized scattering matrix technique and macsyma' Bachelor’s in Electronics Engineering (1994–2001), Ankara University Research interests span software testing, mobile applications (Android, smartphones), artificial intelligence (deep learning, neural networks, TensorFlow Lite), control flow graph reconstruction, and RISC-V ISA. His work also intersects with medical imaging (skin lesions) and emerging fields like monkeypox-related computational approaches. Contact: vsahin@sakarya.edu.tr
Rolf Drechsler is a Full Professor and Head of the Group of Computer Architecture at the University of Bremen's Institute of Computer Science since 2001, and Director of the Cyber-Physical Systems Group at DFKI Bremen since 2011. He holds an adjunct professorship at the Indian Statistical Institute and has been affiliated with Duke University. Education: Diploma (1992) and Dr. phil. nat. (1995) in Computer Science from Goethe University Frankfurt Academic Leadership: Dean of Mathematics and Computer Science Faculty (2018-2025), Vice Rector for Research (2008-2013) His research focuses on formal verification , RISC-V architectures , and quantum/in-memory computing . Recent work explores LLM integration in hardware testing and polynomial-based verification techniques. Publications from 2024-2025 span IEEE Transactions , DATE , and DAC , emphasizing automated verification , quantum circuit mapping , and LLM-driven testbench generation . Scientific Awards IEEE/ACM Best Paper Awards (2013, 2018) Berninghausen-Preis for Innovative Teaching (2018) IEEE Fellow (2015) Founder Award for Solvertec (2013) He has served on program committees for DAC, ICCAD, DATE, and founded graduate schools in Embedded Systems and System Design under Germany's Excellence Initiative.
Kamkin Alexander Sergeevich is an Associate Professor at the National Research University Higher School of Economics (HSE) and the Institute for System Programming named after V.P. Ivannikov of the Russian Academy of Sciences (ISP RAS). Affiliated with the Faculty of Computer Science and the Moscow Institute of Electronics and Mathematics, he specializes in software and computer engineering with a focus on formal methods for program and microprocessor verification. Education: Candidate of Physical and Mathematical Sciences (2009), Moscow State University (2003) in Applied Mathematics and Computer Science Research Areas: Formal methods, program verification, microprocessor verification, model-based testing, static analysis His recent publications highlight the application of formal specifications in test program generation for architectures like RISC-V and ARMv8, emphasizing simulation modeling and ISA specification maintenance. Key trends include the integration of constraint-based testing, formal modeling, and automated verification tools. Kamkin supervises students in software engineering and collaborates with colleagues such as Tatarnikov A.D., Protsenko A.S., and Chupilko M.M. At HSE, he has taught courses including Software Verification (Master's, 09.04.04 Software Engineering) and High-Level and Simulation Modeling of Digital Systems (Bachelor's, 09.03.01 Computer Science and Engineering). His work is associated with the MicroTESK framework, which automates test generation for microprocessors.
Professor Luca Fanucci is a Full Professor of Electronics at the Department of Information Engineering , University of Pisa. He serves as Rector's Delegate for Inclusion of Students with Disabilities and leads research in integrated circuits, embedded systems, and assistive technologies . Institutional roles include membership in the National University Conference of Delegates for Disability (CNUDD) and leadership in the PhD program in Information Engineering. Born: Montecatini Terme (1965) Education: Laurea in Electronic Engineering (1992), PhD in Information Engineering (1996), University of Pisa Professional Journey: ESA research (1992-1996), CNR researcher (1996-2004), University of Pisa faculty (2004-present) His research focuses on: System-level design of integrated circuits and embedded systems Hardware-software co-design for low power consumption Spacecraft and satellite communication systems Medical devices and telemonitoring platforms Assistive technologies for disabilities Recent publications highlight AI in space applications and telemedicine systems . Key projects include the Ingeniars spin-off for satellite communications and the AsTech National Laboratory for assistive technologies. Scientific Recognition : IEEE Fellow (2019) 40+ patents H-index 34 (5000+ citations) He coordinates international conferences (DATE, HiPEAC, Spacewire) and serves as Associate Editor for Technology and Disability and Microprocessors and Microsystems journals.
Adriano José Conceição Tavares is an Associate Professor at the School of Engineering, University of Minho, Portugal. He serves as a Senior Researcher at Centro ALGORITMI, where he is affiliated with both the IE R&D Group and the ESRG R&D Lab. His academic credentials include a PhD in Industrial Electronics from the University of Minho, a Master of Science in Information Technology from the University of Coimbra, and an undergraduate degree in Informatics from the University of Coimbra. Professor Tavares specializes in embedded systems with particular expertise in: Embedded systems modeling and design System software design System-on-chip design Real-time operating systems Hardware acceleration and FPGA design Virtualization for embedded systems IoT frameworks and protocols His publication record demonstrates a strong research trajectory in hardware-software co-design, with recent work showing an increasing integration of machine learning techniques into embedded systems. His publications span theoretical frameworks to practical implementations addressing real-time performance, resource constraints, and security challenges. Among his scholarly metrics: h-index of 18 126 publications with 1148 citations 20 publications in Q1/Q2 journals Author of a book on microcontroller programming Professor Tavares has supervised students including Miguel Ângelo Fernandes Silva and has established international collaborations through the Erasmus Program with institutions in China, Iran, Thailand, Jordan, and Cambodia. He teaches advanced courses on embedded and real-time systems modeling, compiler design, system-on-chip design, real-time operating system design, and advanced computer architectures at University of Minho.
Stefano Di Carlo is a Full Professor at the Department of Control and Computer Science (DAUIN) at Politecnico di Torino. He is the Coordinator of the Doctoral School in Artificial Intelligence and a member of the PolitoBIOMed Lab and the Doctoral School Council. His research spans Artificial Intelligence , Computer Architecture , Bioinformatics , and Cybersecurity , with a focus on 3D bioprinting , hardware security , and reliability analysis . Research Interests : Approximate computing systems Cybersecurity for connected vehicles Spiking neural networks and neuromorphic hardware Multicellular synthetic biological systems Hardware-based malware detection Biomedical simulation tools Article Trends : His recent publications address approximate computing (7/15), cybersecurity (6/15), and bioinformatics (4/15). Key subtopics include RISC-V security , gradient inversion attacks , photonic computing , and real-time fault injection . Scientific Awards : Best Paper Awards at IEEE AQTR (2010, 2012), IEEE DDECS (2013), and BIOINFORMATICS/BIOSTEC (2014) IEEE Computer Society Golden Core Award (2006), Meritorious Service Award (2010) IEEE Fellow (2011-) and Senior Member Advising & Grants : He supervises 14 PhD students and leads projects like Vitamin-V (RISC-V cloud services), APROPOS (approximate computing), and SERICS (cybersecurity). His lab, SMILIES, focuses on resilient computer architectures and bioinformatics . Labs & Teams : Lab 6 - Research Laboratory (DAUIN) SMILIES - Resilient computer architectures and life sciences PolitoBIOMed Lab - Biomedical engineering
Dr. Johannes Pfau serves as a Scientific Assistant at the Institute for Information Processing Technology (ITIV) within Karlsruhe Institute of Technology (KIT), working in Prof. Becker's research group. His position combines postdoctoral research in advanced FPGA architectures with teaching responsibilities including System-on-Chip internships and academic advising for specialized engineering tracks. Education: Doctorate (Dissertation) in Electrical Engineering and Information Technology, Karlsruhe Institute of Technology, 2024 Research Interests: Pfau's work centers on reconfigurable computing with three interconnected pillars: (1) Next-generation FPGA architectures using emerging technologies like RFETs that require fundamental toolchain redesigns; (2) Digital beamforming systems for satellite Earth observation that replace analog processing with FPGA-based solutions to enable on-orbit data compression; and (3) High-throughput data acquisition systems for 6G prototyping handling multi-100Gbps streams through RFSoC platforms. His research bridges semiconductor physics, hardware architecture, and practical applications in communications and remote sensing. Publication Trends: Pfau's 15 most recent publications (2021-2024) reveal a strong focus on practical FPGA implementations addressing real-world constraints. His work increasingly integrates power management (7 papers), 6G infrastructure (5 papers), and novel semiconductor technologies (4 papers), with a clear trajectory toward hardware solutions for satellite communications and next-generation wireless systems. The research demonstrates consistent progression from architectural innovations (RFET, V-FPGAs) to applied systems (beamforming, 6G testbeds). Advising and Mentorship: Pfau maintains an active student supervision portfolio with documented guidance of 7+ Bachelor's and Master's theses since 2021. His projects emphasize hands-on hardware development, spanning power management techniques, beamforming filter design, and prosthetic control systems. The academic advising role for specializations 13 and 21 positions him at the intersection of computer science and electrical engineering education. Research Context: As a core member of Prof. Becker's group at ITIV, Pfau contributes to KIT's leadership in reconfigurable systems research. The group maintains strong industry connections through 6G initiatives and satellite technology development, with Pfau's work directly supporting German and European efforts in secure communications infrastructure and Earth observation systems.
Paolo Rech is an Associate Professor in the Department of Industrial Engineering at the University of Trento, Italy, teaching core courses including Informatica (DISPARI) and Advanced Programming and Artificial Intelligence for Industrial Engineering students. His research spans hardware-software reliability under radiation exposure with emphasis on real-world applications. His primary research domains feature: Reliability Engineering : Pioneering fault-tolerance methodologies for radiation-prone environments Radiation Effects : Quantifying neutron/gamma impacts on GPUs, TPUs, and quantum devices Computer Architecture : Designing hardened RISC-V systems and post-CMOS accelerators AI Reliability : Developing fault-aware neural networks for safety-critical deployment Quantum Vulnerability : Characterizing error mechanisms in quantum circuits Analysis of his 15 most recent publications reveals a dominant focus on radiation-hardened computing systems, with 83% of works addressing neutron-induced faults in GPUs/TPUs and quantum devices. His methodology consistently integrates neutron beam experiments, fault injection frameworks, and architectural hardening techniques across space, medical, and autonomous systems applications. Scientific Awards: None documented in available sources. His teaching directly feeds into research supervision, with course content on C++ programming, object-oriented design, and quantum computing foundations forming the basis for student projects in fault-tolerant system development. Current grants likely support neutron irradiation testing and quantum reliability initiatives given publication patterns, though specific funding details aren't publicly itemized. He operates within University of Trento's engineering research ecosystem, collaborating with teams specializing in radiation testing and quantum computing through projects like ARCHYTAS and Trikarenos, though no dedicated lab name is specified in source materials.
Ohad Kammar is a researcher at the University of Edinburgh , actively contributing to programming language theory, denotational semantics, and algebraic effects. His work bridges theoretical foundations with practical implementations. Research Themes : Type-driven development, concurrency, probabilistic programming, normalization algorithms, and algebraic effects. Conference Involvement : Committee member in Diversity, Equity and Inclusion , Student Research Competition , and LAFI tracks at POPL; program committee roles in ICFP, APLAS, PEPM, and HOPE. Publications : Focus on denotational semantics, effect handlers, relaxed memory concurrency, and dependently-typed probabilistic models.
