جستجوی استاد راهنمای دانشگاهی

Shweta Shindeمشاهده پروفایل

استادیار

• Trusted Computing
• System Security
• Program Analysis
• +۴ مورد دیگر

Shweta Shinde is an Assistant Professor at ETH Zürich's Department of Computer Science. She leads the Secure & Trustworthy Systems (SECTRS) group and is affiliated with the Institute of Information Security and the ZISC Center. Her research focuses on foundational and practical aspects of trusted computing, system security, and program analysis to protect devices ranging from smartphones to cloud servers. Key areas include AMD SEV-SNP, Arm CCA, Intel SGX, and hardware-software co-design for security. Dr. Shinde has made significant contributions to confidential computing, including frameworks like OpenCCA and tools for analyzing hardware vulnerabilities. Her work has been recognized with Best Paper Awards and Distinguished Paper Awards at top venues. She advises a group of PhD students, including Mark Kuhne, Supraja Sridhara, and Benedict Schlüter. Her service includes program committee roles at IEEE Security & Privacy, USENIX Security, and as Track Co-Chair for AsiaCCS 2026.

Alessandro Ottavianoمشاهده پروفایل

پژوهشگر

• Computer Architecture
• Embedded Systems
• Real-Time Systems
• +۳ مورد دیگر

Dr. Alessandro Ottaviano is a Researcher affiliated with the Department of Digital Integrated Circuits and Systems at ETH Zürich. His work focuses on advanced computer architecture and embedded systems, particularly in the domains of RISC-V processors, real-time systems, and heterogeneous computing. He contributes to the design of time-predictable virtual memory solutions, mixed-criticality systems, and energy-efficient hardware-software interfaces. Key research areas include modular processor architectures, hardware monitoring for safety-critical applications, and power management in high-performance computing (HPC) systems. His recent projects involve developing controllers for 2.5D systems-in-package and creating open-source networking solutions for mixed-criticality environments. Ottaviano’s work often emphasizes open-source hardware design and scalable system-level approaches to address challenges in autonomous systems and edge computing. He collaborates on advancements in interrupt handling for virtualized systems, peripheral event linking for IoT devices, and FPGA-based thermal emulation for many-core processors. His research bridges theoretical computer architecture principles with practical implementations in embedded and real-time systems.

Christoph Leitnerمشاهده پروفایل

پژوهشگر ارشد

• Convergent Technologies
• Ultrasonics
• Machine Learning
• +۳ مورد دیگر

Dr. Christoph Leitner is a Research Fellow at ETH Zurich's Integrated Systems Laboratory under Prof. Luca Benini, focusing on biomedical and IoT applications. His work integrates printed piezoelectric transducers and flexible electronics with energy-efficient systems. He holds a PhD in Biomedical Engineering from TU Graz (2022) and has collaborated with institutions like Sant'Anna School of Advanced Studies and KTH Stockholm. Notable achievements include the Josef Krainer Young Researcher Award and Motorik Scholarship. Leitner's research spans ultrasonics, machine learning, and wearable devices, with contributions to muscle-tendon dynamics and real-time biofeedback systems. Education: PhD in Biomedical Engineering, TU Graz (2022), Advisor: Prof. Christian Baumgartner Previous roles: University Assistant (2006–2011) and R&D Engineer at Virtual Vehicle GmbH Research Interests: Convergent technologies merging biomedical engineering and IoT Ultrasound-based monitoring for musculoskeletal systems Energy-efficient embedded systems for wearable applications Collaborations & Awards: Recipient of Josef Krainer Young Researcher Award (2023) and Motorik Scholarship (2018) Active collaborations with University of Zurich, Veterinary University of Vienna, and Queensland University of Technology Labs & Projects: Integrated Systems Laboratory at ETH Zurich Developed a patented ultrasound-transparent tattoo-based SEMG system with Prof. Francesco Greco

Pasquale Davide Schiavoneمشاهده پروفایل

مدرس

• Embedded Systems
• RISC-V Architecture
• Ultra-low-power Computing
• +۵ مورد دیگر

Pasquale Davide Schiavone holds multiple research and teaching positions at École Polytechnique Fédérale de Lausanne (EPFL), serving as a Lecturer at the School of Computer and Communication Sciences (IC) and as a Scientist at both the Embedded Systems Laboratory (ESL) within the School of Engineering (STI) and PAT Administration. His interdisciplinary work bridges computer architecture, embedded systems design, and biomedical applications, with office located at ELG 136 in Lausanne, Switzerland. Dr. Schiavone's research focuses on ultra-low-power computing systems, particularly RISC-V architectures and TinyML applications for edge devices. His work develops open-source hardware platforms like X-HEEP and HEEPOCRATES that enable energy-efficient AI at the edge, with applications spanning biomedical monitoring, neural interfaces, and wearable computing. He explores innovative hardware-software co-design approaches to overcome energy constraints in resource-limited environments. His recent publications reveal a consistent research trajectory centered on open, configurable computing platforms for specialized applications. The work spans from fundamental RISC-V architecture improvements (ARCANE, e-GPU) to application-specific implementations for biomedical contexts (BiomedBench, neural interfaces). A strong emphasis on energy efficiency permeates all his research, whether through novel arithmetic approaches (Posit), system architecture (near-memory computing), or specialized accelerators (Strela, Quadrilatero). Lecturer, School of Computer and Communication Sciences (IC) Scientist, Embedded Systems Laboratory (ESL), School of Engineering (STI) Scientist, PAT Administration, School of Engineering (STI) Dr. Schiavone teaches courses on hardware compilation, presenting algorithms and methods for transforming hardware description languages into optimized circuit implementations. His Embedded Systems Laboratory work places him at the forefront of developing practical, open-source solutions for next-generation computing challenges in energy-constrained environments.

David Atienzaمشاهده پروفایل

استاد

• Embedded Systems
• Low-Power Computing
• Edge AI
• +۳ مورد دیگر

David Atienza is a Professor in the Department of Electrical Engineering at the School of Engineering, Swiss Federal Institute of Technology in Lausanne (EPFL), renowned for pioneering embedded systems education and research in ultra-low power computing. His innovative teaching methods, including using Nintendo DS consoles and smartphones to teach embedded systems, earned him the 2015 EPFL Teaching Award in Electrical Engineering. His research focuses on Embedded Systems , Edge AI , and Wearable Healthcare , with breakthroughs in energy-efficient hardware-software co-design for biomedical applications. Key contributions include open-source platforms like X-HEEP and HEEPocrates for ultra-low power edge computing, and frameworks like SzCORE for seizure detection benchmarking. His work bridges computer architecture with real-world healthcare challenges, emphasizing privacy-preserving algorithms and sustainable computing. Recent publications (2023-2025) reveal a dominant trend toward biomedical edge AI and sustainable computing , with 70% of articles targeting healthcare wearables (seizure detection, cough monitoring) and 30% addressing energy efficiency in data centers and edge devices. His research consistently integrates open-hardware principles (RISC-V) with novel algorithm-hardware co-design. Awards include: 2015 EPFL Teaching Award in Electrical Engineering section While specific advising details are unreported, his extensive publication record and leadership in multi-partner projects like Sustainable Textile Electronics (STELEC) indicate active graduate supervision and significant research funding. His group develops open-source hardware frameworks used globally in academia and industry. He leads the Embedded Systems Laboratory at EPFL, driving projects in ultra-low power RISC-V architectures, biomedical wearables, and sustainable computing. Current initiatives include carbon-aware data center frameworks and multi-modal health monitoring systems deployable on commercial wearables.

• Computer Architecture
• Embedded Systems
• Machine Learning Accelerators
• +۵ مورد دیگر

Marina Zapater Sancho is a researcher at the Embedded Systems Laboratory (ESL) within the School of Engineering at École Polytechnique Fédérale de Lausanne (EPFL) . She specializes in computer architecture, with a focus on energy-efficient systems, AI accelerators, and memory-centric computing paradigms. Research Interests: Compute-Near-Memory (CnM) : Pioneering architectures like SideDRAM and processing-near-bank designs to reduce energy consumption and latency in DRAM systems. AI Accelerators : Frameworks such as LIONHEART for analog-digital hybrid systems, and Gem5-AcceSys for exploring interconnects in ML accelerators. System Simulation : Contributions to RISC-V full-system simulation validation (gXR5) and component-level calibration methodologies. Her work bridges software and hardware, addressing challenges in heterogeneous systems, thermal management in 2.5D/3D packages, and virtual memory optimization for cache-intensive workloads. Recent trends emphasize energy-proportional computing and edge AI deployment . Grants & Collaborations: Funded by EU H2020 programs and the ACCESS-AI Chip Center (Hong Kong), her research is conducted within the ESL team led by Prof. David Atienza Alonso.

Taekwang Jangمشاهده پروفایل

دانشیار

• Analog and Mixed-Signal Circuits
• Energy-Efficient Systems
• Wireless Sensor Networks
• +۳ مورد دیگر

Prof. Taekwang Jang is an Associate Professor at the Department of Information Technology and Electrical Engineering, ETH Zürich. He leads the Energy Efficient Circuits and IoT Systems Group, focusing on analog and mixed-signal circuits for energy-constrained applications such as wireless sensor nodes and biomedical electronics. His research includes sensor interfaces, energy harvesters, power converters, and communication systems. He holds 15 patents and has authored over 80 peer-reviewed publications. Key awards include the 2024 IEEE Solid-State Circuits Society New Frontier Award and the SNSF Starting Grant. Educations: B.S. and M.S. in Electrical Engineering, KAIST (2006, 2008) Ph.D. in Electrical Engineering, University of Michigan (2017) Affiliations: Chair of IEEE Solid-State Circuits Society, Switzerland Chapter Associate Editor for Journal of Solid-State Circuits (JSSC) Research Interests: His work spans energy-efficient integrated circuits, biomedical interfaces, and IoT systems. Notable contributions include low-power keyword spotting ICs, ultra-low-noise amplifiers, and neural stimulation systems. He emphasizes practical applications in healthcare and wearable devices. Awards: 2024 IEEE Solid-State Circuits Society Distinguished Lecturer 2022 IEEE ISSCC Jan Van Vessem Award 2009 IEEE CAS Guillemin-Cauer Best Paper Award Advising & Grants: Supervises a team of researchers and has secured grants including the SNSF Starting Grant. His lab collaborates with institutions like the Competence Center for Rehabilitation Engineering and Science. Labs & Teams: Leads the Energy-Efficient Circuits and Intelligent Systems group at ETH Zurich, focusing on interdisciplinary projects at the intersection of circuits, systems, and biomedical engineering.

• Security
• Embedded Systems Security
• Cyber-Physical Systems Security
• +۱۳ مورد دیگر

Francesco Regazzoni is a Senior Researcher at the Faculty of Informatics, Università della Svizzera italiana (USI), and affiliated with the Dalle Molle Institute for Artificial Intelligence (IDSIA USI-SUPSI). His work bridges embedded systems, cybersecurity, and artificial intelligence, with a focus on securing hardware and cyber-physical systems. Research Interests: His expertise spans embedded and cyber-physical systems security, side-channel attacks, post-quantum cryptography, hardware trojans, random number generators, and the security of AI and approximate computing. He also contributes to hardware/software co-design and operating systems security. The analysis of his recent publications reveals a consistent focus on hardware and system-level security , particularly in resource-constrained environments like IoT and embedded devices. His work integrates machine learning for attack detection and applies formal methods to ensure trust in hardware. A growing emphasis is placed on securing AI systems from physical and adversarial threats. Scientific Contributions: Over 100 peer-reviewed publications One book and one patent Extensive international collaboration (Belgium, Netherlands, USA, Switzerland, Singapore) Advising and Grants: While specific advisees and grants are not listed, his leadership in funded research projects and involvement with ALaRI and IDSIA suggest active mentorship and project coordination. His work has been supported by industry (e.g., ST Microelectronics, HP), the Swiss National Foundation, and the European Union. Labs and Teams: He is part of the Graph Machine Learning Group (GMLG) at IDSIA, which evolved from the Advanced Learning and Research Institute (ALaRI). This group focuses on graph machine learning, reinforcement learning, and dynamical systems, particularly in non-stationary environments.

• Computer Architecture
• Embedded Systems
• High-Performance Computing
• +۹ مورد دیگر

Zapater Sancho Marina is an Associate Professor at the ReDS Institute (Institute of Reconfigurable and Embedded Digital Systems) within the School of Engineering and Management Vaud (HEIG-VD), part of the University of Applied Sciences and Arts Western Switzerland (HES-SO). She holds dual master's degrees in Electronic and Telecommunication Engineering from Universitat Politècnica de Catalunya (2010) and a PhD in Computer Science from Universidad Politécnica de Madrid (2015). Her career includes postdoctoral work at EPFL (2016-2020) and assistant professorship at Universidad Complutense de Madrid (2015-2016). Education BSc & MSc in Electronic Engineering (UPC 2010) PhD in Computer Science (UPM 2015) Research Focus spans cross-layer optimization of heterogeneous architectures for performance and energy efficiency, with emphasis on: Embedded systems (IoT/edge computing) High-performance compute architectures Analog in-memory computing for AI Thermal/power management in 3D chips Cloud-edge AI workload orchestration Publication Trends show expertise in RISC-V simulation frameworks, analog computing tiles for CNNs, virtual memory redesign, and AI-driven cloud performance prediction. Her recent work explores thermal-aware 3D chip management, hybrid-cache reliability optimization, and open-source teaching platforms for radio theory. Awards include a Spanish government PhD fellowship. She has led 4 European H2020 projects since 2016 and currently serves as PI for 4 industrial collaborations (Facebook/Intel/Huawei), Innosuisse projects, and HES-SO initiatives. Labs & Teams include the ReDS Institute, EPFL's Embedded Systems Laboratory, and collaborations with Yale/Edinburgh. She co-developed the ALPINE simulation framework and SO3 operating system modifications for Midgard project validation.

• Embedded Systems
• AI Algorithms
• FPGA/VHDL Design
• +۵ مورد دیگر

Jürgen Wassner is a Professor of Edge Computing and Co-Head of the Competence Center for Intelligent Sensors and Networks at the Lucerne School of Engineering and Architecture (HSLU T&A). He holds a master's degree from Technical University of Dresden and a PhD from ETH Zurich. His career spans industry roles in Silicon Valley Group Inc. and telecommunication R&D before joining academia in 2007. His research focuses on embedded systems, AI at the edge, FPGA/VHDL design, real-time systems, and powerline communication . He leads projects such as 'Visual-Servoing Testbed with AI-Hardware in the Loop' and 'Low-Cost High-Performance Intelligent Camera for Space Debris Mitigation,' collaborating with companies like Diehl Aerospace. Recent publications emphasize wire fault detection using powerline communication, AI-based odor classification systems, and hardware acceleration for CNNs. His work bridges theoretical research with practical applications in avionics, rail freight, and space debris mitigation. Wassner advises Master of Science in Engineering students and has been recognized for his media engagement including a feature in the Luzerner Zeitung. He teaches Digital Design (FPGA, VHDL) and Digital Signal Processing , emphasizing hands-on implementation of cutting-edge systems.

Edouard Bugnionمشاهده پروفایل

استاد

• Computer Systems
• Data Center Systems
• Data Center Infrastructure and Networking
• +۷ مورد دیگر

Prof. Edouard Bugnion is a Full Professor at the Data Center Systems Laboratory within the School of Computer Science and Communications at École Polytechnique Fédérale de Lausanne (EPFL). Since joining EPFL in 2012, he has led research in datacenter systems and virtualization, with prior experience as VMware's first CTO and Cisco's VP/CTO. Research Interests: Data Center Systems Network and Data Plane Efficiency Operating System Design Virtualization Technologies Trusted Execution Environments Low-Latency Computing His recent publications focus on datacenter efficiency for OLDI applications, system security through hardware-based trust, and network-compute co-design . These works span topics from microsecond-scale latency optimization to privacy-preserving proximity tracing systems. Scientific Recognition: Elected ACM Fellow (2017) ACM Software Systems Award (2009) Teaching: Currently teaching CS-212: Systems Programming Project , with past courses including CS-522: Principles of Computer Systems and CS-410: Technology Ventures .

• Computer Architecture
• Computer Arithmetic
• RISC-V Systems
• +۳ مورد دیگر

David Mallasen Quintana is a Scientist and Lecturer at the Swiss Federal Institute of Technology Lausanne (EPFL), affiliated with both the School of Engineering (STI) and the Integrated Systems Laboratory (ESL) within the Institute of Electrical and Microengineering. He also holds teaching responsibilities in the School of Computer and Communication Sciences (IC) at EPFL. Dr. Quintana completed his Ph.D. in Computer Engineering at Universidad Complutense de Madrid in 2024. His research focuses on: Computer architecture and arithmetic systems RISC-V ecosystem development and customization Energy-efficient hardware design and domain-specific accelerators Posit arithmetic implementations and optimizations Embedded systems and low-power computing solutions His recent publications demonstrate consistent focus on RISC-V extensions, posit arithmetic implementations, and hardware/software co-design approaches for efficient computing. The work spans from fundamental arithmetic units to application-specific accelerators, with evolving emphasis on scientific computing applications and energy-constrained environments. Dr. Quintana actively contributes to open-source hardware projects including PERCIVAL, x-HEEP, and various arithmetic unit implementations. His research group develops energy-efficient platforms and tools for hardware deployment within the RISC-V ecosystem.

Alexandre Sébastien Julien Levisseمشاهده پروفایل

مدرس

• Computer Architecture
• VLSI Design
• Low-Power Electronics
• +۴ مورد دیگر

Alexandre Sébastien Julien Levisse is a Lecturer at the Institute of Electrical Engineering within EPFL's School of Engineering, with additional roles as System Specialist in PAT/SEL departments and Scientist in IEM. His work centers on energy-efficient hardware architectures for edge computing and AI applications. Research focuses on: Computer Architecture & VLSI Design Low-Power Electronics for edge devices Emerging Memory Technologies (RRAM, OxRAM) Neuromorphic & Approximate Computing In-Memory/ Near-Memory Computing Edge AI Hardware Acceleration His 2022-2025 publications reveal strong emphasis on specialized edge AI hardware, including near-DRAM architectures (SideDRAM), RISC-V microcontrollers for healthcare (HEEPOcrates), and overflow-free memory systems. Key innovations involve hardware-software co-design for energy efficiency, variable precision computation, and novel memory hierarchies targeting wearable sensors and edge inference. Levisse teaches Fundamentals of VLSI Design and Lab in Advanced VLSI Design at EPFL. He actively contributes to digital education as a member of EPFL's Centre for Digital Education (CCE), developing curricula for next-generation hardware engineers.

Frank Kagan Gürkaynakمشاهده پروفایل

پژوهشگر

• Energy-Efficient Microelectronics
• Cryptographic Hardware Security
• Digital Integrated Circuit Design
• +۴ مورد دیگر

Frank Kagan Gürkaynak is Director of the Microelectronics Design Center (DZ) and a Researcher at ETH Zurich's Department of Information Technology and Electrical Engineering (D-ITET). He leads the PULP open-source hardware project and works closely with Prof. Luca Benini in the Integrated Systems Laboratory (IIS). His academic journey includes BSc/MSc from Istanbul Technical University and a PhD from ETH Zurich. Roles: Microelectronics Design Center Director, Senior Scientist in IIS, VLSI course lecturer Research focuses on energy-efficient digital circuits, cryptographic hardware security, and open-source processor architectures. Key projects include EU-funded initiatives like European Processor Initiative (EPI), Convolve, and NeuroSoC, along with SNSF grants Tiny Trainer and PEDESITE. Active in teaching VLSI design, embedded systems, and essential engineering skills. Publications emphasize secure cryptographic accelerators, low-power processor clusters, and GALS system design methodologies. Contributions include energy-efficient ASICs for IoT to HPC domains and pioneering work in side-channel attack-resistant hardware.

Giovanni Ansaloniمشاهده پروفایل

مدرس

• Embedded Systems
• Reconfigurable Computing
• Low-Power Design
• +۲ مورد دیگر

Dr Giovanni Ansaloni is Senior Scientist and Lecturer at EPFL's Embedded Systems Laboratory. His research focuses on energy-efficient computing architectures including reconfigurable systems, near-memory processing, and hardware accelerators for edge AI and biomedical applications. He develops frameworks for deploying machine learning models on resource-constrained devices, specializing in hardware-software co-design for embedded systems. Recent work explores RISC-V based accelerators, in-memory computing architectures, and optimization techniques for health monitoring applications. His teaching covers embedded systems design and applications, bridging theoretical concepts with practical implementation challenges in low-power computing platforms.