Dr.-Ing. Ralf Ramsauer is a postdoctoral researcher at the OTH Regensburg , affiliated with the Systems Architecture Research Group . His work focuses on Modern Operating System Architectures , Embedded Systems , and Mixed-Criticality System Design , with a particular interest in hardware/software co-design and real-time constraints. Academic Rank: Research Fellow Email: ralf.ramsauer@oth-regensburg.de Ramsauer's research explores Embedded Virtualisation , Hardware Partitioning , and Quantum-Classical Co-Design , often leveraging open-source development practices. His publications reveal trends in Database/OS Stack Optimization , Security Vulnerability Analysis , and Real-Time System Evaluation . Scientific Awards: 2013: Best Graduation Award in Computer Engineering, OTH Regensburg He has supervised numerous students across Bachelor's and Master's theses , including work on RISC-V Implementation , Linux Kernel Modules , and Hypervisor Optimization .
Dr.-Ing Victor van Santen is a Researcher at the Chair of AI Processor Design (AI-Pro) at the Technical University of Munich (TUM). He works in the Siemens Technology Center (Garching) and Munich Institute of Robotics and Machine Intelligence (MIRMI) facilities, focusing on hardware reliability and advanced computing technologies. His research integrates: Hardware reliability : Modeling aging/self-heating effects from transistors to full processors. Cryogenic CMOS : Developing circuits for quantum computing at ultra-low temperatures. ML-CAD fusion : Applying machine learning to predict circuit degradation and optimize designs. Design automation : Creating tools for cryogenic and reliability-aware circuit synthesis. His recent publications emphasize machine learning-driven reliability analysis, cryogenic memory design for quantum systems, and aging characterization in CMOS technologies. Work consistently bridges semiconductor physics, circuit design, and AI methodologies. He collaborates with Prof. Hussam Amrouch and contributes to projects on neuromorphic hardware, RISC-V for AI, and quantum-classical co-design.
Prof. Dr. Rolf Drechsler is a Full Professor at the University of Bremen since 2001 and Director of the Cyber-Physical Systems Group at DFKI Bremen since 2011. He leads the Computer Architecture working group in the Faculty of Mathematics and Computer Science and previously held adjunct/visiting roles at Duke University, IIT Kharagpur, and ISI Kolkata. Education: Diploma in Computer Science, Goethe University Frankfurt (1992) PhD (summa cum laude), Goethe University Frankfurt (1995) Habilitation, Albert-Ludwigs-University Freiburg (1999) His research focuses on formal verification , design automation , and data structures for circuit/system design , with applications in RISC-V processors , quantum computing , and in-memory computing . Recent studies explore LLM integration in hardware verification and polynomial methods for arithmetic circuits. Key awards include IEEE/ACM Best Paper Awards (ICCAD 2018, DATE 2025), the Berninghausen Prize (2018), IEEE Fellow (2015), and ACM Fellow. He co-founded the Graduate School "System Design" and led editorial roles at IEEE/ACM journals.
Konstantin Lübeck is a Researcher at the Chair of Embedded Systems, Department of Computer Science, University of Tübingen. He holds a B.Sc. and M.Sc. in Computer Science from the same institution (2015, 2018), with academic focus on computer engineering and embedded systems. He studied at Uppsala University in 2016 as an Erasmus student and received a Stiftung Industrieforschung scholarship for his Master's thesis in 2017. B.Sc. and M.Sc. from University of Tübingen Erasmus exchange student at Uppsala University (2016) Stiftung Industrieforschung scholarship recipient (2017) His research centers on machine learning accelerator performance modeling , combining computer architecture descriptions (from register-transfer to abstract diagrams) with DNN parameters for rapid design space exploration in neural network-hardware co-design. Key methodologies include analytical models for latency, throughput, and roofline analysis of AI accelerators. The 8 listed publications (2016-2025) reveal trends in: Neural network-hardware co-design Abstract architecture modeling Ultra-low power AI accelerators Performance representatives for benchmarking Formal hardware description languages AutoML for accelerator optimization Scientific contributions include Stiftung Industrieforschung scholarship (2017) He has lectured on computer architecture since 2018 for the Bosch Learning Company initiative at Tübingen's technology transfer center and supervised 12+ theses projects (4 completed) involving Pico-CNN frameworks, cache modeling, RISC-V implementations, and systolic array architectures.
Dr. Frank Hannig is a Professor at the Department of Computer Science, Friedrich Alexander University Erlangen-Nuremberg (FAU), Germany. He serves as the Head of the Architecture and Compiler Design Group within the Hardware-Software-Co-Design department (Department 12). With a career spanning over two decades at FAU since 2003, he has established himself as a leading researcher in hardware-software co-design, compiler design, and embedded systems. Dr. Hannig received his Diploma degree in Electrical Engineering/Computer Science from the University of Paderborn in 2000, followed by his Dr.-Ing. degree in Computer Science from FAU in 2009 with a thesis on "Scheduling Techniques for High-Throughput Loop Accelerators." He completed his habilitation (Dr.-Ing. habil.) in 2018 with a thesis titled "Domain-specific and Resource-aware Computing," which qualifies him for a full professorship in the German academic system. His research focuses on hardware-software co-design, compiler design for embedded systems, reconfigurable computing, parallel systems, and machine learning acceleration. Dr. Hannig has made significant contributions to domain-specific and resource-aware computing, with applications in image processing, automotive systems, and edge AI. His work bridges the gap between high-level programming models and efficient hardware implementations, particularly for resource-constrained environments. Dr. Hannig's recent publications reveal a strong trend toward efficient machine learning deployment on embedded devices and microcontrollers, with particular emphasis on memory optimization, hardware acceleration, and low-precision computing. His research spans multiple domains including computer architecture, machine learning, and embedded systems, with a focus on practical implementations for real-world applications. Dr. Hannig serves as an Associate Editor for IEEE Embedded Systems Letters and the Journal of Real-Time Image Processing. He has organized numerous prestigious conferences including SLOHA 2021, ARC 2021, and Euro-Par 2021, demonstrating his leadership in the academic community. As an educator, Dr. Hannig teaches courses on Domain-Specific and Resource-Aware Computing on Multicore Architectures, Parallel Systems, and Embedded Systems. He has supervised numerous students through lectures, exercises, and seminars covering electronic system level design and multi-core architectures. Dr. Hannig leads several significant research projects including InvasIC (DFG Transregional Collaborative Research Centre), ExaStencils (Advanced Stencil-Code Engineering), and HBS (DFG Research Training Group on Heterogeneous Image Systems). His work with the HIPAcc open-source project has contributed to domain-specific language and compiler development for image processing applications.
Dr. Lennart Bamberg is a Guest Lecturer at the Institute of Embedded Systems, Hamburg University of Technology (TUHH). His research focuses on computer architectures for embedded devices, efficient AI/ML on resource-constrained systems, RISC-V processor architectures, and reliable on-chip network designs. Research Interests: Computer Architectures, Edge-AI/TinyML, RISC-V, On-chip Networks Publications: Over 30 peer-reviewed papers and two monographs, including the Springer-published book '3D Interconnect Architectures for Heterogeneous Technologies'. He advises students within the Institute of Embedded Systems and maintains an active research profile via Google Scholar and ResearchGate. No specific grants or lab affiliations are detailed in the provided text.
Prof. Gerold Bausch is a faculty member at HTWK Leipzig within the Faculty of Engineering . He leads the Electronic Engineering Lab (EEL) and serves as Coordinator for International Relations and Examination Board Member at HTWK Leipzig. His research focuses on Embedded Systems , Machine Learning , and Digital Signal Processing . Specializes in low-power embedded systems with ARM and RISC-V architectures Supervises thesis projects in collaboration with institutions like Fraunhofer-Institut and Max-Planck-Institut Developed innovative measurement systems for infrastructure monitoring Recent research trends include machine learning on microcontrollers , energy-autonomous sensor applications , and low-power wide-area networks . He has received prestigious awards such as the Actemium-Förderpreis and VDI Bezirksverein Leipzig Förderpreis . His work bridges academic research with industry applications through partnerships with companies like Siemens AG and ANDAV Electronics GmbH. Scientific Awards: Actemium-Förderpreis für Angewandte Digitalisierung (1st Prize) VDI Bezirksverein Leipzig e.V. Förderpreis (1st Prize) He supervises numerous Bachelor's and Master's students , guiding projects in embedded systems, signal processing, and biomedical technologies. His research emphasizes practical solutions for industrial challenges and environmental monitoring.
Christophe Jégo is a researcher specializing in hardware/software co-design for communication systems, with affiliations suggesting connections to Université de Bordeaux's College of Engineering. His core expertise spans error-correction coding (LDPC, polar, turbo codes), FPGA/ASIC implementations, and high-performance computing architectures for telecommunications. Research interests focus on: Hardware acceleration of communication algorithms (LDPC/polar decoders, FFT processors) Multicore/GPU optimization for real-time signal processing RTL design automation tools and high-level synthesis frameworks 5G physical layer implementations including MIMO detection Resource-constrained embedded systems for IoT and space applications Publication analysis reveals strong emphasis on: FPGA implementations of communication blocks (67% of recent works) Parallel processing techniques for LDPC/polar decoding (2014-2025) Open-source tool development for hardware design (AFF3CT, Odatix) Cross-layer optimization from algorithms to silicon implementation
Prof. Hussam Amrouch is a Full Professor of AI Processor Design at the Technical University of Munich (TUM), leading the TUM School of Computation, Information and Technology. His research focuses on ultra-efficient embodied AI, reliable designs in emerging technologies, and cryogenic circuits for quantum computing. He holds a Dr.-Ing. from Karlsruhe Institute of Technology (2015, Summa cum Laude) and previously led the "Dependable Hardware" group at KIT and the Chair of Semiconductor Test and Reliability at University of Stuttgart. He is affiliated with Munich Quantum Valley (MQV) and Munich Institute of Robotics and Machine Intelligence (MIRMI). Research interests include ferroelectric FETs, in-memory computing, cryogenic electronics, and neuromorphic systems. Key achievements include 10× HiPEAC Paper Awards, 3× DAC/DATE best paper nominations, and pioneering work on FeFET-based AI accelerators. His work bridges nanoelectronics with AI, addressing challenges in energy efficiency, reliability, and quantum integration. Publications span cutting-edge topics like cryogenic FinFETs, hyperdimensional computing, and monolithic 3D integration. He has developed novel testing methodologies, self-aware silicon systems, and energy-efficient architectures for edge-AI. Current projects explore cryogenic circuit design, radiation-resistant FeFETs, and carbon-efficient 3D neural networks. His awards reflect contributions to high-performance and embedded architectures. Research groups under his leadership focus on device-level innovations and system-level integration of emerging technologies. He actively contributes to interdisciplinary initiatives at MQV and MIRMI, advancing quantum computing and AI hardware frontiers.
Eva Rodríguez is an Associate Professor in the Department of Network Engineering at Pompeu Fabra University's School of Engineering, specializing in cybersecurity, digital rights management, and IoT security. With over 50 publications since 2003, she has established herself as a leading researcher in secure network architectures and privacy-preserving technologies. Her research focuses on applying machine learning techniques to cybersecurity challenges, particularly in mobile and IoT environments. Rodríguez has published extensively on deep learning for intrusion detection, privacy protection mechanisms, and security frameworks for next-generation networks (5G/6G). She has also made significant contributions to RISC-V processor security through the Horizon Europe Vitamin-V project. Recent work shows a strong emphasis on federated learning approaches for privacy preservation in fog computing environments and the development of security management architectures for resilient wireless ecosystems. Her publication record demonstrates consistent leadership in both theoretical frameworks and practical implementations of security solutions. Among her notable contributions are comprehensive surveys on deep learning techniques for mobile network security and machine learning methods for IoT privacy protection, which have become important references in these rapidly evolving fields. As a research supervisor, she has mentored several doctoral students including Norma Gutiérrez and Beatriz Otero, who now appear as co-authors on her recent publications. Her collaborative work extends across multiple European research projects, demonstrating strong integration within the international cybersecurity research community.
Rolf Drechsler is a Full Professor and Head of the Group of Computer Architecture at the University of Bremen's Institute of Computer Science since 2001, and Director of the Cyber-Physical Systems Group at DFKI Bremen since 2011. He holds an adjunct professorship at the Indian Statistical Institute and has been affiliated with Duke University. Education: Diploma (1992) and Dr. phil. nat. (1995) in Computer Science from Goethe University Frankfurt Academic Leadership: Dean of Mathematics and Computer Science Faculty (2018-2025), Vice Rector for Research (2008-2013) His research focuses on formal verification , RISC-V architectures , and quantum/in-memory computing . Recent work explores LLM integration in hardware testing and polynomial-based verification techniques. Publications from 2024-2025 span IEEE Transactions , DATE , and DAC , emphasizing automated verification , quantum circuit mapping , and LLM-driven testbench generation . Scientific Awards IEEE/ACM Best Paper Awards (2013, 2018) Berninghausen-Preis for Innovative Teaching (2018) IEEE Fellow (2015) Founder Award for Solvertec (2013) He has served on program committees for DAC, ICCAD, DATE, and founded graduate schools in Embedded Systems and System Design under Germany's Excellence Initiative.
Dr. Johannes Pfau serves as a Scientific Assistant at the Institute for Information Processing Technology (ITIV) within Karlsruhe Institute of Technology (KIT), working in Prof. Becker's research group. His position combines postdoctoral research in advanced FPGA architectures with teaching responsibilities including System-on-Chip internships and academic advising for specialized engineering tracks. Education: Doctorate (Dissertation) in Electrical Engineering and Information Technology, Karlsruhe Institute of Technology, 2024 Research Interests: Pfau's work centers on reconfigurable computing with three interconnected pillars: (1) Next-generation FPGA architectures using emerging technologies like RFETs that require fundamental toolchain redesigns; (2) Digital beamforming systems for satellite Earth observation that replace analog processing with FPGA-based solutions to enable on-orbit data compression; and (3) High-throughput data acquisition systems for 6G prototyping handling multi-100Gbps streams through RFSoC platforms. His research bridges semiconductor physics, hardware architecture, and practical applications in communications and remote sensing. Publication Trends: Pfau's 15 most recent publications (2021-2024) reveal a strong focus on practical FPGA implementations addressing real-world constraints. His work increasingly integrates power management (7 papers), 6G infrastructure (5 papers), and novel semiconductor technologies (4 papers), with a clear trajectory toward hardware solutions for satellite communications and next-generation wireless systems. The research demonstrates consistent progression from architectural innovations (RFET, V-FPGAs) to applied systems (beamforming, 6G testbeds). Advising and Mentorship: Pfau maintains an active student supervision portfolio with documented guidance of 7+ Bachelor's and Master's theses since 2021. His projects emphasize hands-on hardware development, spanning power management techniques, beamforming filter design, and prosthetic control systems. The academic advising role for specializations 13 and 21 positions him at the intersection of computer science and electrical engineering education. Research Context: As a core member of Prof. Becker's group at ITIV, Pfau contributes to KIT's leadership in reconfigurable systems research. The group maintains strong industry connections through 6G initiatives and satellite technology development, with Pfau's work directly supporting German and European efforts in secure communications infrastructure and Earth observation systems.
