جست‌وجوی استاد و پژوهشگر

Jing Liمشاهده پروفایل

دانشیار

• Computer Architecture
• Compiler Design
• Distributed Systems
• +۷ مورد دیگر

Dr. Jing Li is an Associate Professor and Eduardo D. Glandt Faculty Fellow at the University of Pennsylvania , holding dual appointments in the Electrical and Systems Engineering and Computer and Information Science departments. As co-director of the CyberSavvy nationwide security research center and director of the Penn Computational Intelligence Lab (PennCIL) , she pioneers innovations in non-von Neumann computing paradigms. Her research spans post-CMOS technologies, in-memory computing, and hardware-software co-design for security and AI applications. PhD in Computer Engineering, Purdue University (2009) BSc in Electrical Engineering, Shanghai Jiaotong University (2004) Research Focus: Dr. Li's work addresses fundamental challenges in computer systems across the stack. Key areas include: In-Memory Computing: Liquid Silicon architecture combining RRAM with silicon CMOS through monolithic 3D integration Security Engineering: Transforming computer security from "Art" to formal "Engineering" discipline within CyberSavvy Virtualization: Cloud FPGA abstraction layers decoupling compilation from runtime resource management Graph Analytics: Degree-aware optimization techniques for massive-scale graph processing Deep Learning Systems: Roofline model extensions for FPGA-based CNN acceleration Scientific Impact: Awarded DARPA Young Faculty Award , NSF CAREER Award , and IBM CEO Milestone Award , her team has achieved world records in energy-efficient computing (ENIAD supercomputer). With 46 U.S. patents and over 80 publications, she leads ecosystem development for emerging computing architectures through initiatives like the open-source MEG simulation platform . Community Leadership: Dr. Li serves on program committees for flagship conferences ( ISCA , FPGA Symposium ), chairs the International Memory Workshop , and contributes to the MLsys conference's inaugural committee. She actively mentors through multiple PhD openings and industry collaborations.

Dimitris Gizopoulosمشاهده پروفایل

استاد

• Computer Architecture
• Computer Systems
• Fault Tolerance
• +۵ مورد دیگر

Prof. Dimitris Gizopoulos is a Professor at the Department of Informatics & Telecommunications, University of Athens, leading the Computer Architecture Laboratory. His research focuses on fault tolerance, design validation, performance, and energy efficiency in microprocessors, GPUs, and AI accelerators. He is an IEEE Fellow (2013) and ACM Distinguished Member (2022). His work is supported by Horizon Europe projects like DARE, Neuropuls, and Vitamin-V, alongside industry grants from AMD, Cisco, and Meta. He participates in networks like HiPEAC and Eurolab4HPC and serves on editorial boards of journals including ACM Computing Surveys and IEEE Transactions on Computers . Prof. Gizopoulos teaches Computer Architecture courses at both undergraduate and graduate levels. His research spans cross-layer reliability analysis, voltage scaling effects, and secure hardware design. Notable contributions include frameworks for GPU reliability assessment (GUFI, GPUI-4) and tools like MerLIN for microarchitecture-level analysis. His lab’s work has been funded by the EuroHPC Joint Undertaking and the Greek-China Research Collaboration program. Key Projects: DARE (RISC-V Europe), Neuropuls (neuromorphic accelerators), Vitamin-V (RISC-V cloud environments). Awards: IEEE Fellow (2013), ACM Distinguished Member (2022), IEEE Golden Core (since 2002). Industry Partnerships: AMD, Cisco, Bosch, NVIDIA, Intel, IBM Research. Labs: Leads the Computer Architecture Lab, focusing on fault tolerance and energy-efficient computing. His work emphasizes bridging hardware-software co-design challenges, with publications in top venues like IEEE Transactions on Computers and ACM Computing Surveys . Recent efforts include analyzing silent data corruptions (SDCs) in CPUs and GPUs, and developing validation frameworks for cloud-native architectures.

Austin Rovinskiمشاهده پروفایل

استادیار

• Computer Architecture
• VLSI
• Electronic Design Automation (EDA)
• +۵ مورد دیگر

Austin Rovinski is an Assistant Professor in the Department of Electrical and Computer Engineering at New York University’s Tandon School of Engineering. He specializes in chip design, electronic design automation (EDA), and open-source hardware methodologies. His research focuses on VLSI design, domain-specific accelerators, and chiplet-based systems. Prior to NYU, he held a postdoctoral position at Cornell University and earned all his degrees (Ph.D., M.S., and B.S.) from the University of Michigan. Education: Ph.D., Electrical Engineering, University of Michigan - Ann Arbor Master’s, Electrical Engineering, University of Michigan - Ann Arbor Bachelor’s, Electrical Engineering, University of Michigan - Ann Arbor Research Focus: Developing open-source EDA frameworks like OpenROAD Optoelectronic interconnect systems for 2.5D packaging Agile hardware design methodologies Reconfigurable sparse matrix accelerators RISC-V-based manycore processors (e.g., Celerity project) Key Contributions: Austin led the development of the OpenROAD RTL-to-GDS flow and contributed to the Sirius and Celerity projects. His work emphasizes reproducibility, democratizing chip design through open-source tools. Awards: IEEE Micro Top Picks (2015) Michigan EECS Outstanding Research Award (2016) NSF Graduate Research Fellowship Honorable Mention (2017, 2018) Advising & Grants: Actively mentors graduate students in chip design and EDA. His research is supported by NYU’s Tandon School of Engineering and collaborations with industry partners. Labs & Teams: Core contributor to the OpenROAD project, part of NYU’s hardware design and EDA initiatives, and collaborator on the Celerity manycore processor project.

• Digital Hardware Design
• Reliability Engineering
• Reconfigurable Devices
• +۳ مورد دیگر

Eleonora Vacca is a PhD student and Research Fellow in the Department of Automatic Control and Computer Science (DAUIN) at the Polytechnic University of Turin. She holds a B.S. in Electronic Engineering from the University of Palermo (2018) and an M.S. in Electronic Engineering-Embedded Systems from Politecnico di Torino (2021). Her research focuses on digital hardware design, reliability engineering, reconfigurable devices, and AI applications in aerospace and safety-critical systems. She is a member of the Aerospace and Safety Computing Lab and the CAD - Electronic CAD & Reliability Group (DAUIN). Her work addresses challenges such as radiation effects mitigation in space missions, fault-tolerant AI accelerators, and real-time anomaly detection in satellite telemetry. She has contributed to projects like the RAMSES CubeSat-1 Development (2025-2026), funded by commercial contracts. In 2024, she won the Best Student Paper Award at the NEWCAS Conference for her research on radiation effects in space missions. Vacca collaborates on teaching, including assisting in the course 'Electronic Calculators' for Computer Engineering students. Her recent publications explore AI resilience in RISC-V ecosystems, radiation environment analysis for space missions, and gesture recognition systems for smart cities. She actively contributes to conferences such as the ACM International Conference on Computing Frontiers and the IEEE International Smart Cities Conference.

• Channel decoders
• Circuits for communications
• Cryptography
• +۸ مورد دیگر

Guido Masera is a Full Professor at the Department of Electronics and Telecommunications (DET) at the Polytechnic University of Turin, where he has been actively involved in teaching and research for over two decades. He serves as a Member of the Board of Directors, Member of the GEDI Observatory for Gender Equality, Diversity and Inclusion, and Member of the Permanent University Observatory for monitoring the academic supply chain. His research interests span across channel decoders, circuits for communications, cryptography, deep learning, digital integrated circuits, field programmable gate arrays (FPGA), and hardware design. His work focuses on VLSI architectures for image and video coding, digital architectures for error correcting codes, application specific approximate computing, VLSI architectures for machine learning, digital architectures for bio-inspired processing, digital architectures for post-quantum cryptography, bio-inspired electronics for robotics and biomedical applications, RISC-V extensions and hardware accelerators, and circuit architectures for efficient machine learning and artificial intelligence. His recent publications (2025) demonstrate a strong focus on RISC-V architecture, particularly in the context of cryptographic implementations, hardware security, and post-quantum cryptography. His research group VLSILAB is actively engaged in cutting-edge research in hardware security, efficient processor design, and specialized computing architectures. Among his notable recognitions are the Premio Francesco Carassa awarded by the Telecommunications and Information Technologies Group Association (gtti) in 2010, and his recognition as a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) since 2007. He also serves as an Associate Editor for several prestigious journals including ELECTRONICS (2019-present), IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS (2015-2019), and IET CIRCUITS, DEVICES & SYSTEMS (2013-2016). Professor Masera has advised numerous PhD students working on advanced topics in VLSI design, post-quantum cryptography, hardware accelerators, and machine learning implementations. His current research projects include ISOLDE (2023-2026) and TRISTAN (2022-2025), both EU-funded projects focused on RISC-V technology and domain-specific ecosystems. He leads the VLSILAB research group at the Department of Electronics and Telecommunications, which focuses on cutting-edge research in VLSI architectures, hardware security, and specialized computing systems. The group collaborates with industry partners and participates in major European research initiatives.

Daniel Müller-Gritschnederمشاهده پروفایل

استاد مدعو

• TinyML
• Embedded Software Development
• Soft Error Resilience
• +۴ مورد دیگر

Daniel Müller-Gritschneder is an Adjunct Teaching Professor (Privatdozent) at the Technical University of Munich (TUM), affiliated with the Chair of Electronic Design Automation. He leads the 'Electronic System Level' research group, focusing on embedded systems, TinyML, virtual prototyping, and hardware resilience. He temporarily served as head of the Chair of Real-Time Systems (2019–2020) and holds a senior membership in IEEE. His research spans: TinyML : Optimizing neural network inference for microcontrollers. Virtual Prototyping : Fast simulation for embedded software development (e.g., ETISS simulator). Runtime Verification : Hardware monitoring for safety-critical systems. Fault Tolerance : Cross-layer resilience against soft errors. Design Automation : NoC synthesis and RISC-V toolchain optimization. His publications emphasize RISC-V-based systems, TinyML deployment, fault injection, and embedded AI. Recent works show trends toward compiler-assisted security, thermal management, and automated design-space exploration for edge devices. Awards: Best Paper Award (SiPS 2019) Habilitation Award (Bund der Freunde der TUM, 2019) 2nd Best Paper (SMACD'15) Best Paper nominations at DAC'07, DATE'10, Analog'10, NOCS'13 He advises researchers in the Electronic System Level group and contributes to EU projects (e.g., Scale4Edge). His lab develops tools like ETISS, MLonMCU, and Seal5 for RISC-V and TinyML ecosystems.

• FPGA Design
• VLSI Systems
• Logic Synthesis
• +۷ مورد دیگر

Pierre-Emmanuel Gaillardon is a Professor in the Department of Electrical & Computer Engineering and Adjunct Professor in the School of Computing at the University of Utah. He holds a joint appointment since July 2024, having previously served as Assistant Professor (2016–2019) and Adjunct Assistant Professor in Computing (2016–2019). His research focuses on FPGA design, VLSI systems, nanoelectronics, and hardware security. He leads projects in emerging devices like TIGFETs, compute-in-memory architectures, and radiation-hardened FPGA fabrics. Teaching includes courses on Digital VLSI Design, Embedded Systems Design, and thesis supervision. He has secured grants from NSF, DARPA, and industry partners totaling over $10M, addressing topics like FPGA redaction, neuromorphic systems, and environmental sensors. Notable awards include the NSF CAREER Award (2018) and IEEE Senior Member elevation (2016). He actively serves on IEEE committees for nanoelectronics and EDA tools, contributing to standards like OpenFPGA.

• Reliable and Fault-Tolerant Computing
• RISC-V Architecture
• FPGA-Based Systems
• +۱۲ مورد دیگر

Sarah Azimi is a fixed-term researcher at the Department of Control and Computer Science (DAUIN) within the College of Computer, Film and Mechatronics Engineering at Politecnico di Torino. She actively contributes to research and teaching in the domains of reliable computing, reconfigurable systems, and AI applications for space and smart city security. Research Interests: Reliability and fault tolerance in safety-critical and space systems RISC-V and FPGA-based architectures High-performance computing (HPC) and reconfigurable computing AI resilience and real-time gesture recognition for public safety Radiation effects and hardening techniques for aerospace applications Publication Trends: Her recent publications focus on RISC-V reliability, radiation effects in space missions, AI resilience in reconfigurable platforms, and smart city security through gesture recognition. Her work spans both journal and conference venues, emphasizing practical and mission-tailored solutions in embedded and aerospace computing. Scientific Awards: No awards explicitly mentioned in the provided text. Advising and Grants: Sarah Azimi supervises multiple PhD students including Federico Buccellato, Aobo Cui, and Giorgio Cora. She leads the competitive research project Safe Smart City: Detecting Violence and Requests for Help in Real Time Through Video Surveillance Devices (2024). She is also a member of the RAMSES CubeSat-1 Development project (2025–2026) and led the commercial research project on the Rempro fault-tolerant processor (2022–2023). Labs and Teams: She is a key member of the CAD - Electronic CAD & Reliability Group (DAUIN) at Politecnico di Torino, contributing to cutting-edge research in electronic design automation and system reliability for aerospace and terrestrial applications.

• Embedded Systems
• Compilers
• Hardware-Software Co-Design
• +۵ مورد دیگر

Prof. Dr. rer. nat. Rainer Leupers is a faculty member at RWTH Aachen University, chairing the Department of Software for Systems on Silicon. His research focuses on embedded systems, hardware-software co-design, virtual prototyping, and security in computing-in-memory architectures. He has published extensively on RRAM accelerators, logic locking, and neuromorphic security. Chair of Software for Systems on Silicon Research in hardware security and deep learning accelerators Recent publications on cross-tool virtual frameworks and thermal side-channel attacks His work bridges system-level modeling with practical security implementations, emphasizing reliability and performance in heterogeneous computing environments. Key trends in his 2025-2023 articles include compute-in-memory optimization, neural network inference efficiency, and security vulnerabilities in emerging hardware. Awards and formal recognitions are not explicitly detailed in the provided materials. He has not directly mentioned advising students or research grants in the given text fragments. The chair's contact information includes an office at ICT Cube 1, Electrical Engineering, Aachen, with direct email and website links.

• Electronic Design Automation (EDA)
• Computer Architecture
• Embedded Systems
• +۵ مورد دیگر

Prof. Wolfgang Ecker is a Professor at the Technical University of Munich (TUM), affiliated with the Chair of Design Automation within the TUM School of Computation, Information and Technology . His research focuses on Electronic Design Automation (EDA), RISC-V processor architectures, and hardware-software co-design. He leads projects advancing EDA tools for embedded systems, neural network acceleration, and formal verification methodologies. Ecker's work bridges machine learning techniques with traditional EDA challenges, addressing topics like energy-efficient AI inference and automated documentation generation. His contributions span compiler optimization, FPGA implementations, and fault analysis in digital systems. Recent research highlights include contributions to the TRISTAN project for RISC-V ecosystem development, model-driven architecture frameworks, and AI-driven timing analysis. He actively collaborates on open-source EDA tools and explores Rust-based embedded systems development. Ecker’s lab emphasizes practical applications in edge computing and automotive microcontroller safety, with a strong emphasis on interdisciplinary collaboration across TUM’s CIT School. His publications (15 most recent listed) reflect a focus on EDA tool innovation, processor design, and leveraging machine learning for hardware optimization. While no specific awards are mentioned, his involvement in ERC-funded projects and leadership in international collaborations underscores his academic impact.

• Computer Architecture
• Hardware Design
• Signal Processing
• +۷ مورد دیگر

Prof. Dr.-Ing. Holger Blume serves as Vice President for Research and Transfer at Leibniz University Hannover while maintaining his academic position as Professor in the Architectures and Systems Section within the Faculty of Electrical Engineering and Computer Science. He holds multiple leadership positions including Chairperson of the Research Commission and Central Ethics Committee, Executive Board member of eNIFE (Leibniz Research Initiative for Neurosciences), and membership in both the Laboratory of Nano and Quantum Engineering and L3S Research Centre. His research interests span computer architecture, hardware design, signal processing, AI accelerators, hearing aid technology, and biomedical engineering. His work bridges theoretical computer science with practical applications in automotive systems, medical devices, and quantum engineering. Professor Blume's research demonstrates strong interdisciplinary connections between electrical engineering, computer science, and biomedical applications, with particular emphasis on hardware-oriented solutions for real-world problems. Analysis of his recent publications (2023-2025) reveals a strong focus on hardware acceleration for AI and signal processing applications, particularly in automotive radar/LiDAR systems and hearing aid technology. His work shows consistent innovation in RISC-V processor design, specialized hardware for mathematical functions, and biomedical applications of engineering principles. The research demonstrates a clear trajectory toward energy-efficient, specialized computing architectures for specific application domains. As Vice President for Research and Transfer, Professor Blume oversees significant research initiatives at Leibniz University Hannover, which hosts multiple Clusters of Excellence including PhoenixD (Photonics, Optics, and Engineering), QuantumFrontiers, and Hearing4all. The university participates in numerous collaborative research centers and junior research groups funded by DFG, BMBF, and EU programs. Professor Blume is actively involved in multiple research facilities including the Laboratory of Nano and Quantum Engineering and the L3S Research Centre. His work connects with Leibniz University's research focuses on optical technologies, quantum optics and gravitational physics, and biomedical research and technology. His leadership positions indicate strong involvement in shaping the research strategy and ethical framework of the university's scientific endeavors.

• Internet of Things
• Open Source Software
• Program Comprehension
• +۶ مورد دیگر

Simon Butler is a Senior Lecturer in the Department of Information Technology at the University of Skövde's School of Informatics. He is an active member of the Distributed Real-Time Systems research group and contributes significantly to undergraduate computer science education. His academic work bridges theoretical research with practical industry applications in software development. Butler's research interests center on the challenges software developers face in creating and maintaining software systems, with particular focus on program comprehension, software maintenance, and the socio-technical and educational aspects of software development in hybrid environments where open source and proprietary solutions coexist. His work addresses critical issues in Internet of Things (IoT) systems and the practical implementation of open source software solutions in industrial contexts. His publication record from 2018-2023 reveals a strong research trajectory focused on open source software adoption, interoperability challenges, and standardization processes. His work spans diverse venues including Software Quality Journal, Journal of Systems and Software, IEEE Transactions on Software Engineering, and OpenSym proceedings, demonstrating both academic rigor and practical relevance to industry challenges. Butler is actively involved in several significant research projects including SUDO (2020-2024) addressing lock-in effects in IT systems, OSSD (2021-2023) developing educational programs for sustainable digitalization, and LIM-IT (2016-2020) investigating interoperability and long-term maintenance challenges. His teaching portfolio includes core computer science subjects such as Operating Systems, Object Oriented Programming, Algorithms and Data Structures, and Distributed Systems. As a member of the Distributed Real-Time Systems research group, Butler collaborates with industry partners to address real-world challenges in software development practices, particularly focusing on how organizations can effectively integrate open source solutions while avoiding problematic lock-in effects that compromise long-term system sustainability.

Sebastien Pillementمشاهده پروفایل

مدرس

• Computer Engineering
• Embedded Systems
• Computer Architecture
• +۳ مورد دیگر

Sébastien Pillement is a Lecturer at Polytech'Nantes, the College of Engineering of the University of Nantes, and a member of the ASIC research team within the IETR UMR 6164 laboratory. His career spans over 13 years at the IUT of Lannion (University of Rennes 1) before joining the University of Nantes in 2012. He holds a PhD in Computer Science from the University of Montpellier II (1998) and a Habilitation à Diriger des Recherches (HDR) from the University of Rennes 1 (2010). Current Research Focus: Dynamically Reconfigurable Architectures (DRA), Hardware Security, Fault-Tolerant Embedded Systems, NoC (Network-on-Chip), Design Methodologies. Teaching Areas: Digital Circuits, Computer Architecture, Operating Systems, Real-Time Systems, and Algorithms for Embedded Computing. His research explores flexible and efficient architectures for embedded systems, emphasizing real-time management, reliability, and security. Key article trends include RISC-V processors, neural network acceleration on MPSoC, formal verification of arithmetic circuits, and runtime FPGA scheduling. Collaborations span international institutions like the University of Toronto and CEA, as well as industrial partners such as STMicroelectronics and Thales. PhD Students : Current: Laureline Dubucq (Security & AI), Mustafa Ibrahim (Ultra-Low Power AI), Téo Biton (Runtime Anomaly Detection), Mohamed Amine Zhiri (Adaptive NoC), Juliette Pottier (RISC-V Protection). Graduates: Quentin Dariol (Neural Network Timing), Alexis Duhamel (FPGA Scheduling), Safouane Noubir (Security in Multi-Core Systems), Hai Dang Vu (Probabilistic Timing Analysis), David Pallier (Sensor Clock Synchronization). Projects : Current: ADAPTING (2023-2029), FITNESS (2023-2027), SEC-V (2022-2025), NOP (2021-2025). Past: SPARTE (2015-2018), ARDyT (2011-2015), FosFor (2008-2011).

• Computer Architecture
• Embedded Systems
• High-Performance Computing
• +۹ مورد دیگر

Zapater Sancho Marina is an Associate Professor at the ReDS Institute (Institute of Reconfigurable and Embedded Digital Systems) within the School of Engineering and Management Vaud (HEIG-VD), part of the University of Applied Sciences and Arts Western Switzerland (HES-SO). She holds dual master's degrees in Electronic and Telecommunication Engineering from Universitat Politècnica de Catalunya (2010) and a PhD in Computer Science from Universidad Politécnica de Madrid (2015). Her career includes postdoctoral work at EPFL (2016-2020) and assistant professorship at Universidad Complutense de Madrid (2015-2016). Education BSc & MSc in Electronic Engineering (UPC 2010) PhD in Computer Science (UPM 2015) Research Focus spans cross-layer optimization of heterogeneous architectures for performance and energy efficiency, with emphasis on: Embedded systems (IoT/edge computing) High-performance compute architectures Analog in-memory computing for AI Thermal/power management in 3D chips Cloud-edge AI workload orchestration Publication Trends show expertise in RISC-V simulation frameworks, analog computing tiles for CNNs, virtual memory redesign, and AI-driven cloud performance prediction. Her recent work explores thermal-aware 3D chip management, hybrid-cache reliability optimization, and open-source teaching platforms for radio theory. Awards include a Spanish government PhD fellowship. She has led 4 European H2020 projects since 2016 and currently serves as PI for 4 industrial collaborations (Facebook/Intel/Huawei), Innosuisse projects, and HES-SO initiatives. Labs & Teams include the ReDS Institute, EPFL's Embedded Systems Laboratory, and collaborations with Yale/Edinburgh. She co-developed the ALPINE simulation framework and SO3 operating system modifications for Midgard project validation.

• Artificial Intelligence
• Neuromorphic Computing
• Brain-inspired Computing
• +۱۳ مورد دیگر

Vittorio Fra is a Fixed-term Assistant Professor at the Interuniversity Department of Regional and Urban Studies and Planning (DIST) at Politecnico di Torino, where he conducts research in artificial intelligence, neuromorphic computing, edge computing, and robotics. He is a member of the PIC4SeR Interdepartmental Center for Service Robotics and contributes to interdisciplinary research bridging engineering, nanotechnology, and smart urban systems. His research interests center on AI and neuromorphic computing for industrial and IoT applications , with strong emphasis on brain-inspired computing, memristive devices, and nanoscale technologies. His work spans from low-level hardware characterization to high-level algorithm design, integrating machine learning, bio-inspired computing, and scientific simulation. He actively explores neuromorphic solutions for real-world edge applications such as human activity recognition, smart traffic control, and assistive technologies like Braille readers. The trend across his recent publications (2022–2025) reveals a consistent focus on deploying spiking neural networks and neuromorphic architectures on commercial edge devices, optimizing neural execution, developing benchmarking tools (e.g., NeuroBench, WiN-GUI), and validating neuromorphic solutions on practical problems like Sudoku and the knapsack problem. His work bridges theoretical AI with applied engineering, targeting sustainability and innovation in infrastructure and urban communities. Scientific Awards: No scientific awards explicitly mentioned in the text. Advising and Grants: Vittorio Fra supervises Filippo Aisa , a PhD candidate in Electrical, Electronic, and Communications Engineering. He leads a commercially funded research project titled Supporto allo sviluppo di un smart digital water distributor monitoring system (2025–2026) , serving as the Scientific Responsible. His teaching roles include PhD instruction, course collaboration, and invited membership in academic councils across engineering and planning programs. Labs and Research Teams: He is a member of the PoliTO Interdepartmental Centre for Service Robotics (PIC4SeR) , a multidisciplinary research center focused on robotics for societal applications. His collaborations span multiple institutions and projects, involving teams working on neuromorphic ecosystems (e.g., Lava-Loihi), wireless sensor networks, and brain-inspired computing frameworks.