Prof. Tim Güneysu is a full Professor and Head of the Security Engineering department at the Faculty of Computer Science, Ruhr-Universität Bochum. He serves as Vice Dean for Strategy and Finances (since 2023) and previously as Speaker of the Horst-Görtz Institute for IT-Security (2020-2023). His academic journey includes roles as Associate Professor at the University of Bremen (2015-2017) and Assistant Professor at Ruhr-Universität Bochum (2011-2015). He also holds positions at the German Research Center for Artificial Intelligence (DFKI) and has conducted postdoctoral research at UMass Amherst. His research focuses on Security-by-Design principles, CAD for Security, and countermeasures against physical attacks. He emphasizes efficient cryptographic implementations and system-level hardware security. Key areas include post-quantum cryptography, side-channel resistant designs, and secure embedded systems. He has contributed over 200 publications in top venues, with recent work on FPGA-based cryptographic accelerators, secure hardware extensions (e.g., KeyVisor), and post-quantum algorithms for IoT. His research themes include agile signature acceleration, fault attack mitigation, and hardware-software co-design for security. Notable projects include CONVOLVE (edge-AI security) and QuantumRISC (quantum-safe systems). His work bridges theoretical cryptography with practical hardware implementations, emphasizing real-world security applications.
Daniel Müller-Gritschneder is an Adjunct Teaching Professor (Privatdozent) at the Technical University of Munich (TUM), affiliated with the Chair of Electronic Design Automation. He leads the 'Electronic System Level' research group, focusing on embedded systems, TinyML, virtual prototyping, and hardware resilience. He temporarily served as head of the Chair of Real-Time Systems (2019–2020) and holds a senior membership in IEEE. His research spans: TinyML : Optimizing neural network inference for microcontrollers. Virtual Prototyping : Fast simulation for embedded software development (e.g., ETISS simulator). Runtime Verification : Hardware monitoring for safety-critical systems. Fault Tolerance : Cross-layer resilience against soft errors. Design Automation : NoC synthesis and RISC-V toolchain optimization. His publications emphasize RISC-V-based systems, TinyML deployment, fault injection, and embedded AI. Recent works show trends toward compiler-assisted security, thermal management, and automated design-space exploration for edge devices. Awards: Best Paper Award (SiPS 2019) Habilitation Award (Bund der Freunde der TUM, 2019) 2nd Best Paper (SMACD'15) Best Paper nominations at DAC'07, DATE'10, Analog'10, NOCS'13 He advises researchers in the Electronic System Level group and contributes to EU projects (e.g., Scale4Edge). His lab develops tools like ETISS, MLonMCU, and Seal5 for RISC-V and TinyML ecosystems.
Prof. Dr.-Ing. Marc Reichenbach serves as the Chair of Integrated Systems at the Institute for Applied Microelectronics and Data Technology at the University of Rostock. His office is located at Albert-Einstein-Straße 26, 18059 Rostock, Room 102 (1st floor), with contact information including telephone (0381) 498 7270 and email marc.reichenbach@uni-rostock.de. Professor Reichenbach's research focuses on the intersection of hardware design and artificial intelligence, with particular expertise in memory technologies and computing architectures. His work spans several key areas: Development of specialized computer architectures for deep learning applications Advanced VLSI design and CPU architecture Emerging memory technologies, particularly RRAM (Resistive Random-Access Memory) FPGA-based acceleration systems Hardware implementations for neural networks and AI applications Analysis of Professor Reichenbach's recent publications (2023-2025) reveals a strong focus on memory computing technologies, particularly RRAM-based systems. His work demonstrates expertise across multiple dimensions of computer architecture including ASIC design, FPGA acceleration, and novel memory systems. The publications show a clear trajectory toward implementing AI and machine learning capabilities directly in hardware, with applications ranging from edge computing to satellite systems. A significant portion of his recent work addresses the challenges of implementing neural networks using emerging memory technologies, focusing on efficiency, reliability, and performance optimization. Professor Reichenbach teaches several advanced courses including: Computer architectures for deep learning applications Project seminar Embedded Systems Advanced VLSI Design (Advanced CPU Design) His research group appears to be actively engaged in several cutting-edge projects related to hardware acceleration for AI applications, memory computing, and embedded systems design. The group collaborates on projects involving digital twins for hardware systems, real-time operating systems for heterogeneous architectures, and specialized computing systems for various applications from medical devices to drone technology.
Prof. Dr. rer. nat. Rainer Leupers is a faculty member at RWTH Aachen University, chairing the Department of Software for Systems on Silicon. His research focuses on embedded systems, hardware-software co-design, virtual prototyping, and security in computing-in-memory architectures. He has published extensively on RRAM accelerators, logic locking, and neuromorphic security. Chair of Software for Systems on Silicon Research in hardware security and deep learning accelerators Recent publications on cross-tool virtual frameworks and thermal side-channel attacks His work bridges system-level modeling with practical security implementations, emphasizing reliability and performance in heterogeneous computing environments. Key trends in his 2025-2023 articles include compute-in-memory optimization, neural network inference efficiency, and security vulnerabilities in emerging hardware. Awards and formal recognitions are not explicitly detailed in the provided materials. He has not directly mentioned advising students or research grants in the given text fragments. The chair's contact information includes an office at ICT Cube 1, Electrical Engineering, Aachen, with direct email and website links.
Pascal Sasdrich is a Researcher at Ruhr University Bochum, Germany, affiliated with the Faculty of Computer Science and the Security Engineering department. He holds a PhD in IT-Security/Information Technology from the same university (2018), following M.Sc. (2015) and B.Sc. (2012) degrees in the same field. His research focuses on Hardware Security, Secure Processor Design, Computer-Aided Security, and Security by Design. He has extensive experience in cryptographic hardware implementations, including countermeasures against side-channel and fault attacks. Teaching includes courses on Processor Security and Implementation of Cryptographic Schemes. His work bridges theoretical security models with practical hardware implementations, emphasizing automated tools and formal verification for secure embedded systems. Key projects include contributions to Project HEP (open-source hardware security chip design) and development of methodologies like EASIMASK for automated masking in hardware. Publications span cryptographic hardware implementations, fault and side-channel countermeasures, and formal security verification. Notable works include combined threshold implementations, secure processor extensions, and automated generation of masked hardware circuits. Current research emphasizes securing embedded systems through holistic design approaches, including ISA extensions and automated EDA tools.
Nele Mentens is a full professor at both KU Leuven and Leiden University, where she leads cutting-edge research in applied cryptography, hardware security, and secure embedded systems. At KU Leuven, she is affiliated with the Faculty of Engineering Technology and the Electrical Engineering Department (ESAT), leading the Emerging Technologies, Systems & Security (ES&S) research group at the Diepenbeek campus. Simultaneously, she holds a full professorship at Leiden University’s Leiden Institute of Advanced Computer Science (LIACS), focusing on applied cryptography and security. She has been instrumental in numerous national and international research initiatives, including Horizon Europe and NWO-funded projects. Full Professor, KU Leuven (since 2023) Full Professor, Leiden University (since 2020) Associate Professor, KU Leuven (2014–2023) Post-doctoral Researcher & Lecturer, KHLim / KU Leuven (2007–2014) Ph.D. in Engineering Science, KU Leuven (2007) M.Sc. in Electrical Engineering, KU Leuven (2003) Her research focuses on secure and efficient hardware design, particularly for cryptographic applications on FPGAs, reconfigurable architectures, IoT security, and neuromorphic computing. She explores physical attack resistance, side-channel analysis protection, and trusted computing architectures, with applications in healthcare, industrial monitoring, and endpoint AI. Her work bridges theoretical cryptography with practical hardware implementations, emphasizing energy efficiency and real-time performance. The 15 most recent publications reflect a strong trend toward secure, energy-efficient, and intelligent embedded systems. Topics include neuromorphic AI accelerators, trusted IoT architectures, dynamic reconfiguration for side-channel protection, and secure medical data processing. These works span disciplines such as computer architecture, cybersecurity, digital design, and embedded systems, with a focus on hardware-software co-design and real-world deployment. Nele Mentens has received recognition for her contributions, including: Best Paper Award, DATE'16 Best Paper Nomination, AsianHOST'17 Best Paper Award, CHES'19 She has supervised over 15 Ph.D. students and post-docs, both current and former, and has served as principal investigator in approximately 25 funded research projects. Her work has attracted significant grants from Horizon Europe, NWO, FWO, and national innovation programs. She actively contributes to the academic community through editorial roles in top journals and leadership in major conferences. Nele Mentens leads the ES&S research group at KU Leuven and collaborates closely with LIACS at Leiden University. Her team includes Ph.D. students, post-docs, and research experts working on projects like NimbleAI, NeuroSoC, and TrustedIoT. She has also established secure electronics labs through infrastructure grants and maintains strong international ties with institutions such as EPFL, Ruhr University Bochum, and ETH Zurich.
Heiner Giefers is a Professor for Cloud Computing at the Department of Computer Science and Natural Sciences at Southwestphalia University of Applied Sciences since 2018. Prior to this position, he worked as a Research Staff Member at IBM Research - Zürich (2013-2018), focusing on hardware acceleration in cloud environments, implementation of big data algorithms on FPGAs, and development of hardware platforms for approximate and in-memory computing. Dr. Giefers received his doctorate (Dr. rer. nat.) from Universität Paderborn in 2012 with a dissertation titled "Design and Programming of Reconfigurable Mesh based Many-Cores." His academic journey at Universität Paderborn includes serving as an Academic Council Member (Akademischer Rat a.Z.) from 2008-2013 and as a Scientific Staff Member from 2006-2012, where he taught digital technology and computer architecture. Professor Giefers' research focuses on energy-efficient computing, particularly through hardware acceleration using FPGAs for cloud and AI workloads. His work spans cloud computing infrastructure, hardware-software co-design, approximate computing, in-memory computing, and energy-efficient implementations of machine learning algorithms. He has made significant contributions to the field of reconfigurable hardware for high-performance computing applications. His recent publications show a strong trend toward applying hardware acceleration techniques to artificial intelligence and machine learning workloads, with a particular focus on energy efficiency. His work bridges the gap between theoretical computer science and practical hardware implementation, often resulting in patented technologies that address real-world computing challenges in cloud environments. Best Paper Award for "Stochastic Matrix-Function Estimators: Scalable Big-Data Kernels with High Performance" (2016) Best Paper Award Nomination for "Energy-Efficient Stochastic Matrix Function Estimator for Graph Analytics on FPGA" (2016) Best Paper Award Nomination for "Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system" (2014) Best Paper Award Nomination for "A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier" (2010) Professor Giefers actively supervises numerous Bachelor's and Master's students, with over 50 completed theses covering topics from machine learning and cloud computing to IoT systems and hardware acceleration. He leads the "Energy-efficient AI" project (eki), which aims to increase the energy efficiency of AI systems through approximation techniques for FPGA implementation. Additionally, he collaborates with Prof. Dr. Christian Plessl on the "Digital teaching materials with Jupyter Notebooks" project, creating interactive learning materials that integrate teaching content, program code, and results into a single document. His work extends to practical applications through multiple patents related to FPGA implementations, neural networks, and memory systems, demonstrating his commitment to translating research into real-world solutions.
Prof. Dr. Andreas Herkersdorf is a Full Professor and Chair of Integrated Systems at the Technical University of Munich (TUM) School of Computation, Information and Technology. His research focuses on application-specific multicore processors (MPSoC), FPGA-based prototyping, fault-tolerant systems, and energy-efficient architectures, with applications in IP packet processing, automotive systems, and visual computing. He has received multiple IBM innovation awards and serves on editorial boards including the DFG Review Board for computer architecture. Education: Dipl.-Ing. Electrical Engineering (TUM, 1987), Dr. techn. Electrical Engineering (ETH Zurich, 1991) Research: MPSoC architectures, autonomic computing, NoC resilience, FPGA acceleration, and self-optimizing systems. Awards: IBM Master Inventor (1998), IBM Outstanding Technical Achievement Award (2001), multiple IBM Innovation Achievement Awards (1996-2003) His recent publications emphasize hardware/software co-design, machine learning integration for runtime optimization, and network-on-chip innovations. He collaborates on projects involving 6G systems, smartNICs, and automotive communication protocols.
Albi Mema is a researcher affiliated with the Chair of AI Processor Design (AI-Pro) at Technische Universität München (TUM). His work focuses on emerging technologies for AI applications, including neuromorphic hardware, reliability engineering, and quantum computing. University: Technische Universität München Department: Chair of AI Processor Design (AI-Pro) Key research areas include: Emerging Technologies for AI Neuromorphic Hardware Reliability in Semiconductor Devices Quantum Computing RISC-V Architecture Machine Learning Computer-Aided Design His recent publications address fault-tolerant hyperdimensional computing, analog computing for AI, FeFET-based neuromorphic systems, and compact majority gate design using FDSOI technology. No scientific awards are mentioned in the provided text.
Prof. Wolfgang Ecker is a Professor at the Technical University of Munich (TUM), affiliated with the Chair of Design Automation within the TUM School of Computation, Information and Technology . His research focuses on Electronic Design Automation (EDA), RISC-V processor architectures, and hardware-software co-design. He leads projects advancing EDA tools for embedded systems, neural network acceleration, and formal verification methodologies. Ecker's work bridges machine learning techniques with traditional EDA challenges, addressing topics like energy-efficient AI inference and automated documentation generation. His contributions span compiler optimization, FPGA implementations, and fault analysis in digital systems. Recent research highlights include contributions to the TRISTAN project for RISC-V ecosystem development, model-driven architecture frameworks, and AI-driven timing analysis. He actively collaborates on open-source EDA tools and explores Rust-based embedded systems development. Ecker’s lab emphasizes practical applications in edge computing and automotive microcontroller safety, with a strong emphasis on interdisciplinary collaboration across TUM’s CIT School. His publications (15 most recent listed) reflect a focus on EDA tool innovation, processor design, and leveraging machine learning for hardware optimization. While no specific awards are mentioned, his involvement in ERC-funded projects and leadership in international collaborations underscores his academic impact.
Sebastian Maier is a Researcher at the Department of Computer Science 4 (Distributed Systems and Operating Systems) at Friedrich-Alexander-University Erlangen-Nuremberg, part of the Faculty of Engineering. His work focuses on invasive computing, many-core architectures, and distributed systems. He has contributed to projects like the iRTSS (Invasive Run-Time Support System) and the OctoPOS kernel, emphasizing system software for resource arbitration and latency-aware systems. Maier has taught courses such as System-level Programming in C and Operating Systems exercises from 2013 to 2019. His research interests include hardware-software co-design, embedded systems security, and runtime systems for future architectures. He has advised students on thesis topics like distributed TCP/IP stacks and asynchronous communication interfaces in many-core systems. His recent work explores dynamic hardware-managed queues (DySHARQ) and resource arbitration mechanisms for tile-based architectures. These efforts aim to optimize parallel processing and real-time performance in embedded systems. Maier has also collaborated on latency-aware operating systems (LAOS) and security in embedded systems (SESES). Key Projects: iRTSS, AAM (Asynchronous Abstract Machines), SHARQ, LAOS Lab/Teams: Part of the Invasive Computing SFB/TRR 89 project (Project C1) His publications span conferences like ROME, ROSS, and HiPEAC, addressing challenges in many-core kernel design, scalability, and hardware-accelerated systems. Current research trends focus on adapting system software to heterogeneous and dynamic many-core environments.
Christoph Jungemann is a Professor at RWTH Aachen University in the Faculty of Electrical Engineering and Information Technology, where he serves as Vice Dean and heads the Institute for Theoretical Electrical Engineering. He obtained his diploma and doctorate in electrical engineering from RWTH Aachen and completed habilitations at the University of Bremen and TU Braunschweig. His career includes academic positions at Fujitsu in Japan, the University of Bremen, Stanford University, TU Braunschweig, and the University of the Federal Armed Forces in Munich. His research focuses on semiconductor device modeling, particularly using the Boltzmann transport equation, noise simulation, SiGe HBTs, THz devices, ReRAM, and cryogenic electronics. He employs deterministic and Monte Carlo methods for advanced TCAD applications. His recent work explores high-harmonic generation in doped silicon, plasma waves, and compact modeling of III-V devices. His publication trend shows sustained leadership in computational electronics, with emphasis on numerical stability, multi-scale modeling, and emerging device technologies for quantum and high-frequency applications. IEEE Paul Rappaport Award (2006) IEEE Fellow (2019) RWTH Teaching Award (2017) He has advised numerous researchers and co-authored extensively with colleagues in device physics and modeling. He has led major projects such as DOTSEVEN and edited special issues on next-generation TCAD. He has also served as co-editor of IEEE Transactions on Electron Devices and contributed to accreditation in engineering education through ASIIN. He leads a research group focused on theoretical electrical engineering, advancing simulation methodologies for next-generation semiconductor devices.
Khalil Esper is a Researcher at the Department of Computer Science, Faculty of Engineering, Friedrich-Alexander-University Erlangen-Nuremberg (FAU), where he works at the Chair of Computer Science 12 (Hardware-Software Co-Design). His research focuses on verification, energy optimization, and runtime requirement enforcement in embedded systems and MPSoCs. His educational background includes: Informatics Engineering from Aleppo University, Syria (2010-2015) European Master in Embedded Computing Systems (EMECS) from Rhineland-Palatinate University of Technology Kaiserslautern-Landau (Germany) and Norwegian University of Science and Technology (Norway) (2017-2019) Esper's research interests center around verification and model checking, energy optimization on MPSoC, real-time systems and embedded systems, and autonomic computing. His work particularly focuses on runtime requirement enforcement mechanisms for non-functional properties in multi-processor systems-on-chip, with applications extending to medical devices and human-robot interaction systems. He has developed approaches using finite state machines, reinforcement learning, and evolutionary algorithms to ensure system properties are maintained during execution. His publication record shows a strong trend toward applying formal methods and runtime enforcement techniques to increasingly complex systems, with recent work expanding into safety-critical applications like orthoses and human-robot interaction. The interdisciplinary nature of his research bridges computer science, embedded systems engineering, and biomedical applications. Esper has supervised multiple theses including: Sascha H.: Runtime Requirement Enforcement of Non-Functional Requirements on MPSoCs Using Fuzzy Logic (2022) Iana S.: Feedback-Based Control of Non-functional Program Execution Properties on Linux (2023) Philipp L.: Runtime Requirement Enforcement of Functional and Non-Functional Requirements of a Knee Orthosis Based on a Digital Twin (2024) Avinash N.: Runtime Requirement Enforcement of Safety Properties of an Ankle Orthosis Based on a Digital Twin (2024) Zhiyi T.: Generation of Environment FSMs Using Machine Learning Techniques (2025) Moustafa A.: Runtime Requirement Enforcement of Safety Properties of Human-Robot Interaction Based on a Digital Twin (2025) Florian K.: Runtime Requirement Enforcement of Safety Properties of Human-Robot Interaction (2025) He has been actively teaching courses on Approximate Computing and Embedded Systems since the 2021/2022 academic year, demonstrating his commitment to academic instruction alongside his research activities. Esper is involved in the InvasIC research project, part of the DFG Transregional Collaborative Research Center 89 on Invasive Computing, which explores novel approaches to resource management in parallel computing systems.
Sarah Neuwirth is a tenured Professor for Computer Science at Johannes Gutenberg University Mainz (JGU) and a Visiting Researcher at the Jülich Supercomputing Centre. She manages JGU's High Performance Computing (HPC) division, coordinates regional/national HPC activities, and represents JGU in NHR, Gauss-Allianz, and HPC committees. Education : PhD (Dr. rer. nat.) in Computer Science (2018), Heidelberg University Diplom in Computer Science (2012), University of Mannheim Bachelor of Science in Computer Science (2010), University of Mannheim Research Interests : Parallel File and Storage Systems Modular Supercomputing (resource disaggregation/virtualization) Performance Engineering High Performance Computing Networking Reproducible Benchmarking Parallel I/O Publications Trends : Her work focuses on HPC performance modeling, parallel I/O optimization, modular supercomputing, network characterization, and reproducible benchmarks. Key themes include resource disaggregation, automated workflows, and data-intensive distributed applications. Scientific Awards : 2023 PRACE Ada Lovelace Award for HPC ZONTA Science Award 2019 Grants & Leadership : She leads the High Performance Computing division at JGU, participated in European DEEP projects, and serves on SC conference committees.
Prof. Dr.-Ing. Holger Blume serves as Vice President for Research and Transfer at Leibniz University Hannover while maintaining his academic position as Professor in the Architectures and Systems Section within the Faculty of Electrical Engineering and Computer Science. He holds multiple leadership positions including Chairperson of the Research Commission and Central Ethics Committee, Executive Board member of eNIFE (Leibniz Research Initiative for Neurosciences), and membership in both the Laboratory of Nano and Quantum Engineering and L3S Research Centre. His research interests span computer architecture, hardware design, signal processing, AI accelerators, hearing aid technology, and biomedical engineering. His work bridges theoretical computer science with practical applications in automotive systems, medical devices, and quantum engineering. Professor Blume's research demonstrates strong interdisciplinary connections between electrical engineering, computer science, and biomedical applications, with particular emphasis on hardware-oriented solutions for real-world problems. Analysis of his recent publications (2023-2025) reveals a strong focus on hardware acceleration for AI and signal processing applications, particularly in automotive radar/LiDAR systems and hearing aid technology. His work shows consistent innovation in RISC-V processor design, specialized hardware for mathematical functions, and biomedical applications of engineering principles. The research demonstrates a clear trajectory toward energy-efficient, specialized computing architectures for specific application domains. As Vice President for Research and Transfer, Professor Blume oversees significant research initiatives at Leibniz University Hannover, which hosts multiple Clusters of Excellence including PhoenixD (Photonics, Optics, and Engineering), QuantumFrontiers, and Hearing4all. The university participates in numerous collaborative research centers and junior research groups funded by DFG, BMBF, and EU programs. Professor Blume is actively involved in multiple research facilities including the Laboratory of Nano and Quantum Engineering and the L3S Research Centre. His work connects with Leibniz University's research focuses on optical technologies, quantum optics and gravitational physics, and biomedical research and technology. His leadership positions indicate strong involvement in shaping the research strategy and ethical framework of the university's scientific endeavors.
