Associate Professor Joshua San Miguel leads research in computer architecture and systems at the University of Wisconsin-Madison, with an affiliate role in Computer Sciences. His work focuses on energy-efficient computing for IoT devices, microarchitecture innovations, and networks-on-chip. He holds a PhD (2017) and BASc (2012) from the University of Toronto. Education: PhD in Electrical & Computer Engineering, University of Toronto (2017) BASc in Engineering Science (ECE), University of Toronto (2012) Research Interests: Approximate computing for energy harvesting systems Branch prediction and value prediction in processors Cache architectures and networks-on-chip for many-core processors Intermittent computing resilience His recent work emphasizes value-level parallelism (Carat/uSystolic), RTL simulation acceleration (TaroRTL), and personalized neural network inference (CAP’NN). His research has been recognized with the NSF CAREER Award (2021) and multiple IEEE Micro Top Picks. Grants & Advising: Active in supervising advanced independent studies and master’s/dissertation research. Extensive grant funding includes the NSF CAREER Award and the Grainger Faculty Scholarship. Labs & Teams: Leads research groups focused on approximate computing and energy-efficient architectures within the Electrical & Computer Engineering department.
Emre Salman is a Professor in the Department of Electrical and Computer Engineering at Stony Brook University (SUNY), where he directs the Nanoscale Circuits and Systems (NanoCAS) Lab. His research focuses on nanoscale IC design, energy-efficient computing, and biomedical electronics, with notable contributions to 3D integrated circuits and wireless energy harvesting for IoT and healthcare applications. Education : PhD in Electrical Engineering, University of Rochester (2009) MSc in Electrical and Computer Engineering, University of Rochester (2006) BSc in Microelectronics Engineering, Sabanci University, Turkey (2004) Research Interests : Salman’s work spans energy-efficient integrated circuits, secure IoT systems, and implantable medical devices. He pioneers techniques like charge-recycling logic and thermal-aware design for post-Moore computing. His group develops monolithic 3D ICs to address power/thermal challenges in AI accelerators and biomedical implants. Articles Trends : Recent publications highlight advancements in triboelectric energy harvesters for knee implants, thermal covert channel mitigation in 3D processors, and energy-efficient DNN accelerators. He emphasizes sustainability and security in emerging technologies like ReRAM-based computing and AC circuits for wireless IoT. Awards : 2023-2024 IEEE Distinguished Lecturer 2018 IEEE Region 1 Technological Innovation Award 2013 NSF CAREER Award Advising & Grants : Salman has directed multiple NSF, NIH, and industry-funded projects. He advises students on topics like hardware security and biomedical electronics, with a focus on translating research into commercializable technologies. Labs & Teams : The NanoCAS Lab collaborates with Brookhaven National Lab and industry partners (e.g., AMD, Samsung) to bridge academic research with real-world applications in energy-efficient computing and secure 3D ICs.
Sarah Azimi is a fixed-term researcher at the Department of Control and Computer Science (DAUIN) within the College of Computer, Film and Mechatronics Engineering at Politecnico di Torino. She actively contributes to research and teaching in the domains of reliable computing, reconfigurable systems, and AI applications for space and smart city security. Research Interests: Reliability and fault tolerance in safety-critical and space systems RISC-V and FPGA-based architectures High-performance computing (HPC) and reconfigurable computing AI resilience and real-time gesture recognition for public safety Radiation effects and hardening techniques for aerospace applications Publication Trends: Her recent publications focus on RISC-V reliability, radiation effects in space missions, AI resilience in reconfigurable platforms, and smart city security through gesture recognition. Her work spans both journal and conference venues, emphasizing practical and mission-tailored solutions in embedded and aerospace computing. Scientific Awards: No awards explicitly mentioned in the provided text. Advising and Grants: Sarah Azimi supervises multiple PhD students including Federico Buccellato, Aobo Cui, and Giorgio Cora. She leads the competitive research project Safe Smart City: Detecting Violence and Requests for Help in Real Time Through Video Surveillance Devices (2024). She is also a member of the RAMSES CubeSat-1 Development project (2025–2026) and led the commercial research project on the Rempro fault-tolerant processor (2022–2023). Labs and Teams: She is a key member of the CAD - Electronic CAD & Reliability Group (DAUIN) at Politecnico di Torino, contributing to cutting-edge research in electronic design automation and system reliability for aerospace and terrestrial applications.
Pierre-Emmanuel Gaillardon is a Professor in the Department of Electrical & Computer Engineering and Adjunct Professor in the School of Computing at the University of Utah. He holds a joint appointment since July 2024, having previously served as Assistant Professor (2016–2019) and Adjunct Assistant Professor in Computing (2016–2019). His research focuses on FPGA design, VLSI systems, nanoelectronics, and hardware security. He leads projects in emerging devices like TIGFETs, compute-in-memory architectures, and radiation-hardened FPGA fabrics. Teaching includes courses on Digital VLSI Design, Embedded Systems Design, and thesis supervision. He has secured grants from NSF, DARPA, and industry partners totaling over $10M, addressing topics like FPGA redaction, neuromorphic systems, and environmental sensors. Notable awards include the NSF CAREER Award (2018) and IEEE Senior Member elevation (2016). He actively serves on IEEE committees for nanoelectronics and EDA tools, contributing to standards like OpenFPGA.
David Atienza is a Professor in the Department of Electrical Engineering at the School of Engineering, Swiss Federal Institute of Technology in Lausanne (EPFL), renowned for pioneering embedded systems education and research in ultra-low power computing. His innovative teaching methods, including using Nintendo DS consoles and smartphones to teach embedded systems, earned him the 2015 EPFL Teaching Award in Electrical Engineering. His research focuses on Embedded Systems , Edge AI , and Wearable Healthcare , with breakthroughs in energy-efficient hardware-software co-design for biomedical applications. Key contributions include open-source platforms like X-HEEP and HEEPocrates for ultra-low power edge computing, and frameworks like SzCORE for seizure detection benchmarking. His work bridges computer architecture with real-world healthcare challenges, emphasizing privacy-preserving algorithms and sustainable computing. Recent publications (2023-2025) reveal a dominant trend toward biomedical edge AI and sustainable computing , with 70% of articles targeting healthcare wearables (seizure detection, cough monitoring) and 30% addressing energy efficiency in data centers and edge devices. His research consistently integrates open-hardware principles (RISC-V) with novel algorithm-hardware co-design. Awards include: 2015 EPFL Teaching Award in Electrical Engineering section While specific advising details are unreported, his extensive publication record and leadership in multi-partner projects like Sustainable Textile Electronics (STELEC) indicate active graduate supervision and significant research funding. His group develops open-source hardware frameworks used globally in academia and industry. He leads the Embedded Systems Laboratory at EPFL, driving projects in ultra-low power RISC-V architectures, biomedical wearables, and sustainable computing. Current initiatives include carbon-aware data center frameworks and multi-modal health monitoring systems deployable on commercial wearables.
Prof. Dr. rer. nat. Rainer Leupers is a faculty member at RWTH Aachen University, chairing the Department of Software for Systems on Silicon. His research focuses on embedded systems, hardware-software co-design, virtual prototyping, and security in computing-in-memory architectures. He has published extensively on RRAM accelerators, logic locking, and neuromorphic security. Chair of Software for Systems on Silicon Research in hardware security and deep learning accelerators Recent publications on cross-tool virtual frameworks and thermal side-channel attacks His work bridges system-level modeling with practical security implementations, emphasizing reliability and performance in heterogeneous computing environments. Key trends in his 2025-2023 articles include compute-in-memory optimization, neural network inference efficiency, and security vulnerabilities in emerging hardware. Awards and formal recognitions are not explicitly detailed in the provided materials. He has not directly mentioned advising students or research grants in the given text fragments. The chair's contact information includes an office at ICT Cube 1, Electrical Engineering, Aachen, with direct email and website links.
Professor Ivan Z. Milentijevic is a full professor at the Faculty of Electronics in Niš, University of Niš, within the Department of Electrical Engineering and Computer Science. He earned his PhD in Computer Science from the same institution in 1998, following a Master's (1994) and undergraduate degree (1989) in the same field. His research focuses on systolic arrays, digital signal processing architectures, and project-based learning methodologies. He has published 8 papers in journals with impact factor and is currently involved in 1 domestic and 1 international research project. Research interests include: Optimal design of systolic arrays for matrix operations FIR filter architectures and error-tolerant systems Reconfigurable hardware and parallel processing Educational technologies in project-based learning His recent work (2002–2008) emphasizes configurable architectures for signal processing and collaborative learning systems. Earlier contributions (1996–1998) focused on systolic array optimization for linear algebra operations. Advising/grants: No explicit student/advisor relationships listed. Current projects involve 1 domestic and 1 international collaboration. Grants and funding details not specified. Labs/teams: Affiliated with the Faculty of Electronics' research groups in computer engineering and signal processing, though specific lab names are not mentioned.
Uwe Meyer-Baese is an Associate Professor in the Electrical and Computer Engineering Department at the FAMU-FSU College of Engineering. He holds a Ph.D. (Dr.-Ing. habil) from Darmstadt University of Technology, Germany. His research focuses on Digital Signal Processing with FPGAs, VLSI design, and medical imaging applications. He has authored over 100 publications, 5 books, and holds 3 patents. He has been recognized with awards such as the Humboldt Fellowship (2009) and the FAMU-FSU Teaching Award (2007). Education History: Dr.-Ing. habil (Venia Legendi), Darmstadt University of Technology, Germany, 2003 Ph.D. (Dr. Ing.), Darmstadt University of Technology, Germany, 1995 M.S., Darmstadt University of Technology, Germany, 1989 Research Interests: FPGA-based embedded systems and real-time DSP Low-power VLSI architectures Medical image processing (e.g., breast MRI, brain tumor analysis) Hardware security and intellectual property protection Graph theory applications in biological networks Recent work includes advancements in FPGA implementations for microprocessor systems, brain network controllability studies, and AI-driven medical diagnostics. His lab focuses on bridging hardware design with biomedical applications, emphasizing practical implementations through FPGA platforms. Awards: Max-Kade Award in Neuroengineering (1997) ECE Department Research Award (2005) Humboldt Fellowship (2009) FAMU-FSU Teaching Award (2007) He has advised over 60 master’s theses and contributed to major grants in FPGA-based medical systems. His book Digital Signal Processing with Field Programmable Gate Arrays is a widely used textbook in the field.
Francesc Moll Echeto is an Associate Professor at the Universitat Politècnica de Catalunya (UPC), affiliated with the Departament d'Enginyeria Electrònica and the Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona. He leads the HIPICS research group focused on high-performance integrated circuits and systems design. His expertise spans energy harvesting, low-power electronics, process variability management, and secure circuit design. He coordinates the Doctorat en Enginyeria Electrònica program and has coordinated EU-funded projects like the European Processor Initiative (EPI). Education: M.S. in Physics, Universitat de les Illes Balears, 1991 Ph.D. in Electronic Engineering, Universitat Politècnica de Catalunya, 1995 Research Focus: His work addresses energy-efficient computing, including: - Design of circuits tolerant to manufacturing variability - Energy harvesting from mechanical and RF sources - Secure hardware countermeasures against side-channel attacks - RISC-V architecture implementations in advanced technologies - Edge computing and autonomous sensor systems Grants & Collaborations: Coordinator of R&D projects like 'ARQUITECTURA DE COMPUTADORES DE ALTAS PRESTACIONES' (PID2023-146511NB-I00) Part of the Barcelona Zettascale Lab consortium Collaborations with Barcelona Supercomputing Center and industry partners Awards: HiPEAC Paper Award (2023, 2024) for innovations in vector processing and DNN acceleration Labs/Teams: Leads the HIPICS group and the EFRICS subgroup, collaborating on EU-funded initiatives like the European Processor Initiative. Active in open-source silicon projects (e.g., Sargantana RISC-V processor).
Dr. Grey Ballard is an Associate Professor in the Department of Computer Science at Wake Forest University . He earned a B.S. in Math and Computer Science (2006), M.A. in Math (2008) from Wake Forest, and PhD in Computer Science (2013) from the University of California, Berkeley. He was a Truman Fellow at Sandia National Laboratories before joining Wake Forest. Research Focus: Ballard develops communication-optimal algorithms for high-performance computing , particularly in tensor decompositions , symmetric matrix computations , and nonnegative matrix factorization . His work combines numerical linear algebra with parallel algorithm design to reduce data movement costs in distributed systems. Publications demonstrate expertise in communication lower bounds , randomized tensor rounding , and visualization tools for parallel algorithms. He has contributed software packages such as TuckerMPI , GentenMPI , and PLANC for large-scale data compression and clustering. Scientific Awards: Wake Forest Excellence in Research Award NSF CAREER Award SIAM Linear Algebra Prize Three Conference Best Paper Awards (SPAA, IPDPS, ICDM) C.V. Ramamoorthy Distinguished Research Award (UC Berkeley) ACM Doctoral Dissertation Award – Honorable Mention Teaching: Courses include Introduction to Computer Science , Numerical Linear Algebra , and Parallel Algorithms . He has developed educational tools using the Thread-Safe Graphics Library to visualize parallel dynamic programming and collective communication.
Lorenzo Pavesi is a Full Professor of Experimental Physics at the Department of Physics, University of Trento (Italy), where he leads the Nanoscience Laboratory with 25 members. His academic career spans over 30 years, including roles as Assistant Professor (1990), Associate Professor (1999), and Full Professor (2002). He founded semiconductor optoelectronics research at the university and established photonics laboratories focused on growth and advanced treatment of materials. Research Focus: Silicon photonics, quantum optics, nonlinear optics, optical sensors, and neuromorphic computing. Leadership: IEEE Italian Chapter on Nanotechnology founder, editorial board member for Frontiers in Physics , ETRI Journal , and Sensors . His work bridges photonics and electronics, with recent advancements in integrated quantum photonics and neuromorphic systems. He has managed numerous national and international projects, holds 9 patents, authored over 500 papers, and edited 15+ books. Awards include the Cavaliere title (2001), IEEE Distinguished Speaker (2010-2011), and fellowships from IEEE, SPIE, and SIF.
Heiner Giefers is a Professor for Cloud Computing at the Department of Computer Science and Natural Sciences at Southwestphalia University of Applied Sciences since 2018. Prior to this position, he worked as a Research Staff Member at IBM Research - Zürich (2013-2018), focusing on hardware acceleration in cloud environments, implementation of big data algorithms on FPGAs, and development of hardware platforms for approximate and in-memory computing. Dr. Giefers received his doctorate (Dr. rer. nat.) from Universität Paderborn in 2012 with a dissertation titled "Design and Programming of Reconfigurable Mesh based Many-Cores." His academic journey at Universität Paderborn includes serving as an Academic Council Member (Akademischer Rat a.Z.) from 2008-2013 and as a Scientific Staff Member from 2006-2012, where he taught digital technology and computer architecture. Professor Giefers' research focuses on energy-efficient computing, particularly through hardware acceleration using FPGAs for cloud and AI workloads. His work spans cloud computing infrastructure, hardware-software co-design, approximate computing, in-memory computing, and energy-efficient implementations of machine learning algorithms. He has made significant contributions to the field of reconfigurable hardware for high-performance computing applications. His recent publications show a strong trend toward applying hardware acceleration techniques to artificial intelligence and machine learning workloads, with a particular focus on energy efficiency. His work bridges the gap between theoretical computer science and practical hardware implementation, often resulting in patented technologies that address real-world computing challenges in cloud environments. Best Paper Award for "Stochastic Matrix-Function Estimators: Scalable Big-Data Kernels with High Performance" (2016) Best Paper Award Nomination for "Energy-Efficient Stochastic Matrix Function Estimator for Graph Analytics on FPGA" (2016) Best Paper Award Nomination for "Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system" (2014) Best Paper Award Nomination for "A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier" (2010) Professor Giefers actively supervises numerous Bachelor's and Master's students, with over 50 completed theses covering topics from machine learning and cloud computing to IoT systems and hardware acceleration. He leads the "Energy-efficient AI" project (eki), which aims to increase the energy efficiency of AI systems through approximation techniques for FPGA implementation. Additionally, he collaborates with Prof. Dr. Christian Plessl on the "Digital teaching materials with Jupyter Notebooks" project, creating interactive learning materials that integrate teaching content, program code, and results into a single document. His work extends to practical applications through multiple patents related to FPGA implementations, neural networks, and memory systems, demonstrating his commitment to translating research into real-world solutions.
Sophia Natasha Wilson is a Research Fellow in the Department of Computer Science (DIKU) at the University of Copenhagen, specializing in machine learning applications across interdisciplinary domains. She is affiliated with the SCIENCE AI Centre and holds a cross-departmental position at the Niels Bohr Institute . Her research bridges theoretical machine learning with practical implementations in healthcare, quantum computing, and environmental sustainability. University of Copenhagen Department of Computer Science (DIKU) Niels Bohr Institute SCIENCE AI Centre Her research focuses include: Quantum-enhanced machine learning algorithms Explainable AI for healthcare applications Environmental sustainability in computing Emotion-aware language models Quantum computing hardware optimization Public health risk modeling Her recent publications demonstrate cross-disciplinary work in quantum machine learning (hybrid optical processors, qubit stabilization), health informatics (hypothyroidism analysis, nursing values evaluation), and ethical AI (sustainable AI, fairness in recommender systems). Technical work also appears in non-Euclidean generative models and real-time adaptive systems . Current projects include quantum dot array simulation (QDarts platform) and federated learning for personalized medicine . She contributes to the TreeSense center for remote sensing of global tree resources and works on climate-aware AI frameworks.
Dr. Weilu Gao is an Assistant Professor in the Department of Electrical & Computer Engineering at the University of Utah. He holds a B.S. from Shanghai Jiao Tong University (2011) and a Ph.D. from Rice University (2016), followed by postdoctoral research there until 2019. Before joining Utah, he worked as a Photonics Designer at Lightmatter Inc. (2019–2020). His research focuses on photonics/optoelectronics of nanomaterials, including carbon nanotubes and 2D materials, with applications in computing, sensing, and energy. He has over 90 publications and 5,800+ citations. Research interests include reconfigurable photonics for machine learning, chiral photonic materials, and scientific computing using optical neural networks. Key projects involve developing diffractive optical neural networks (DONNs) for PDE-solving and energy-efficient computing, programmable chiral heterostructures, and wafer-scale aligned carbon nanotube architectures. His work bridges nanomaterial science with optical engineering, emphasizing scalable fabrication and cross-disciplinary applications. Notable achievements include publishing in Nature Communications , Advanced Photonics Research , and ACS Photonics . He leads the Weilu Gao Lab, which actively collaborates on NSF-funded projects (e.g., 2022 NSF award for carbon nanotube-based semiconductors). Professional activities include organizing workshops on chiral photonics and presenting at conferences like ECS Meetings. Grants include NSF funding for semiconductor research and collaborations with institutions like the University at Buffalo and Tokyo Metropolitan University. His lab recruits students and postdocs in scientific computing, photonics, and nanomaterials.
Benjamin Carrion Schaefer is an Assistant Professor of Electrical Engineering at the University of Texas at Dallas (UTD), affiliated with the Erik Jonsson School of Engineering and Computer Science. His research focuses on reconfigurable computing, FPGA-based systems, and hardware security. He holds a PhD in Electrical Engineering from the University of Birmingham, UK (2003). His work emphasizes high-level synthesis (HLS), electronic design automation (EDA), and secure hardware design. Key research interests include FPGA optimization, embedded systems security, and accelerating runtime reconfiguration in CGRAs. His recent publications address challenges in cloud-based split logic synthesis, mitigating side-channel attacks on legacy hardware, and HLS-driven RTL bug detection. He leads research on resource-sharing architectures like MOSAIC and PEPA for performance enhancement in embedded processors. No scientific awards are explicitly listed, but his contributions to hardware-aware design automation highlight his technical expertise. Advising and grant details are not provided in the text. Schaefer is associated with a lab at UTD, though specific lab name or focus areas are not detailed here.
