جست‌وجوی استاد و پژوهشگر

Antonio Gonzálezمشاهده پروفایل

استاد

• Computer Architecture
• Microarchitecture
• Compilers
• +۷ مورد دیگر

Antonio González is a full Professor at the Barcelona School of Informatics (FIB), Universitat Politècnica de Catalunya (UPC), where he is affiliated with the Department of Computer Architecture. He leads the Microarchitecture and Compilers (ARCO) research group, focusing on robust and energy-efficient computing systems, including general-purpose processors, GPUs, and cognitive computing architectures. His research spans computer architecture, microarchitecture, compilers, GPU design, and deep learning acceleration, with a strong emphasis on energy efficiency and memory optimization. His work integrates hardware and compiler techniques to enhance performance in modern computing systems. The recent publications highlight a strong trend in energy-efficient DNN acceleration, GPU microarchitecture, memory systems, and near-data processing. His team explores novel quantization methods, adaptive caching, and architectural extensions for vision and AI workloads, published in top-tier venues such as MICRO, ISCA, and IEEE/ACM journals. ACM Fellow (2020) ICREA Academia Award (2014, 2019, 2024) UPC Duran Farell Award (2008) HiPEAC 2024 Paper Award (twice) González has supervised several PhD students and leads competitive R&D+i projects, including those funded by ICREA and the European Research Council. His research group collaborates extensively within UPC and with international institutions. He is actively involved in advancing computer architecture through innovation in simulation, hardware design, and AI acceleration. He is a member of IEEE and ACM, and his work continues to influence both academic and industrial developments in high-performance and energy-efficient computing.

• High-Performance Computing
• Reconfigurable Computing
• FPGA Acceleration
• +۷ مورد دیگر

Carlos Alvarez Martinez is a faculty member at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture at the Barcelona School of Informatics (FIB). He is a key member of the Programming Models (PM) research group and collaborates closely with the Barcelona Supercomputing Center (BSC). His research focuses on high-performance computing, FPGA acceleration, task-based programming models like OmpSs, and hardware-software co-design for heterogeneous systems. His research interests center on advancing parallel computing through innovative programming models and hardware acceleration. He investigates efficient task scheduling, resource management in multicore and FPGA-based systems, and runtime support for dataflow models. His work enables high-performance execution of complex applications in domains such as scientific computing and cyber-physical systems. He actively contributes to European initiatives like TEXTAROSSA and AXIOM, aiming to develop next-generation exascale supercomputing technologies. The trend in his recent publications shows a strong focus on leveraging FPGAs for HPC, optimizing SpMV operations, improving task scheduling with hardware support, and developing frameworks for multi-FPGA clusters. His work consistently bridges theoretical models with practical implementations, emphasizing performance, scalability, and energy efficiency in heterogeneous computing environments. Scientific Awards: Premi UPC al Compromís Social 2019 Premi Disseny per al Reciclatge 2013 Alvarez Martinez has advised or collaborated with several doctoral students, including Jaume Bosch, Xubin Tan, and Fahimeh Yazdanpanah. He has been involved in numerous competitive R&D projects, often related to high-performance computing and parallel programming models. His work includes significant contributions to educational innovation, particularly in active learning methodologies and formative assessment using interactive systems. He leads and participates in research labs and teams focused on programming models and computer architecture, notably the PM group at UPC/BSC. These teams develop runtime systems, compilers, and hardware accelerators to push the boundaries of parallel computing efficiency and programmability.

Danfeng Zhangمشاهده پروفایل

استاد

• Programming Languages
• Security
• Differential Privacy
• +۵ مورد دیگر

Danfeng Zhang is a faculty member at Duke University whose research sits at the intersection of programming languages and security. Active across the premier PL conferences since 2015, Zhang has served on more than two-dozen program committees and currently co-chairs the POPL Student Research Competition. Education & Affiliation: Home page: users.cs.duke.edu/~dz132 Affiliation: Duke University, United States Research Interests: Zhang’s work spans programming-language design, static and dynamic analysis, formal verification, and security. A recurring theme is developing language-based techniques that guarantee strong security and privacy properties—ranging from side-channel resistance and constant-time execution to differential-privacy proofs—while preserving performance and usability. His recent projects combine type systems, program logics, and automated reasoning to build practical verification tools for concurrent, speculative, and approximate software. Publication Trends: Across nine representative papers (2015-2024) Zhang has advanced static detection of cache side channels, automated proofs of differential privacy, and relaxed concurrency models. The trajectory shows deepening integration of security concerns into language infrastructure, with tool-building (CtChecker, SpecSafe, LightDP) that bridge formal guarantees and real-world systems. Service & Leadership: 2024 POPL Student Research Competition Co-Chair 2025 POPL Program Committee member Repeated reviewer/PC member: PLDI, SPLASH/OOPSLA, ISSTA, ECOOP, APLAS, PriSC, PASS Zhang regularly mentors student researchers through SRC sessions and workshop panels, fostering diversity and early-career participation in the programming-languages community.

Juan Manuel Cebrian Gonzalezمشاهده پروفایل

استادیار

• Computer Architecture
• Parallel Computing
• Power Management
• +۴ مورد دیگر

Juan Manuel Cebrian Gonzalez is an Assistant Professor at the Department of Computer Engineering and Technology, Faculty of Informatics, University of Murcia. His work focuses on computer architecture, parallel systems, and energy-efficient computing. Doctorate: University of Murcia (2011), thesis on fine-grain power and thermal management in multicore processors. Research interests: Designing architectural mechanisms for optimizing power consumption and thermal management in multicore systems, cache coherence in parallel architectures, and vectorization techniques for high-performance computing. His work also explores heterogeneous architectures, fault tolerance, and efficient memory systems. Recent article trends: Focus on cache management, speculative execution, lock-free constructs, and performance-energy trade-offs in edge and heterogeneous computing. Key methodologies include gem5 simulation, Arm SVE, and AVX-512 vectorization. Collaboration: Supervised by Dr. Juan Luis Aragón Alcaraz and Dr. Stefanos Kaxiras. Active in the Computer Architecture and Parallel Systems research group.

• Computer Architecture
• Microarchitecture
• Compilers
• +۷ مورد دیگر

Antonio Maria Gonzalez Colas is a Full Professor at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture within the Faculty of Computer Science of Barcelona (FIB). He leads the ARCO research group focused on Microarchitecture and Compilers and is actively engaged in high-impact research in computer architecture, GPUs, and energy-efficient computing. His collaborations extend to the Barcelona Supercomputing Center and various national and European research initiatives. Research Interests: His primary research areas include computer architecture, microarchitecture, compilers, GPUs, and processor design. He focuses on energy-efficient computing, deep neural network (DNN) accelerators, GPU simulation and optimization, memory systems, and architectural support for machine learning and autonomous systems. His work often integrates compiler techniques with hardware design for performance and efficiency. Scientific Production Trends: His recent publications demonstrate a strong focus on energy-efficient hardware for AI workloads, particularly DNN and speech recognition acceleration, GPU architectural innovations, memory optimization, and real-time rendering. He frequently publishes in top-tier venues such as ISCA, MICRO, HPCA, and IEEE/ACM journals. ICREA Academia Award 2024 HiPEAC 2024 Paper Award ACM Senior Member (2020) Advising and Grants: He has advised numerous PhD students whose theses cover topics like energy-efficient architectures for autonomous driving, speech recognition, and neural networks. He leads competitive R&D projects, including an ERC Advanced Grant and projects funded by the Spanish National Program and the ICREA Academia program, focusing on domain-specific architectures and cognitive computing units. Labs and Teams: He is the principal investigator of the ARCO (Microarchitecture and Compilers) research group at UPC, a leading team in computer architecture research in Spain. The group is part of a larger collaborative network within UPC and with international partners.

• Computer Architecture
• Programming Models
• Parallel Computing
• +۵ مورد دیگر

Marc Gonzalez Tallada is a researcher at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture within the Barcelona School of Informatics (FIB). He is a member of the MGT Research Group, focusing on Programming Models and high-performance computing systems. His research interests lie in the domain of computer architecture and programming models, with a strong emphasis on parallel and distributed computing, performance optimization, and system-level software. His work contributes to the design and implementation of efficient programming models that exploit modern parallel architectures. The recent publications (2010–2024) reflect a consistent focus on programming models, particularly in the context of high-performance computing. Key themes include task-based programming, runtime systems, compiler optimization, memory management, and performance analysis. The research spans computer architecture, system software, and compiler design, demonstrating a multidisciplinary approach to solving challenges in parallel computing. Scientific Awards and Recognitions: Premi o reconeixement Advising and Grants: While specific student names are not listed, his involvement in competitive R&D+i projects indicates active participation in funded research. These projects suggest leadership or collaboration in grant-supported initiatives related to programming models and computer systems. His role in innovation and research projects highlights contributions to both academic and applied domains. Labs and Research Teams: He is a core member of the MGT (Programming Models) research group at UPC, which focuses on advancing the state-of-the-art in programming models for parallel and distributed systems.

Tiark Rompfمشاهده پروفایل

استادیار

• Compiler Design
• Programming Languages
• Runtime Code Generation
• +۸ مورد دیگر

Tiark Rompf is an Assistant Professor at Purdue University , with research spanning programming languages, compilers, and systems. His work bridges domains including architecture, databases, machine learning, and AI through projects like Reachability Types and Rhyme. Co-director of the Purdue Center for Programming Principles and Software Systems (PurPL) Scientific Advisor at SambaNova Systems Previously a member of the Scala team at EPFL His research focuses on: Runtime code generation and advanced compiler technology Expressive data-centric query languages (Rhyme, Datalog) Reachability type systems for memory safety and effect handling Metaprogramming and logical relations for formal verification Recent publications highlight contributions to Datalog compilation (Flan), nested data structures (Rhyme), and polymorphic reachability types. He leads projects exploring: Compiler optimizations for emerging architectures (GPU, TPU, FPGA) ML-driven compiler improvements Secure multi-party computation via metaprogramming Scientific awards include: NSF CAREER Award (2016) Google Faculty Research Awards (2017, 2018) DOE Early Career Research Award (2017) ACM SIGPLAN PL Software Award (2019) GPCE Test of Time Award (2020) Students and alumni from his group have joined institutions like Databricks, DeepMind, Galois, and Meta. He teaches advanced compiler courses including: CS 590 - Advanced Topics in Compilers CS 352 - Compilers CS 502 - Graduate Compilers

Manuel Carroمشاهده پروفایل

دانشیار

• Programming Language Implementation
• Abstract Machines
• Parallelizing Compilers
• +۷ مورد دیگر

Manuel Carro is an Associate Research Professor and holds a dual appointment as Associate Professor at Universidad Politécnica de Madrid, Spain. He serves as Director and previously as Deputy Director at IMDEA. His research focuses on declarative programming languages, parallelism, service-oriented computing, and formal methods. He leads projects in the CLIP lab and participates in European/ national initiatives. Education: PhD in Computer Science, Universidad Politécnica de Madrid (2002) Research Highlights: Manuel investigates implementation of logic/constraint languages, quality analysis of service compositions, and data-driven behavior in service-oriented systems. He applies advanced operational semantics techniques like tabling and parallelism. His work also covers workflow analysis, visualization, and verification techniques. Affiliations: UPM Representative in NESSI ETP Steering Committee Conference Coordinator, Association of Logic Programming Labs & Teams: Active in the CLIP lab, focusing on programming language implementation and service-oriented computing research.

Josep Casanovasمشاهده پروفایل

استاد

• Modelling and Simulation
• Internet and Information Systems
• Urban Mobility
• +۴ مورد دیگر

Josep Casanovas is a Full Professor at the Statistics and Operations Research Department of the Technical University of Catalonia (UPC), affiliated with the Barcelona School of Informatics. He previously served as head of inLab FIB (2012-2020) and as dean (1998-2004) and vice-rector (2006-2011) of UPC, leading strategic initiatives in university governance and ICT policies. His research focuses on Modelling and Simulation , Internet and Information Systems , and Urban Mobility . He has led projects for the European Union, including C-ROADS Spain, REMEDiAL, and ECHORD++, addressing intelligent transport, software automation, and robotic innovation. Recent publications highlight his work on agent-based simulation for urban health, deep learning applications in traffic and energy savings, and wildfire management tools . He co-directs LogiSim and coordinates the Severo Ochoa Research Excellence Program at the Barcelona Supercomputing Center (BSC-CNS).

• Computer Architecture
• Programming Models
• Parallel Computing
• +۴ مورد دیگر

Daniel Jimenez Gonzalez is a faculty member at the Universitat Politècnica de Catalunya (UPC), affiliated with the Department of Computer Architecture within the School of Informatics (FIB). He is an active researcher in programming models and high-performance computing, contributing extensively to the field through publications, projects, and academic supervision. Research Interests: His work focuses on Computer Architecture , Programming Models , and Parallel Computing . He investigates task-based programming, runtime systems, compiler optimizations, and performance modeling for multi-core and heterogeneous architectures. His research addresses challenges in scalability, energy efficiency, and resilience in modern computing environments. His recent publications show a consistent trend in task-based programming models , runtime scheduling , and performance optimization across diverse architectures, including NUMA and GPU-accelerated systems. The work spans from theoretical modeling to practical implementation, often targeting real-world HPC applications. Scientific Awards: No awards explicitly mentioned in the provided text. Advising and Grants: While specific students are not listed, his involvement in doctoral theses and R&D projects suggests an active role in mentoring graduate students. He has participated in both competitive and non-competitive R&D+i projects, indicating grant acquisition and project leadership experience in areas related to programming models and computer architecture. Labs and Teams: He is a member of the UPC PM - Programming Models research group, which focuses on the design, analysis, and optimization of modern programming paradigms for high-performance systems.

FRANCISCO MANUEL FERNANDEZ RIVERAمشاهده پروفایل

استاد

• Computer Architecture
• High-Performance Computing
• Parallel Algorithms
• +۳ مورد دیگر

Francisco Manuel Fernández Rivera is a Professor at the University of Santiago de Compostela, affiliated with the Department of Electronics and Computing under the Faculty of Physics. His research focuses on high-performance computing, parallel algorithms, and LiDAR data analysis. He leads the ARQCOMP research group and is part of the Center for Research in Intelligent Technologies (CITIUS). His work addresses challenges in NUMA systems optimization, sparse matrix computations, and geospatial data processing. He holds a PhD from the University of Santiago de Compostela (1988), with a thesis on algorithm partitioning in hypercube computers. His research spans parallel computing frameworks, LiDAR-based infrastructure analysis, and performance modeling of distributed systems. Recent projects include developing thread migration strategies for NUMA architectures and creating tools for LiDAR data visualization and simulation. Key contributions include advancements in LiDAR-based pathfinding, energy-efficient NUMA system management, and parallelization techniques for irregular codes. His work bridges theoretical computer architecture with practical applications in urban planning and environmental monitoring.

• Computer Architecture
• GPU Systems
• Accelerators for Machine Learning
• +۴ مورد دیگر

Jose Luis Abellan Miguel is a Ramón y Cajal Fellow and Tenure-Track Associate Professor at the University of Murcia's Department of Computer Engineering and Technology. He leads the EcoArTech team and is a European R3 researcher. Previously, he held roles at the University of Ferrara, Boston University, and Universidad Católica de Murcia. His research focuses on GPU architectures, accelerators for machine learning, and privacy-preserving computing, particularly Fully Homomorphic Encryption (FHE). He has authored over 70 peer-reviewed publications and contributed to conferences like ISCA, HPCA, and MICRO. Education: Bachelor's, Master's, and PhD in Computer Science and Engineering (University of Murcia, 2007–2012) Research Interests: Abellan's work emphasizes architectural enhancements for GPU systems, customized accelerators for ML and FHE, and efficient synchronization/communication in many-core architectures. His contributions include tools like MGPU-Sim and STONNE for simulation, and frameworks like FIDESlib for FHE on GPUs. Recognition: HiPEAC Paper Awards (2011, 2019–2024) Top Picks in Hardware and Embedded Security 2024 European R3 Certificate (2024) Editorial roles at ACM TACO and Frontiers in Electronics Grants & Leadership: Recipient of a Ramón y Cajal fellowship and a Consolidación Investigadora grant. He chairs sessions at conferences like ISPASS and serves on TPCs for venues including DATE, HPCA, and MICRO. His lab collaborates with institutions like Georgia Tech, Northeastern University, and Intel. Labs/Teams: He leads the EcoArTech team, focusing on next-gen computing systems via architectural simulators. Collaborators include researchers from MIT, Boston University, and industry partners like NVIDIA and Intel.

• Computer Architecture
• Parallel Processing
• Networking Systems
• +۳ مورد دیگر

Javier Verdu Mula is a Professor at the Departament d'Arquitectura de Computadors (Universitat Politècnica de Catalunya - UPC) and a key researcher at the CRAAX - Centre de Recerca d'Arquitectures Avançades de Xarxes . His work focuses on computer architecture, parallel processing, and networking systems. Fields of Research include RISC-V virtualization, multithreaded processor optimization, and performance analysis of stateful networking applications. Scientific Awards include the BDigital Global Congress (2015) and Wayra Barcelona (2012) recognitions. Collaborations span institutions like Barcelona Supercomputing Center and researchers such as Manuel Alejandro Pajuelo, Mateo Valero Cortes, and Mario Nemirovsky. His recent publications address RISC-V hypervisor extensions, deep packet processing in parallel architectures, and statistical thread assignment models. He also holds patents in hardware virtualization and resource control systems.

• Computer Architecture
• Vector Processors
• GPU Microarchitecture
• +۹ مورد دیگر

Roger Espasa Sans is a senior academic and researcher at the Universitat Politècnica de Catalunya (UPC), affiliated with the Faculty of Informatics of Barcelona (FIB) and the Department of Computer Architecture. He has made significant contributions to computer architecture, particularly in vector processing, GPU design, and performance optimization. Universitat Politècnica de Catalunya (UPC) Faculty of Informatics of Barcelona (FIB) Department of Computer Architecture His research focuses on advanced computer architecture, including vector and superscalar processors, memory systems, instruction-level and data-level parallelism, GPU microarchitecture, and performance modeling. His work bridges theoretical design and practical implementation, especially in high-performance and embedded systems. The recent articles highlight a strong trend in GPU and shader optimization, memory redundancy elimination, and performance modeling. His publications span prestigious venues such as IEEE Microarchitecture Symposium, IEEE HPCA, and The Visual Computer, indicating sustained impact in the field of computer systems and architecture. Premiada (Awarded activity) Roger Espasa Sans has advised several doctoral students, including Manel Fernandez Gomez and Francisca Quintana Domínguez, contributing to the next generation of computer architects. His collaborative network is extensive, involving key figures like Mateo Valero and international institutions. While specific grants are not listed, his prolific output suggests sustained funding. He has contributed to major research groups such as CAP (High Performance Computing Group). He is a core member of the CAP - Grup de Computació d'Altes Prestacions (High Performance Computing Group), and has also been associated with PM - Programming Models and ARCO - Microarchitecture and Compilers. His work often involves simulation frameworks like JINKS and Asim, indicating a strong focus on performance evaluation and modeling.

Fritz Hengleinمشاهده پروفایل

استاد

• Programming Languages
• Functional Programming
• Domain-Specific Languages (DSLs)
• +۶ مورد دیگر

Fritz Henglein is a Professor at the Department of Computer Science, University of Copenhagen (DIKU), with affiliations also at Deon Digital. His career spans over three decades, with notable roles including Head of the Algorithms and Programming Languages (TOPPS) research group and Director of the HIPERFIT research center. Research interests include Programming languages and type systems Functional programming and DSLs High-performance computing Contracts and distributed ledger technology Algorithmic logic and formal semantics His work often bridges theoretical rigor with practical applications, particularly in financial information technology and compiler design. Collaborations include leadership in conferences like POPL, ICFP, and PEPM, with a focus on mentoring through academic events and community-building initiatives.