جست‌وجوی استاد و پژوهشگر

Shweta Shindeمشاهده پروفایل

استادیار

• Trusted Computing
• System Security
• Hardware Security
• +۴ مورد دیگر

Shweta Shinde is an Assistant Professor in the Department of Computer Science at ETH Zurich where she leads the Secure & Trustworthy Systems (SECTRS) research group. She is also a member of the Institute of Information Security and the ZISC Center at ETH Zurich. Her work bridges theoretical foundations with practical implementations in hardware and system security. Dr. Shinde's research focuses on the intersection of trusted computing, system security, and program analysis. Her group investigates both foundational aspects of security to protect phones, servers, and accelerators, as well as practical aspects of realizing these solutions through large-scale system building. Her work spans hardware security primitives, trusted execution environments, confidential computing, and secure system design across multiple platforms including mobile devices, cloud infrastructure, and blockchain systems. Her publication record demonstrates significant impact in the field, with numerous papers in top security venues including IEEE S&P, USENIX Security, CCS, and NDSS. Her research has uncovered critical vulnerabilities in major hardware security technologies like Intel SGX and AMD SEV-SNP while also proposing novel frameworks for building more secure systems. The work spans multiple domains including hardware security, cloud security, mobile security, and blockchain security, with a consistent thread of identifying and addressing fundamental security challenges in trusted computing. Among her notable achievements are multiple best paper awards including at SysTEX 2025 and nominations at DATE 2025, a Distinguished Paper Award at IEEE S&P 2024, and recognition as a Most Innovative Research Pwnie Award Nominee in 2024. Her work on WeSee received particular attention for breaking AMD SEV-SNP through novel interrupt-based attacks. Dr. Shinde actively mentors PhD students including Mark Kuhne, Supraja Sridhara, Mélisande Zonta-Roudes, Benedict Schlüter, Andrin Bertschi, and others. She teaches courses on Systems Security, Information Security Lab, Seminar on Systems Security, and Current Topics in Information Security at ETH Zurich. Her service to the community includes extensive program committee work for major security conferences including Oakland (S&P), NDSS, USENIX Security, and CCS, where she has served as track co-chair and program co-chair for several workshops.

Tushar Krishnaمشاهده پروفایل

دانشیار

• Computer Architecture
• Interconnection Networks
• Networks-on-Chip
• +۴ مورد دیگر

Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology, with a courtesy appointment in the School of Computer Science. He earned his PhD in Electrical Engineering and Computer Science from MIT in 2014, an MSE in Electrical Engineering from Princeton University in 2009, and a B.Tech in Electrical Engineering from IIT Delhi in 2007. His research spans computer architecture, interconnection networks, networks-on-chip (NoC), and AI/ML accelerator systems, with a focus on optimizing data movement in modern computing platforms. His work is funded by NSF, DARPA, IARPA, SRC, Department of Energy, Intel, Google, Meta, Qualcomm, and TSMC. His papers have been cited over 17,000 times, with three receiving IEEE Micro's Top Picks recognition, one earning an honorable mention, and four winning best paper awards. Dr. Krishna leads the Synergy Lab at Georgia Tech and has developed several influential tools including ASTRA-sim for distributed AI/ML training, MAESTRO and SCALE-sim for accelerator design space exploration, and Garnet2.0 for NoC simulation. His recent work focuses on large language model acceleration, distributed training systems, and neuro-symbolic AI architectures. He has received numerous teaching and research awards including induction into the HPCA Hall of Fame (2022), the Class of 1940 Teaching Effectiveness Award (2018), and the Roger P. Webb Outstanding Mid-career Faculty Award (2024). HPCA Hall of Fame Inductee (2022) Roger P. Webb Outstanding Mid-career Faculty Award (2024) Richard M. Bass/Eta Kappa Nu Outstanding Junior Teacher Award (2023) Roger P. Webb Outstanding Junior Faculty Award (2021) Class of 1940 Course Survey Teaching Effectiveness Award (2018) Dr. Krishna currently serves as Associate Director for the Center for Research into Novel Computing Hierarchies (CRNCH) and co-chair of the Chakra Execution Traces and Benchmarks Working Group. He has held the ON Semiconductor (Endowed) Junior Professorship at Georgia Tech (2019-2021) and has been a visiting professor at MIT EECS, Harvard University CS, and a researcher at Intel's VSSAD group.

Priyanka Rainaمشاهده پروفایل

استادیار

• Domain-Specific Architectures
• Hardware/Software Co-design
• Energy-Efficient Computing
• +۳ مورد دیگر

Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University, with a courtesy appointment in Computer Science. She leads the Stanford Accelerate research group, focusing on domain-specific hardware architectures and agile hardware-software co-design. Her work emphasizes high-performance, energy-efficient accelerators for emerging technologies. Education: B.Tech. from IIT Delhi (2011), M.S. and Ph.D. from MIT (2013/2018). Postdoctoral experience includes NVIDIA Research (2018) and Amazon Visiting Academic (2023–present). Awards include the Sloan Research Fellowship (2024), NSF CAREER Award (2023), and Terman Faculty Fellowship (2018). Research Interests: Domain-specific architectures, near-memory computing, design productivity, and machine learning acceleration. Her group develops frameworks like AHA (Agile Hardware) for efficient accelerator design and compilers. Awards: Over 10 major awards, including best paper recognitions at VLSI, MICRO, and JSSC. Active roles as Associate Editor for IEEE JSSC and Program Chair for IEEE Hot Chips (2020). Advising & Teaching: Supervises multiple PhD and MS students in hardware design, CGRAs, and ML accelerators. Teaches VLSI design courses (EE271/272/372) and oversees independent studies in embedded systems and chip design. Labs & Collaborations: Affiliated with Stanford PORTAL Center, AHA Center, and SystemX Alliance. Projects include MINOTAUR (edge AI accelerator), Amber (CGRA-based SoC), and EMBER (RRAM macros).

Subhasish Mitraمشاهده پروفایل

استاد

• Robust Computing
• NanoSystems
• Electronic Design Automation (EDA)
• +۳ مورد دیگر

Subhasish Mitra is the William E. Ayer Professor of Electrical Engineering and Computer Science at Stanford University, holding dual appointments in both departments. He leads the Stanford Robust Systems Group and serves on the leadership team of the Microelectronics Commons AI Hardware Hub under the US CHIPS and Science Act. His research spans Robust Computing, NanoSystems, Electronic Design Automation (EDA), and Neurosciences, with breakthroughs in X-Compact test compression, carbon nanotube computing, and 3D integration. He has held international roles like the Carnot Chair at CEA-LETI and Visiting Professorships globally. Education & Honors: Recipient of over 40 awards including the IEEE Computer Society’s Harry H. Goode Memorial Award, ACM/IEEE’s A. Richard Newton Technical Impact Award, and the Intel Achievement Award. He earned top academic accolades from IIT Kharagpur and Jadavpur University, and is a Fellow of ACM and IEEE. Research Impact: Pioneered first-of-their-kind systems like the carbon nanotube computer and monolithic 3D integration. His work on robust computing techniques like QED validation and X-Compact compression has industry-wide adoption, saving billions in manufacturing costs. Collaborates with industry leaders like Intel, Google, and Samsung. Publications & Grants: Over 400 publications, including award-winning papers in DAC, ISSCC, and IEEE journals. Leads grants from NSF, DoE, and industry partnerships. His lab explores cutting-edge topics like neuromorphic computing, 3D thermal scaffolding, and AI hardware acceleration. Administration & Outreach: Serves as Associate Chair (Faculty Affairs) for Stanford’s Computer Science Department. Recognized by students for mentorship, and frequently invited to global forums like the World Economic Forum and National Academy of Engineering.

Shweta Shindeمشاهده پروفایل

استادیار

• Trusted Computing
• System Security
• Program Analysis
• +۴ مورد دیگر

Shweta Shinde is an Assistant Professor at ETH Zürich's Department of Computer Science. She leads the Secure & Trustworthy Systems (SECTRS) group and is affiliated with the Institute of Information Security and the ZISC Center. Her research focuses on foundational and practical aspects of trusted computing, system security, and program analysis to protect devices ranging from smartphones to cloud servers. Key areas include AMD SEV-SNP, Arm CCA, Intel SGX, and hardware-software co-design for security. Dr. Shinde has made significant contributions to confidential computing, including frameworks like OpenCCA and tools for analyzing hardware vulnerabilities. Her work has been recognized with Best Paper Awards and Distinguished Paper Awards at top venues. She advises a group of PhD students, including Mark Kuhne, Supraja Sridhara, and Benedict Schlüter. Her service includes program committee roles at IEEE Security & Privacy, USENIX Security, and as Track Co-Chair for AsiaCCS 2026.

David Wentzloffمشاهده پروفایل

استاد

• RF integrated circuits
• Ultra-low power design
• Wireless communication
• +۴ مورد دیگر

David Wentzloff is a Professor of Electrical Engineering and Computer Science at the University of Michigan, where he has been on faculty since 2007. He directs the Wireless Integrated Circuits and Systems (WICS) group and serves as Director of the Michigan Integrated Circuits Laboratory (MICL). Wentzloff received his B.S.E. from the University of Michigan in 1999 and his S.M. and Ph.D. from MIT in 2002 and 2007. Wentzloff's research focuses on low-power integrated circuits for wireless communication in energy-constrained and volume-constrained applications. His work spans three primary areas: Synthesizable all-digital radios and radio building blocks Wireless body sensor networks (channel modeling, radios, and antennas) Radios and interfaces for millimeter-scale computing devices His innovations have significantly reduced power consumption in wireless communication for IoT devices, impacting standards including Bluetooth, WiFi, and 5G/6G. Analysis of his publication record reveals a consistent focus on ultra-low power wireless communication, with recent work emphasizing back-channel communication techniques that achieve 500x power reduction compared to conventional approaches. His research bridges theoretical circuit design with practical applications in healthcare, industrial monitoring, and consumer electronics. Wentzloff's scientific recognition includes: 2024 University of Michigan Faculty Recognition Award NSF CAREER Award (2012) DARPA Young Faculty Award (2009) Multiple best paper awards Two-time recipient of the Eta Kappa Nu Professor of the Year Award As an educator and mentor, Wentzloff has graduated 21 doctoral students and mentored dozens of master's and undergraduate researchers. He has taught courses ranging from introductory circuits to advanced graduate topics in analog and RF design. His entrepreneurial impact includes co-founding three successful companies: Everactive (formerly PsiKick), Movellus, and CubeWorks, which commercialize technologies developed in his research lab. Wentzloff leads the WICS research group, which operates within the Michigan Integrated Circuits Laboratory. His team develops cutting-edge technologies for batteryless sensing systems, millimeter-scale computing platforms, and ultra-low power wireless communication solutions that enable the next generation of Internet of Things applications.

Rakesh Kumarمشاهده پروفایل

استاد

• Computer Architecture
• System-Level Design Automation
• Low Power Computing
• +۳ مورد دیگر

Rakesh Kumar is a Professor and John Bardeen Faculty Scholar in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign. His work focuses on computer architecture, system-level design automation, and low-power computing. PhD in Computer Engineering from University of California, San Diego BS in Electrical Engineering from IIT Kharagpur His research spans all layers of the computing stack, with key contributions to flexible computer systems , waferscale computing , error-resilient architectures , and approximate computing . He has pioneered work on voltage-reliability tradeoffs and peak power management techniques. Recent publications highlight trends in space microdatacenters , printed microprocessors , and neural graph accelerators . His work on plastic chips was recognized as one of the three biggest semiconductor headlines of 2022 by IEEE Spectrum. IEEE Fellow (2024) ISCA Influential Paper Award MICRO Test-of-Time Award ICCAD Ten Year Retrospective Most Influential Paper Award Best Paper Awards at CASES, SELSE, HPCA He has received teaching accolades including the Stanley H. Pierce Faculty Award and Ronald W. Pratt Outstanding Teaching Award . His research group explores hardware-software co-design for emerging applications in AI, IoT, and sustainable computing.

Muhannad S Bakirمشاهده پروفایل

استاد

• Heterogeneous Integration
• 3D IC Packaging
• Advanced Cooling Systems
• +۷ مورد دیگر

Muhannad S. Bakir is the Dan Fielder Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology and serves as the Director of the 3D Systems Packaging Research Center. His research focuses on heterogeneous integration of microsystems, including 2.5D and 3D ICs and packaging technologies, with significant contributions to advanced cooling systems, electrical and photonic interconnects, and biosensor integration with CMOS. Dr. Bakir's research interests span heterogeneous microsystem design and integration, advanced cooling and power delivery for emerging architectures, electrical and photonic interconnect technologies, biosensor technologies, and nanofabrication. His work addresses critical challenges in next-generation electronics, enabling polylithic integration that concatenates heterogeneous ICs of various functionalities while mimicking monolithic-like densities. His research particularly focuses on co-design of thermal technologies, power delivery networks, and signaling networks for silicon nanoelectronic systems. His recent publications demonstrate strong trends in fused-silica stitch-chip technology for heterogeneous integration, with particular emphasis on RF and mm-wave applications, power delivery for AI accelerators, and thermal management solutions. His work bridges electrical engineering, materials science, and thermal management to solve critical bottlenecks in computing performance and efficiency. 2013 Intel Early Career Faculty Honor Award 2012 DARPA Young Faculty Award 2011 IEEE CPMT Society Outstanding Young Engineer Award 2012 National Academy of Engineering Frontiers of Engineering Symposium Invited Participant 2015 IEEE CPMT Society Distinguished Lecturer 2014 Best Paper of the IEEE Transactions on Components Packaging and Manufacturing Technology More than 25 conference and student paper awards Twelve issued US Patents Dr. Bakir leads the Integrated 3D Systems Lab (I3DS) at Georgia Tech, which is actively researching advanced packaging, interconnects, electrical and thermal design, and system integration. His team has received significant recognition for their work, including multiple best paper awards from major conferences like ECTC, IITC, and CICC. The lab is currently seeking postdoctoral researchers and research faculty to advance next-generation electronics through collaborative research. His lab focuses on enabling the next phase of Moore's Law through polylithic integration, which concatenates heterogeneous ICs of various functionalities (digital, analog, photonic, and mm-wave) using advanced off-chip '2.5D' and '3D' heterogeneous interconnects and packaging. This work impacts applications in high-performance computing, machine learning, edge intelligence, autonomous vehicles, augmented/virtual reality, and healthcare.

Timothy Roscoeمشاهده پروفایل

استاد

• Operating Systems
• Networking
• Distributed Systems
• +۳ مورد دیگر

Prof. Dr. Timothy Roscoe is a Full Professor in the Department of Computer Science at ETH Zurich. His research focuses on operating systems, networking, and distributed systems. He was inducted as an ACM Fellow in 2014 for contributions to these fields. Previously, he worked at Intel Research Berkeley, UC Berkeley (Adjunct Professor), and Sprint Labs. His work includes foundational contributions to systems like PlanetLab, P2 Declarative Networking, and the Nemesis OS. Roscoe holds a PhD from the University of Cambridge and has led projects in cloud computing, wide-area network measurement, and secure systems design. His current research emphasizes hardware-software co-design, formal verification of systems, and scalable memory architectures. Education: PhD in Computer Science, University of Cambridge (1995) Key Roles: Principal Researcher at Intel Berkeley Lab, Visiting Researcher at National ICT Australia Research Highlights: Contributions to distributed systems (PlanetLab), declarative networking (P2), and secure microkernels (seL4 integration). Current projects address challenges in disaggregated memory systems, coherent interconnects, and trustworthy embedded systems. Awards: ACM Fellow (2014), numerous grants and industry collaborations. Labs/Teams: Systems Group at ETH Zurich, focusing on OS design, hardware architectures, and formal methods.

Michael McAlpineمشاهده پروفایل

استاد

• 3D Printing
• Nanotechnology
• Biomedical Engineering
• +۴ مورد دیگر

Michael McAlpine is a Professor in the Mechanical Engineering department at the University of Minnesota . He also holds affiliations with the Biomedical Engineering and Electrical and Computer Engineering departments. His research focuses on 3D printing functional materials & devices , Nanoscale inks , Biomedical devices , Bioelectronics , and Flexible Microsystems . Research Interests : 3D Printing, Biomedical Engineering, Nanotechnology, Flexible Electronics, Microfluidics Labs : ME 361/363 Contact : mcalpine@umn.edu , (612) 626-3303, ME 117 Recent Research Trends include 3D Printed Biomedical Devices , Flexible Electronics , and Bioprinting Applications . His work spans from Spinal Organoid Formation to Programmable Drug Release Capsules . Scientific Award : Circulation Research 2020 Best Manuscript Award

Sumeet Kumar Guptaمشاهده پروفایل

دانشیار

• Neuromorphic Computing
• Low Power VLSI Design
• Emerging Nanotechnologies
• +۳ مورد دیگر

Sumeet Kumar Gupta is an Associate Professor in the Department of Electrical and Computer Engineering at Purdue University. His academic career spans from his current role to a prior Assistant Professorship at Pennsylvania State University (2014-2017) and an engineering position at Qualcomm Inc. (2012-2014). He holds a PhD in Electrical and Computer Engineering from Purdue University (2012), an M.S. from the same institution (2008), and a B.Tech in Electrical Engineering from IIT Delhi (2006). B.Tech, Electrical Engineering, IIT Delhi (2006) M.S., Electrical and Computer Engineering, Purdue University (2008) PhD, Electrical and Computer Engineering, Purdue University (2012) Dr. Gupta's research focuses on neuromorphic computing, low power variation-aware VLSI design in emerging nanotechnologies, device-circuit co-design, and nano-scale device modeling/simulations. His work addresses challenges in ferroelectric materials, crossbar arrays for deep neural networks, and energy-efficient AI hardware. Recent publications (2025-2024) highlight trends in: Ferroelectric HfO2/HZO thin films Compute-in-memory architectures Variability/stochasticity analysis Machine learning for device optimization Interconnect resistance/temperature effects AI hardware fault tolerance Scientific Awards & Recognitions: DARPA Young Faculty Award (2016) Early Career Professorship, Penn State (2014) 6th TSMC Outstanding Student Research Bronze Award (2012) Magoon Award (Purdue) Outstanding Teaching Assistant Award (Purdue, 2007) Intel PhD Fellowship (2009) His professional journey includes academic appointments at Purdue University (2020-present, Associate Professor) and Pennsylvania State University (2014-2017, Assistant Professor) after industry experience at Qualcomm Inc. (2012-2014). He maintains IEEE and EDS membership while publishing over 100 refereed works.

James C. Hoeمشاهده پروفایل

استاد

• Computer Architecture
• Reconfigurable Computing
• High-Level Hardware Design and Synthesis
• +۴ مورد دیگر

James C. Hoe is Professor of Electrical and Computer Engineering at Carnegie Mellon University (College of Engineering). He is on sabbatical at MangoBoost and directs research in computer architecture, reconfigurable computing, and high-level hardware design. Education Ph.D., Electrical Engineering and Computer Science, MIT (2000) M.S., Electrical Engineering and Computer Science, MIT (1994) B.S., Electrical Engineering and Computer Science, UC Berkeley (1992) Research Interests Professor Hoe’s work spans computer architecture , reconfigurable computing , FPGA architectures , and high-level hardware synthesis . His group created the CoRAM abstraction for virtualized FPGA computing and leads efforts in power-efficient accelerators, in-network computing, and security-oriented FPGA systems. Scientific Awards IEEE Fellow (2013) Intel Outstanding Researcher Award (2021) Research Funding & Projects Intel / VMware Crossroads 3D-FPGA Academic Research Center – co-leading exploration of FPGA roles in future datacenters. DARPA BRASS program ($2.7 M, 4 years) – ensuring long-lived software systems remain robust to resource changes. Pigasus open-source IDS – world’s fastest FPGA-accelerated intrusion-detection system (100 Gb/s on one server). Labs & Teams He heads activities within the Computer Architecture Lab at Carnegie Mellon (CALCM) , supervising graduate researchers on CoRAM++, SPIRAL autotuning, and FPGA overlays for stream processing.

• Reconfigurable Computing
• FPGA Architectures
• Computer Security
• +۶ مورد دیگر

André DeHon is the Oliver C. Boileau Jr. and Nan Eleze Boileau Professor of Electrical Engineering at the University of Pennsylvania, affiliated with Electrical and Systems Engineering (ESE) and Computer and Information Science (CIS). He chairs the Computer Engineering (CMPE) program and directs the CyberSavvy Security Center. His research focuses on reconfigurable computing, FPGA architectures, computer security, and energy-efficient hardware design. He holds a Ph.D. and M.S. from MIT and a B.S. from MIT's Lincoln School. Research interests include reconfigurable computing, FPGA interconnect, hardware security, and fault-tolerant systems. Notable achievements include the SEVER & PROTECT DARPA award and IEEE/ACM Fellowships. Recent work addresses fast FPGA compilation (HiPR, PLD), security through compartmentalization (μSCOPE, SCALPEL), and partial reconfiguration techniques. Teaching includes courses on hardware security, system-on-chip architecture, and digital audio basics. Over 200 publications span FPGA design, network-on-chip optimization, and molecular-scale computing. His labs (Implementation of Computation Group) explore physical implementation of computations through hardware-software co-design.

Ranjan Singhمشاهده پروفایل

استاد

• Terahertz (THz) Photonics
• Metamaterials
• 6G Communications
• +۶ مورد دیگر

Ranjan Singh is a Professor at the Division of Physics, Nanyang Technological University (NTU) Singapore, specializing in terahertz photonics and metamaterials. He holds an elected fellowship from OPTICA (OSA) for pioneering work in ultrafast terahertz photonics, active metamaterials, and sensors. His research focuses on hybrid THz-electronic-photonic technologies for 6G communications, topological photonics, spintronics, quantum materials, and high-Tc superconductors. Education: B.Eng. in Telecommunications (Bangalore University, 2001); M.Tech in Photonics (Cochin University, 2004); Ph.D. in Photonics (Oklahoma State University, 2009). Postdoctoral research at Los Alamos National Laboratory (2009–2013). Research emphasizes on-chip THz topological photonics for next-gen communication systems, with notable achievements including a $7M grant for TERACOMM (on-chip THz topological photonics). His work integrates AI-driven beamforming, reconfigurable metasurfaces, and phase-change materials for adaptive THz systems. Key awards include the 2020 Web of Science 'Top 1% Highly Cited Researcher' distinction. His lab, TeraX Labs (founded 2013), develops cutting-edge technologies like THz brain-computer interfaces, quantum emitters, and spintronic sensors. Over $12M in competitive grants has fueled innovations in THz integrated circuits, tunable optical coatings, and ultra-sensitive biosensors. Advancing 6G/XG wireless, Singh's team designs topological beamformers, intelligent reflecting surfaces (IRS), and terahertz metamaterials for multi-link systems. His work bridges theoretical physics and applied engineering, with a focus on energy-efficient, reconfigurable photonic systems.

Andre DeHonمشاهده پروفایل

استاد

• Reconfigurable Computing
• FPGA Architecture
• Interconnect Design
• +۶ مورد دیگر

André DeHon is the Oliver C. Boileau Jr. and Nan Eleze Boileau Professor of Electrical Engineering at the University of Pennsylvania, with affiliations in the Electrical and Systems Engineering (ESE) and Computer and Information Science (CIS) departments. He founded the Penn Computer Engineering (CMPE) program and directs the DARPA-sponsored CyberSavvy Security Center. His research spans reconfigurable computing, FPGA architecture, interconnect design, hardware security, and energy efficiency, with a focus on adapting to fabrication imperfections and runtime variability. His work explores programmable substrates (e.g., CMOS VLSI, molecular electronics) and algorithmic mappings to create resilient, efficient systems. Current projects include runtime feedback mechanisms (REFINE), partial reconfiguration (ExHiPR), and security frameworks like SCALPEL and μSCOPE. Recent publications highlight advancements in FPGA compilation (PLD, HiPR), security (SCALPEL, μSCOPE), and interconnect optimization (Asymmetry in NoC). These studies intersect computer architecture, security, and embedded systems. Scientific awards and recognitions: 2023 IEEE Fellow 2020 IEEE Mary Kenneth Keller Teaching Award 2018 ACM Fellow TCFPGA Hall of Fame (2019) Best Paper at ICFPT 2015 Academic leadership: He chairs the ACM/SIGDA Technical Committee on FPGAs and Reconfigurable Computing, previously held faculty roles at Caltech (1999–2006), and was a postdoc at UC Berkeley (1996–1999). Education includes MIT SB (1990), SM (1993), and PhD (1996) in Electrical Engineering and Computer Science.