Shiyu Su is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. His research focuses on high-speed data converters, wireless transceivers, digital phase-locked loops (PLL), and AI-assisted analog/mixed-signal design automation. He holds a Ph.D. from the University of Southern California (2019) and teaches courses such as ECE 340 (Electronic Circuits 2) and ECE 432 (Radio Frequency Integrated Devices and Circuits). Education: B.S. from Beijing University of Post and Telecommunication (China) and Queen Mary, University of London (UK), 2011; M.S. and Ph.D. from USC, 2013 and 2019, all in electrical engineering. Research Interests: High-speed ADCs/DACs RF/mm-wave transceivers Time-approximation filters (TAF) Analog/mixed-signal design automation Memristor-based computing Biomedical interfaces Key Awards: IEEE SSCS Predoctoral Achievement Award (2017–2018) Best Student Paper Award at IEEE RFIC (2022) Ming Hsieh Institute Scholar (2019–2020) Lab Focus: The Shiyu Su Lab develops integrated circuits for communications, sensing, and computing, with a focus on AI-driven methodologies and digital-analog co-design. Collaborations include work with Prof. Wei Wu (USC) on memristor-based systems.
Judith Driscoll is Professor of Materials Science at the University of Cambridge in the Department of Materials Science & Metallurgy. She holds the prestigious Royal Academy of Engineering Chair in Emerging Technologies and serves as a Visiting Staff Member at Los Alamos National Laboratory. As the founding Editor-in-Chief of APL Materials, she has significantly contributed to the materials science community. Dr. Driscoll's research focuses on Energy Efficient Oxide Materials for Information and Communications Technologies and energy devices. Her work spans the development of non-volatile memory, resistive switching devices, and ferroelectric materials for neuromorphic computing applications. She investigates oxide thin films for applications ranging from data storage to energy generation and conversion, with particular emphasis on creating more energy-efficient device technologies to handle the exponential growth of data-centric applications. Her recent publications demonstrate strong trends in developing novel oxide-based memory devices with improved energy efficiency, particularly for AI applications. The work shows significant progress in hafnium-zirconium oxide ferroelectrics, resistive switching mechanisms, and vertically aligned nanocomposite structures for enhanced device performance. These innovations address critical challenges in reducing the unsustainable energy demands of modern computing, particularly for artificial intelligence systems. Fellow of the Royal Academy of Engineering Fellow of the Materials Research Society Fellow of the American Physical Society Fellow of IOM3, IOP, and Women Engineers Society Fellow of the American Academy of Arts and Sciences Recipient of ERC Advanced Grant Editor-in-Chief of APL Materials Dr. Driscoll leads a vibrant research group that has secured significant funding including her Royal Academy of Engineering Research Chair, an ERC Advanced Grant, and an ECCS-EPSRC grant in collaboration with researchers from the USA. She has founded the Cambridge Centre for Neuromorphic Computing (Neucam) in 2023. Her group operates world-leading growth equipment including pulsed laser deposition with RHEED control, high temperature oxide sputtering, and spatial ALD systems. She collaborates extensively across the University of Cambridge and with international partners to solve complex materials challenges, with her group's role often being to identify optimal materials for functional goals, predict fabrication methods, and then create and characterize these materials.
Manoj Sachdev is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo, Faculty of Engineering. His research focuses on semiconductor devices, low-power electronics, and secure hardware systems. He leads projects in flexible electronics, nanotechnology, and radiation-hardened circuits, with applications in displays, memory technologies, and biomedical sensors. His work integrates advanced materials science with circuit design to address challenges in energy efficiency and security. Education: Not explicitly stated in provided text. Research interests span thin-film transistors (TFTs), resistive switching memories, neuromorphic computing, and physically unclonable functions (PUFs). Recent efforts include developing low-power circuits for flexible substrates and secure microprocessors. His contributions to semiconductor device physics and integration techniques have advanced applications in wearable electronics and medical diagnostics. Publications highlight innovations in low-power flip-flops, energy-efficient display drivers, and memristor-based systems. He collaborates on interdisciplinary projects combining photonics, nanoelectronics, and biomedical engineering. Awards: None explicitly listed in provided text. Grants and advising: Advises on semiconductor fabrication, secure hardware design, and radiation effects in electronics. Leads research groups focused on next-generation memory technologies and flexible integrated systems. Labs/Teams: Active in the University of Waterloo's semiconductor and flexible electronics research clusters, contributing to both academic and industry partnerships.
Jingtong Hu is an Associate Professor at the Swanson School of Engineering, University of Pittsburgh, where he also holds the William Kepler Whiteford Faculty Fellowship. His research focuses on Cyber-Physical Systems and Infrastructure Security, with significant contributions to embedded systems, non-volatile memory architectures, and hardware/software co-design for energy-constrained environments. Dr. Hu received his PhD from the University of Texas at Dallas (2007-2013) and his Bachelor of Engineering from Shandong University (2003-2007). His research spans multiple interdisciplinary areas including energy harvesting systems, non-volatile processors, FPGA acceleration, and machine learning at the edge. His recent publications demonstrate a strong focus on algorithm-hardware co-design, particularly for vision transformers, federated learning, and non-volatile memory systems. His work often addresses the challenges of implementing AI on resource-constrained edge devices, with emphasis on energy efficiency, reliability, and performance optimization. The trend in his publications shows increasing focus on sustainable AI processing, heterogeneous computing architectures, and personalized machine learning for IoT applications. Selected Awards: IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award (2021) ACM SIGDA Meritorious Service Award (2019) Multiple Best Paper Award nominations at top conferences including DAC, ASP-DAC, and CODES+ISSS Dr. Hu's research has been supported by multiple grants focusing on energy-efficient computing, non-volatile memory systems, and hardware acceleration for machine learning. His collaborative work spans numerous institutions and involves interdisciplinary teams working at the intersection of computer architecture, embedded systems, and artificial intelligence. His publications show extensive collaboration with researchers at the University of Pittsburgh, particularly with Albert K. Jones and Yiyu Shi. His laboratory work focuses on implementing practical systems for energy harvesting powered devices, non-volatile processors, and hardware accelerators for machine learning applications. Current projects appear to emphasize sustainable AI processing at the edge, heterogeneous FPGA acceleration, and personalized federated learning for health monitoring applications.
H.-S. Philip Wong is the Willard R. and Inez Kerr Bell Professor in the School of Engineering at Stanford University, where he has been since 2004. He holds the rank of Professor in the Department of Electrical Engineering and serves as the Director of the Stanford Nanofabrication Facility. Prior to Stanford, he spent 16 years at IBM’s T.J. Watson Research Center and served as Vice President of Corporate Research at TSMC (2018–2020), remaining as Chief Scientist in an advisory role thereafter. Leadership roles include founding the Stanford SystemX Alliance and leading the Microelectronics Commons AI Hardware Hub funded by the CHIPS Act. Research focuses on nanotechnology, semiconductor devices, and next-generation computing architectures, including carbon nanotube electronics, 3D integration (N3XT/MOSAIC), and neuromorphic computing. Awarded IEEE Fellow (2001), the IEEE Andrew S. Grove Award, and the J.J. Ebers Award for contributions to electron devices. His work spans device physics, fabrication, and system integration, with over 600 publications. Key contributions include advancements in phase-change memory, carbon nanotube transistors, and compute-in-memory systems. He advises numerous students and collaborates with industry through initiatives like the Stanford Non-Volatile Memory Technology Research Initiative. Recent efforts emphasize AI hardware acceleration, cryo-CMOS for quantum computing, and scalable memory architectures. His lab innovations include CellChips for synthetic biology and hyperdimensional computing using 3D RRAM.
Soheil Salehi is a tenure-track Assistant Professor in the Department of Electrical and Computer Engineering at the University of Arizona, with a joint appointment in Systems and Industrial Engineering. He is the Director of the Privacy-preserving, Intelligent, and Secure Computing (PRISM) Lab, established in August 2022. Prior to this, he was an NSF-Sponsored Computing Innovation Fellow and Postdoctoral Research Fellow at the University of California, Davis. Ph.D., Electrical and Computer Engineering, University of Central Florida, 2020 M.S., Electrical and Computer Engineering, University of Central Florida, 2016 B.S., Isfahan University of Technology, Iran, 2014 Dr. Salehi's research focuses on the intersection of hardware, AI, and security. His work spans hardware and AI-enabled security in IoT , Generative AI for hardware design and security , neuromorphic and biologically-inspired AI hardware , emerging spin-based devices , reconfigurable architectures , low-power VLSI circuits , and digital twins and mixed reality for semiconductor workforce development . He also explores the application of Generative AI in personalized education . His recent publications, spanning 2023–2025, reveal a strong trend toward integrating AI and machine learning into hardware security and design. Key themes include automated secure IC design flows , AI-driven hardware obfuscation , firmware and side-channel attack analysis , security in neuromorphic and spiking neural networks , and educational frameworks using digital twins and generative models . His work appears in top venues like DAC, ICCAD, USENIX Security, IEEE TCAS-I, and ISCAS. Outstanding Reviewer Award, IEEE/ACM Design Automation Conference (DAC), 2023 Best Presentation of the Symposium Award, UC Davis Postdoctoral Research Symposium, 2021 UCF Excellence by a Graduate Teaching Assistant (University-Level), 2016 Nominated for 30-under-30 Award, UCF, 2020 Nominated for Postdoctoral Research Excellence Award, UC Davis, 2022 Dr. Salehi has secured significant research funding as PI and Co-PI, including a $300K NSF SaTC EAGER grant on Generative AI-based Personalized Cybersecurity Tutor, a $174,000 University of Arizona PIF Award, and multiple RII grants totaling over $198K. He has also received industry funding from CHEST. He actively mentors students and leads the PRISM Lab, which focuses on privacy-preserving and intelligent secure computing. His service includes roles as Technical Program Committee (TPC) Member and Session Chair at premier conferences such as DAC, ICCAD, CCS, NDSS, and GLSVLSI. The PRISM Lab, under his direction, conducts cutting-edge research in secure and intelligent hardware systems, with applications in IoT, edge computing, and workforce development. The lab emphasizes interdisciplinary collaboration and innovation in both research and education.
Prof. Baker Mohammad serves as Professor and Director of the System on Chip Lab in the Department of Computer and Information Engineering at Khalifa University. With over 15 years of industrial experience at Intel and Qualcomm designing microprocessors and DSP chips, he bridges academic research with real-world engineering challenges in high-performance computing and low-power systems. His educational background includes: Ph.D. in Electrical and Computer Engineering, University of Texas at Austin (2008) M.S. in Electrical and Computer Engineering, Arizona State University B.S. in Electrical Engineering, University of New Mexico Dr. Mohammad's research spans cutting-edge domains where VLSI design converges with AI acceleration and emerging memory technologies . His work pioneers Memristor applications in environmental sensing (radiation, vacuum, glucose) and neuromorphic computing, while advancing energy harvesting systems for wearable electronics. The integration of in-memory computing with security primitives represents a paradigm shift in hardware design, moving beyond traditional CMOS limitations. His publication trajectory reveals accelerating focus on self-powered neuromorphic systems and RRAM-based architectures, with recent work (2021-2023) emphasizing hardware-software co-design for edge AI. Over 75% of his recent publications involve cross-disciplinary collaborations spanning materials science, chemistry, and biomedical engineering. Notable scientific recognition includes: IEEE TVLSI Best Paper Award 2016 IEEE MWSCAS Myrill B. Reed Best Paper Award Qualcomm Qstar Award for Performance Leadership KUSTAR IP Excellence Award Multiple SRC Techon Best Session Papers As a dedicated mentor, he has supervised over 15 graduate students while securing competitive funding from Khalifa University, ADEK, Qualcomm, Tii, and UAE space agencies. His grant portfolio demonstrates exceptional translational impact, converting fundamental research in memristive devices into drone flight computers and medical sensors. Current projects integrate academic rigor with industrial deployment timelines. The System on Chip Lab operates as a multidisciplinary hub where semiconductor physicists collaborate with AI researchers to develop RISC-V-based secure processors and piezoelectric nanogenerator systems. Recent expansions include partnerships with Tii for aerospace applications and medical device startups for glucose monitoring technology.
Nam Sung Kim is the W. J. "Jerry" Sanders III-Advanced Micro Devices Inc. Endowed Chair and holds a Professorship in Electrical and Computer Engineering at the University of Illinois. He is also affiliated with the Siebel School of Computing and Data Science, Coordinated Science Lab, and National Center for Supercomputing Applications (NCSA). His research focuses on computer architecture, memory systems, chiplet integration, and hardware security. Key areas include energy-efficient computing, processing-in-memory (PIM), and mitigating hardware vulnerabilities like rowhammer attacks. Kim has received prestigious awards including IEEE Fellow (2016), MICRO Hall of Fame (2018), NAI Fellow (2023), and NSF CAREER Award (2015). His work spans publications in top venues like ASPLOS and IEEE journals, addressing topics such as CXL-based memory systems, DRAM module optimization, and GPU architecture improvements. Collaborations emphasize interdisciplinary research in hardware-software co-design and emerging technologies. His labs and teams at Coordinated Science Lab and NCSA drive innovations in scalable computing, near-memory processing, and cloud infrastructure for AI workloads. Ongoing projects include developing resilient memory hierarchies and accelerating large-scale machine learning models through novel architecture designs.
Jeehwan Kim is an Associate Professor in Mechanical Engineering and Materials Science and Engineering at MIT. He joined the Mechanical Engineering faculty in 2015 and became a joint faculty member in DMSE in 2016. His research focuses on nanotechnology for computing/electronics, electronic/photonic devices, neuromorphic computing, and heterogeneous integration. He holds over 100 patents from IBM and has received awards like the Samsung Fellow (2022) and DARPA Director’s Award (2021). Education : BS (Hongik University), MS (Seoul National University), PhD (UCLA), all in Materials Science and Engineering. Research Interests : Kim’s group innovates in 2D materials, remote epitaxy, neuromorphic systems, and next-gen electronics. Key areas include monolithic 3D integration, bioelectronic devices, and energy-efficient semiconductors. His work bridges material physics with practical device applications. Awards : Samsung Fellow (2022) DARPA Director’s Award (2021) Young Faculty Award (2019) IBM Faculty Award (2016) IBM Master Inventor (2012) Labs/Teams : Jeehwan Kim Research Group at MIT, focusing on advanced material synthesis and device engineering. Active in cross-disciplinary projects involving AI and semiconductor innovation.
Tosiron Adegbija is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Arizona, where he serves as Director of Graduate Studies and Thomas R. Brown Endowed Fellow. He is a member of the Graduate Faculty and actively contributes to research and teaching in computer architecture and embedded systems. Education: PhD in Electrical and Computer Engineering, University of Florida, 2015 MS in Electrical and Computer Engineering, University of Florida, 2011 BS in Electrical Engineering, University of Ilorin, Nigeria, 2005 His research centers on energy-efficient computing with a focus on bio-inspired computer architecture , including spiking neural network (SNN) accelerators and in-memory computing. He also explores domain-specific architectures , adaptable memory systems , and microprocessor optimizations for IoT . His work leverages novel memory technologies like STT-RAM to enhance performance and reduce energy consumption in embedded and resource-constrained systems. Recent publications highlight trends in hybrid SNN acceleration, domain-specific accelerator generation, and system-level design space exploration. His research is increasingly focused on neuromorphic computing, automated hardware design, and ultra-efficient architectures using emerging materials like antiferromagnetic tunnel junctions. Scientific Awards: National Science Foundation (NSF) CAREER Award (2019) Elected IEEE Senior Member (2020) Best Paper Award at IEEE ISVLSI (2014) Teaching Award, University of Arizona (2018) ACM GLSVLSI Travel Award (2015) He advises numerous graduate and undergraduate students, many of whom have pursued careers at institutions like Pacific Northwest National Labs, Micron Technology, and Amazon. He has secured significant funding, including a $1.9M NSF FuSE2 grant for energy-efficient computing. His lab collaborates with UA Physics, CMU, and UNL. He has also developed educational tools for Chipyard and RISC-V, supporting hands-on learning in computer architecture. Labs and Research Teams: Leads a research group focused on bio-inspired and domain-specific computing, fostering innovation in energy-efficient hardware. The lab emphasizes hardware/software co-design, neuromorphic engineering, and real-world deployment in IoT and biomedical applications.
Prof. Dr. Amelie Hagelauer holds a professorship in Micro- and Nanosystem Technology at the TUM School of Computation, Information and Technology, Technical University of Munich. Her work focuses on advanced electronics and systems integration across quantum computing hardware, resistive memory technologies, and high-frequency RF systems. She has contributed to innovations in superconducting qubit readout architectures, multi-level RRAM designs, and 3D-integrated CMOS-compatible quantum devices. Research interests span quantum hardware design, nanoelectronic devices, RF front-end systems, and emerging memory technologies. Her work emphasizes practical implementation challenges such as low-power operation, high-voltage handling in RF switches, and wafer-scale fabrication processes. Recent projects include D-band radar systems, energy-efficient 60 GHz transceivers, and antenna tuning solutions for 5G applications. Publications from 2023-2025 showcase advancements in resistive switching device characterization, mitigation of TLS losses in superconducting qubits, and reconfigurable AI accelerators using RRAM-based digital twins. Her work bridges theoretical device physics with practical integrated circuit design, addressing scalability and reliability in next-gen electronics. Awards and grants: None explicitly listed in provided texts. Active collaborations include EU-funded projects on quantum computing platforms and TUM's Electronic Photonic Integration initiatives. Leads research teams in microsystem technology with emphasis on cross-disciplinary approaches combining CMOS processes, MEMS, and quantum engineering.
Prof Aaron Thean is the Deputy President (Academic Affairs) and Provost at the National University of Singapore (NUS). Formerly, he served as Dean of the College of Design and Engineering at NUS and held senior roles at IMEC (Belgium) as Vice President of Logic Technologies and Director of Logic Devices Research. His expertise spans advanced semiconductor device technologies, including FinFETs, nanowire FETs, III-V/Ge channels, and emerging beyond-CMOS architectures. He holds degrees from the University of Illinois Urbana-Champaign (B.Sc., M.Sc., Ph.D. in Electrical Engineering) and has published over 300 papers with 50+ patents. His awards include the Gregory Stillman Award (2001) and Compound Semiconductor Innovation Award (2014). Research interests focus on semiconductor innovation, device-process co-optimization (DTCO), and monolithic 3D integration. Notable contributions include industry-first Gate-First HKMG technologies, advanced strained silicon platforms, and neuromorphic computing hardware. His work bridges academia and industry through collaborations with Qualcomm, IBM, and foundry partners. Current initiatives emphasize energy-efficient computing and wearable sensor systems. Prof Thean’s leadership spans NUS-wide academic strategy and global research partnerships. His technical legacy includes foundational advancements in transistor scaling, low-power CMOS design, and AI-driven failure analysis methodologies.
Deji Akinwande is a Professor and holds the Cockrell Family Regents Chair in Engineering #8 at The University of Texas at Austin's Chandra Family Department of Electrical and Computer Engineering. He earned his PhD in Electrical Engineering from Stanford University (2009) and an MS in Applied Physics from Case Western Reserve University. His research focuses on 2D materials, nanotechnology, and flexible electronics, with breakthroughs in atomristors, graphene-based biosensors, and wearable electronic tattoos. Key achievements include pioneering work on silicene, being elevated to IEEE Fellow (2021), and receiving the PECASE Award (Obama administration). His lab, the Akinwande Nano Research Group, explores nanoelectronics, bioelectronics, and RF systems for societal applications like health monitoring and 6G communications. Education: PhD, Electrical Engineering, Stanford University, 2009 MS, Applied Physics, Case Western Reserve University Awards: 2021 IEEE Fellow APS Fellow (2017) PECASE Award Moore Inventor Fellowship His research spans neuromorphic computing, flexible sensors, and energy-efficient memory devices. Over 100+ publications highlight his work on graphene, MXenes, and 2D material applications. He co-authored a textbook on carbon nanotubes and graphene (Cambridge University Press, 2011) and serves as an IEEE Distinguished Lecturer and editor for Nature NPJ 2D Materials . Lab and Collaborations: The Akinwande Nano Lab develops scalable 2D electronics, wearable health monitors, and next-gen RF components. Recent grants include NSF CHIPS Act funding and DoD support for 6G switches and neuromorphic hardware.
Aishwarya Ganesan is an Assistant Professor at the Siebel School of Computing and Data Science, University of Illinois Urbana-Champaign. Her research focuses on distributed systems, storage systems, and fault tolerance mechanisms, with emphasis on high-performance computing and datacenter infrastructure. She leads projects addressing challenges in replicated storage, consensus protocols, and system resilience. Her work explores fault tolerance in disaggregated datacenters, log abstractions for low-latency applications, and novel replication strategies for modern storage systems. She has developed frameworks like LazyLog and IONIA to improve system efficiency and reliability. Her research also extends to automatic reliability testing for cluster management controllers and analyzing distributed storage vulnerabilities. Key contributions include demonstrating how redundancy alone does not guarantee fault tolerance, and proposing consistency-aware durability mechanisms for storage systems. She received the NSF CAREER Award in 2024 for her research on storage-aware fault tolerance. Her work spans 21 peer-reviewed publications, with notable contributions in conferences like SOSP, EuroSys, and FAST. Current projects investigate fault tolerance in emerging memory technologies and system recovery protocols for consensus-based storage.
Sandip Tiwari is the Charles N. Mellowes Professor in Engineering at Cornell University, leading the School of Applied and Engineering Physics. He holds a B.Tech in Electrical Engineering from IIT Kanpur (1976), M.Eng from Rochester Institute of Technology (1977), and a Ph.D. in Electrical Engineering from Cornell (1980). His research bridges semiconductor electronics/optics and nanotechnology, emphasizing cross-scale integration of devices and systems. He directs the U.S. National Nanotechnology Infrastructure Network (NNIN) and has held visiting roles at Stanford, Harvard, Columbia, and the University of Paris-Sud. Notable honors include the IEEE Cledo Brunetti Award, APS Fellowship, and IIT Kanpur's Distinguished Alumnus Award. Education: IIT Kanpur (B.Tech), Rochester Polytechnic Institute (M.Eng), Cornell (Ph.D.) Affiliations: NNIN Director, IEEE Transactions on Nanotechnology (founding editor), multiple visiting professorships Research focuses on nanoscale device physics, quantum phenomena in electronics, and societal applications of nanotechnology. His work integrates engineering principles with physical sciences to address challenges in scalable electronic systems and MEMs. Awards highlight his contributions to semiconductor physics and nanotechnology, including recognition from IEEE, APS, and IIT Kanpur. He also promotes global scientific collaboration through education initiatives and NNIN.
