Shiyu Su is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. His research focuses on high-speed data converters, wireless transceivers, digital phase-locked loops (PLL), and AI-assisted analog/mixed-signal design automation. He holds a Ph.D. from the University of Southern California (2019) and teaches courses such as ECE 340 (Electronic Circuits 2) and ECE 432 (Radio Frequency Integrated Devices and Circuits). Education: B.S. from Beijing University of Post and Telecommunication (China) and Queen Mary, University of London (UK), 2011; M.S. and Ph.D. from USC, 2013 and 2019, all in electrical engineering. Research Interests: High-speed ADCs/DACs RF/mm-wave transceivers Time-approximation filters (TAF) Analog/mixed-signal design automation Memristor-based computing Biomedical interfaces Key Awards: IEEE SSCS Predoctoral Achievement Award (2017–2018) Best Student Paper Award at IEEE RFIC (2022) Ming Hsieh Institute Scholar (2019–2020) Lab Focus: The Shiyu Su Lab develops integrated circuits for communications, sensing, and computing, with a focus on AI-driven methodologies and digital-analog co-design. Collaborations include work with Prof. Wei Wu (USC) on memristor-based systems.
Trevor Brown is an Associate Professor in the Computer Science department at the University of Waterloo, affiliated with the Cheriton School of Computer Science. He leads the Multicore Lab and specializes in concurrent data structures, non-blocking algorithms, and memory management. His research bridges theory and systems, focusing on practical implementations of lock-free trees, transactional memory, and techniques for non-uniform memory architectures. Education includes a PhD in Computer Science from the University of Toronto and a B.Sc. in Computer Science and Mathematics from York University. Research interests center on concurrent systems, with recent work exploring hardware-accelerated indexing, memory reclamation techniques, and performance anomalies in microbenchmarks. His publications demonstrate consistent innovation in parallel computing, with articles frequently appearing at top conferences like PPoPP, SPAA, and DISC. Sustainable energy research includes optimizing hybrid power systems and battery storage solutions. Awards include multiple best paper/artifact recognitions at SPAA and PPoPP, teaching excellence honors, and nominations for the Governor General’s Gold Medal. Extensive advising includes 13+ graduate students and PDFs, with research grants exceeding $965K from NSERC, Huawei, and CFI. He directs the Multicore Lab, developing open-source tools like SetBench for rigorous performance benchmarking.
Sebastian U. Stich is a tenured Professor at CISPA Helmholtz Center for Information Security and a member of the European Lab for Learning and Intelligent Systems (ELLIS). His research focuses on optimization for machine learning, collaborative learning (distributed, federated, and decentralized methods), efficient optimization techniques, adaptive stochastic methods, and privacy/security in machine learning. Recent appointments include ERC Consolidator Grant 2024 for the CollectiveMinds project. Key contributions in federated/decentralized learning, uncertainty estimation, and communication-efficient optimization. Active in workshop organization, including the Optimization for Machine Learning workshop at NeurIPS 2024. Teaching modern optimization methods at Saarland University (2023-2025). His work has been recognized with awards such as the Google Research Scholar Award (2023) and Meta Privacy-Enhancing Technologies Award (2022) . His research group includes postdocs Dr. Anton Rodomanov and Dr. Rotem Mulayoff, and PhD students Xiaowen Jiang and Yuan Gao.
Rainer Gemulla is a Professor of Practical Computer Science I: Data Analytics at the University of Mannheim, heading the Data and Web Science Group within the School of Business Informatics and Mathematics. He has been a W3-Professor at the University since 2014, following positions as a senior researcher at Max-Planck-Institut für Informatik (2010-2014) and postdoctoral researcher at IBM Almaden Research Center (2008-2010). His research focuses on machine learning with structured and semi-structured data, particularly knowledge graphs, and developing efficient systems for data-intensive processing. Professor Gemulla's research spans multiple areas including machine learning with structured data (relational data), machine learning with semi-structured data (multi-relational graphs), combining these approaches with unstructured knowledge (text), and developing efficient, scalable methods for data-intensive processing. His work bridges theoretical foundations with practical implementations, as evidenced by numerous open-source software projects including LibKGE, DistKGE, and AdaPM. His recent publications show a strong trend toward knowledge graph embeddings, parameter server architectures, and efficient training methods. The research demonstrates increasing focus on scalability challenges in graph learning, with particular attention to hyperparameter optimization, dynamic resource allocation, and benchmarking methodologies. His work consistently addresses the practical challenges of implementing machine learning systems at scale. Distinguished Reviewer Award at SIGMOD, 2025 Distinguished PC Member Award at EDBT, 2023 Outstanding Reviewer Award at NeurIPS, 2021 Junior-Fellow of the Gesellschaft für Informatik (GI), 2013 IBM's 2011 Pat Goldberg Memorial best paper award Best paper of NIPS 2011 Biglearn workshop Professor Gemulla actively mentors PhD students and has supervised numerous successful doctoral candidates. His leadership extends to administrative roles including Head of examination board for MSc Business Informatics since 2017, and previously serving as Study dean of the WIM faculty (2016-2019) and CIO of University of Mannheim (2022-2024). His research is supported by grants including AWS in Education Research Grant Award (2013) and Google Focused Research Award (2011). The Data and Web Science Group develops multiple open-source software projects including LibKGE (knowledge graph embedding library), DistKGE (multi-GPU training), AdaPM (adaptive parameter manager), Lapse (parameter server), and various tools for information extraction and sequence mining. The group maintains active collaborations with industry partners and academic institutions worldwide, particularly in the areas of knowledge graph research and scalable machine learning systems.
Manolis G.H. Katevenis is a Professor at the Department of Computer Science, University of Crete, and Deputy Director and Head of the Computer Architecture and VLSI Systems (CARV) Laboratory at the Institute of Computer Science (ICS), Foundation for Research & Technology - Hellas (FORTH). He co-founded the European Research Center on Computer Architecture (EuReCCA) and is a founding partner of the European Network of Excellence on High-Performance and Embedded Architecture and Compilation (HiPEAC). PhD in Computer Science from University of California, Berkeley (1983) Co-founder of EuReCCA (2011) Contributed to RISC architecture (1980-1983), interconnection networks (1985-2011), and parallel computing (1993-2010) His research spans Scalable Multicore Systems , Interconnection Network Architecture , Packet Switch Design , Computer Architecture , and VLSI Systems . He has made foundational contributions to per-flow queueing, backpressure mechanisms, and wormhole IP over ATM, with applications in internet routers, data centers, and supercomputers. His publications focus on high-radix crossbar switches, flow control algorithms, and explicit interprocessor communication. Notable scientific awards include: ACM Doctoral Dissertation Award (1984) David J. Sakrison Memorial Prize (1983) IBM PhD Fellowship (1981-1983) Greek State Fellowship (1973-1978) He has supervised 40 graduate theses and participated in 22 R&D projects totaling €9M, including HiPEAC (coordinator of interconnection networks), SARC (FPGA prototype design), and ENCORE (cache-optimized remote DMA). His work has received over 2000 citations, with an h-index of 23.
Kévin Bailly is a Lecturer at Sorbonne University, affiliated with the Institute of Intelligent Systems and Robotics (ISIR) and part of the Machine Learning and Artificial Intelligence (MLIA) team. His research focuses on computer vision, deep learning, and their applications in facial expression recognition, neural network optimization, and medical imaging. Dr. Bailly's research interests span multiple areas including: Computer Vision and Image Analysis Deep Learning and Neural Network Optimization Facial Expression and Action Unit Recognition Model Compression and Quantization Techniques Medical Applications of Artificial Intelligence His recent publications demonstrate a strong focus on neural network optimization, with particular emphasis on quantization, pruning, and compression techniques that maintain model performance while reducing computational requirements. His work spans both theoretical advancements in deep learning and practical applications in healthcare, human-computer interaction, and affective computing. He has developed novel approaches like PowerQuant for non-uniform quantization, RULe for real-time face alignment in degraded conditions, and RED++ for data-free pruning of deep neural networks. Dr. Bailly has published extensively in top-tier venues including ICLR, NeurIPS, IEEE TPAMI, and IEEE TAC, with a consistent output of high-impact research from 2022-2024. His work bridges theoretical computer vision with practical applications, particularly in medical diagnostics and human-computer interaction systems. He actively collaborates with researchers across multiple institutions, including Arnaud Dapogny, Edouard Yvinec, and Matthieu Cord, and has contributed to interdisciplinary projects that apply AI techniques to medical domains such as fracture classification and obstetrics.
Trevor Brown is an Associate Professor in the Department of Computer Science at the University of Waterloo. Previously, he held positions as an Assistant Professor at the same institution, and completed postdoctoral research at the Institute of Science and Technology (IST) Austria under Dan Alistarh, and at the Technion – Israel Institute of Technology under Hagit Attiya. He earned his PhD from the University of Toronto under Faith Ellen's supervision, where he was part of the theory group. His research focuses on concurrent data structures, particularly lock-free algorithms, transactional memory, non-volatile memory systems, and techniques for non-uniform memory architectures (NUMA). He leads the UW Multicore Lab, which explores high-performance parallel computing and distributed systems. His work emphasizes rigorous experimental validation and practical implementations, reflected in extensive open-source code repositories. Brown has taught courses including CSC798 (Multicore Programming) and CSC341 (Algorithms), and has served as a teaching assistant for multiple computer science courses at the University of Toronto and York University. He maintains active collaborations through implementations of concurrent data structures (e.g., lock-free (a,b)-trees, B-slack trees) and benchmarks in the Setbench project.
Rodrigo Miragaia Rodrigues is a full professor at the Instituto Superior Técnico (ULisboa) and a researcher at INESC-ID since 2015. He previously held roles as an associate professor at Universidade Nova de Lisboa, tenure-track faculty at MPI-SWS, and completed his PhD at MIT in 2005 under Barbara Liskov. Education: PhD in Computer Science, MIT, 2005 Research Interests: Focuses on distributed systems, fault-tolerant computing, cloud infrastructure, and consistency models. His work bridges theoretical foundations and practical implementations, addressing challenges in geo-replication, secure analytics, and resource allocation in serverless environments. He emphasizes scalable systems and resilient data management. Awards: Best Paper Award at SOSP ERC Starting Grant Google Faculty Research Award Advising & Grants: Has advised 7 PhD students as main advisor, with graduates in top institutions like Purdue, TU Munich, and USTC. Secured funding from the European Research Council (ERC) and Google, focusing on projects like DependableCloud (ERC Grant 307732). Labs & Teams: Leads research at INESC-ID and previously directed the Dependable Systems Group at MPI-SWS. Active in academic leadership roles, including President of the Scientific Council at IST.
Mikael Östling is a Professor at KTH Royal Institute of Technology, holding a position in the Division of Electronics and Embedded Systems within the School of Information and Communication Technology. He earned his MSc (1980) and PhD (1983) in engineering physics from Uppsala University. Since 1984, he has been a faculty member at KTH, serving as Deputy President (2017–2022), Dean of the School of ICT (2004–2012), and Head of the Department of Microelectronics and Information Technology (2000–2004). He has held visiting roles at Stanford University and the University of Florida. His research focuses on silicon/silicon germanium devices, wide bandgap semiconductors (e.g., silicon carbide), and high-power/high-frequency applications. He has authored over 600 papers, 10+ book chapters, and a textbook. Key achievements include co-founding TranSiC (2005), securing the ERC Advanced Investigator Grant (2009), and serving as Editor-in-Chief of IEEE Journal of Electron Devices Society (2016–2019). He is an IEEE and ECS Fellow. Östling has supervised 50 PhD theses and contributed to innovations like high-temperature silicon carbide circuits and graphene-based sensors. His work spans academic leadership, industry collaboration, and global research advisory roles in EU frameworks and the European Research Council.
Carlos Molina Clemente is an Associate Professor of Computer Architecture at Rovira i Virgili University in Tarragona, Spain. He holds a M.Sc. in Computer Engineering (Universitat Politècnica de Catalunya, 1996) and a Ph.D. in Computer Science (UPC, 2005). His research focuses on Computer Architecture, Mobile/Sensor Networks, and Cloud Computing. He leads the Cloudlab research group and coordinates initiatives like GTDAWIN and BIOGEI. Key research areas include multicore scheduling, LoRaWAN protocols, LIDAR data analysis, and serverless computing. He has published over 50 articles in top-tier conferences/journals and supervised three doctoral theses. His work spans projects on cache architectures, real-time systems, and educational multicomputing solutions. Affiliations include the Department of Computer Engineering and Mathematics (DEIM) at URV, with offices at Campus Sescelades (Avinguda Països Catalans 26, Tarragona). Research highlights include contributions to non-uniform cache policies, predictive mobile network algorithms, and energy-efficient sensor networks.
Andrey I. Lyakhov is a Professor and Doctor of Computer Science at the Institute for Information Transmission Problems of the Russian Academy of Sciences. He serves as the Head of Laboratory №18 and has been active since 1959. His research focuses on wireless networks, particularly IEEE 802.11 and 802.16 protocols. Position: Laboratory Chief Affiliation: Institute for Information Transmission Problems, Russian Academy of Sciences Research Interests: Wireless Networks, MAC Protocol Analysis, Network Performance, Distributed Control, Multicast QoS, Channel Assignment His work includes analytical modeling of data transmission, beaconing in mesh networks, and studies on network unfairness and congestion. He has contributed to patents in wireless sensor networks and piconet beacon management. Notable publications span wireless LANs, WiMAX, and sensor network optimization. Lyakhov's research has involved collaborations with international conferences and journals, focusing on throughput estimation, channel contention, and quality of service in wireless systems. Recent publications include studies on bandwidth piggybacking (2010), intra-flow interference in mesh networks (2010), and multicast QoS support in WLANs (2007). Earlier works from 1983-2008 cover foundational topics in queueing theory, cache efficiency, and distributed control systems.
Eduard Ayguade Parra is a Full Professor in the Department of Computer Architecture at the Universitat Politècnica de Catalunya (UPC), Faculty of Computer Science of Barcelona (FIB). He is a leading researcher in the UPC PM - Programming Models group and maintains a significant affiliation with the Barcelona Supercomputing Center (BSC-CNS), a premier national supercomputing facility. His primary research interests lie in High-Performance Computing (HPC) , with a deep focus on parallel and distributed architectures , programming models (especially task-based models like OmpSs), multicore and multiprocessor systems , and compilers for high-performance architectures . His work bridges hardware and software to optimize performance for complex computational problems. The trends in his recent publications highlight a sustained and evolving research program. He is actively advancing task-based programming for distributed memory and hybrid systems, exploring FPGA acceleration for key HPC kernels like SpMV, and innovating in memory system design, including active compute memory and hybrid memory object placement. His research also extends into applying AI techniques to hardware reliability and creating high-quality datasets for computer vision evaluation. HiPEAC Paper Award 2024 Professor Ayguade has been instrumental in securing and leading numerous competitive and non-competitive R&D+i projects, often funded by national and European programs. He has advised a significant number of doctoral students, whose theses cover topics such as task-based programming, FPGA acceleration, HPC compilers, and machine learning for systems. His collaborations are extensive, with frequent co-authorship with prominent figures at UPC and BSC-CNS, such as Jesús Labarta and Mateo Valero. His research has led to advancements in runtime systems, compiler technology, and FPGA-based acceleration. He is a core member of the UPC PM - Programming Models research group and his work is deeply integrated with the resources and mission of the Barcelona Supercomputing Center (BSC-CNS), one of Europe's leading institutions in supercomputing.
Supratim Biswas is a Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Bombay, where he has served since 1995. His academic career spans over four decades, beginning as a Lecturer in the Computer Center in 1980, progressing to Assistant Professor in 1985, Associate Professor in 1990, and achieving full Professorship in 1995. He has held significant administrative roles including Dean of Academic Programs (2007-2010), Head of CSE Department (2000-2003), and Director of IITB-Monash Academy (2009-2010). His research interests focus on Programming Languages, Compiler Optimization, Parallelizing Compilers, Parallel and Distributed computing, and Combinatorial Optimization . Professor Biswas has made substantial contributions to compiler technology, particularly in parallelization techniques for modern architectures. His work bridges theoretical compiler design with practical applications in high-performance computing and CAD systems, demonstrating how compiler optimizations can significantly enhance computational efficiency in real-world applications. The publication record shows a consistent research trajectory spanning nearly four decades, with recent work (2012-2015) focusing on GPU-based parallel algorithms, loop parallelization techniques for non-uniform data dependencies, and mesh processing for CAD applications. His research demonstrates evolution from foundational compiler theory to contemporary parallel architectures, maintaining relevance through practical applications in computational geometry, CAD systems, and high-performance computing. Excellence in Teaching Award (2000) Professor Biswas has supervised over 60 doctoral and master's students, establishing himself as a dedicated mentor in systems software education. His sponsored research portfolio includes significant projects with CDAC (350 lacs), MIT (133 lacs), TCS (81.3 lacs), and Intel Corporation (10 lacs), demonstrating strong industry-academic collaboration. His teaching portfolio spans both undergraduate and postgraduate levels, including foundational courses like Discrete Structures and advanced topics like Parallelizing Compilers, reflecting his commitment to curriculum development across multiple generations of computer science education. His laboratory work has supported students across B.Tech, M.Tech, and Ph.D. programs, with particular emphasis on compiler construction and operating systems. Through the Continuing Education Program, he has extended his expertise to industry professionals, conducting numerous specialized courses for organizations including VSNL, TCS, DRDO, and Reliance.
Nathan Beckmann is a Courtesy Professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University, part of the College of Engineering. His research focuses on computer architecture, embedded systems, energy-efficient computing, and memory hierarchy design. He explores topics such as dataflow architectures, near-data computing, and cache optimization to enhance performance and reduce energy consumption in modern systems. His work spans both theoretical and applied aspects, including hardware-software co-design for reconfigurable systems, low-power IoT architectures, and novel caching strategies for emerging memory technologies like flash and MRAM. Key contributions include frameworks for ultra-low-power CGRAS, energy-minimal dataflow SoCs, and sustainable caching solutions. Dr. Beckmann's recent articles emphasize innovations in spatial dataflow programming models, task parallelism control, and polymorphic cache hierarchies. His research often targets real-world applications in edge computing, embedded systems, and high-performance datacenters.
Weija Shang is a Professor at the School of Engineering, Santa Clara University, where she has been since 1994. She previously served at the Center for Advanced Computer Studies, University of SW Louisiana (1990–1993). Her research spans parallel processing, computer architecture, parallelizing compilers, algorithm theory, and non-linear optimization. PhD in Computer Engineering, Purdue University (1990) MS in Computer Engineering, Purdue University (1984) BS in Computer Engineering, Changsha Institute of Technology (1982) Her publications focus on parallel computing , GPGPU optimization , FPGA design , and video coding techniques. Key themes include supernode transformations , media distribution algorithms , and stack optimization in recursive programs. Scientific awards include: Clare Boothe Luce Professor (1994–2000) NSF Research Initiation Award (1991) NSF Career Award (1995) She has supervised numerous research projects in parallel programming and compiler design, contributing to high-performance computing and distributed systems through collaborations with institutions like Xilinx and NASA.
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