Yiorgos Tsiatouhas is a Professor in the Department of Computer Science and Engineering at the University of Ioannina. He holds a B.Sc. in Physics (University of Athens, 1990), M.Sc. in Informatics and Telecommunications (University of Athens, 1993), and Ph.D. in Informatics and Telecommunications (University of Athens, 1999). His research focuses on VLSI circuit design, reliability engineering, and secure computing. He teaches courses such as 'Electronics' (MYY404), 'VLSI Circuits' (MYE018), and 'Reliable Integrated Systems' (Y2), emphasizing topics like CMOS technology, radiation-hardened electronics, and testing methodologies. His research interests span secure computing architectures, fault-tolerant systems, and aging monitoring in integrated circuits. Recent work includes developing radiation-hardened latches, PUF-based security solutions for SoCs, and novel testing algorithms for phase-change memories. He has also contributed to visible light communication (VLC) systems, addressing challenges like anti-reflective obstacle detection and adaptive signal decoding in non-line-of-sight (NLOS) environments. Teaching activities include supervising student projects, maintaining an active lab for SPICE-based circuit simulation, and integrating industry-standard tools like Cadence into coursework. His lab focuses on designing and testing analog/digital circuits, emphasizing practical skills in SPICE simulation and layout design.








