Hadi Esmaeilzadeh is an Associate Professor at the University of California, San Diego in the Department of Computer Science and Engineering . He previously served as an Assistant Professor at Georgia Tech (2013-2017) and holds the Halicioğlu Chair in Computer Architecture . As founder/director of the Alternative Computing Technologies (ACT) Laboratory and associate director of UCSD's Center for Machine Integrated Computing and Security (MICS) , his research drives cross-stack solutions for next-generation computer systems. Early tenure recipient at UCSD Coined the term "dark silicon" in computer architecture Developed Tabla/DnnWeaver open-source frameworks Research Interests span: Approximate Computing Neural Acceleration FPGA/ASIC Hardware Design Machine Learning Systems Dark Silicon Challenges Security/Privacy in Accelerated Systems Scientific Recognition : 4 CACM Research Highlights 4 IEEE Micro Top Picks Distinguished Paper Award (HPCA 2016) Inducted to ISCA Hall of Fame (2018) Teaching : Developed courses on accelerator design (CSE 240D) and alternative computing (CS 8803 ACT) Advocates for hands-on FPGA-based learning in Processor Design with FPGAs courses
Hadi Esmaeilzadeh is an Associate Professor at the University of California, San Diego in the Department of Computer Science and Engineering . He leads the Alternative Computing Technologies (ACT) Laboratory and serves as Associate Director of the Center for Machine Integrated Computing and Security (MICS) . Previously, he was an Assistant Professor at Georgia Institute of Technology. Ph.D., Computer Science and Engineering, University of Washington (2013) Research focuses on computer architecture , machine learning acceleration , and approximate computing His work has produced 15+ publications spanning IEEE Micro Top Picks , CACM Research Highlights , and ISCA . Key projects include: Tabla : Cross-stack ML acceleration framework DnnWeaver : Open-source DNN acceleration platform Major honors include: IEEE TCCA Young Computer Architect Award ISCA Hall of Fame Qualcomm Innovation Fellowship Georgia Tech PURA Award Teaching roles: CSE 141: Introduction to Computer Architecture CSE 240D: Accelerator Design for Deep Learning CSE 240A: Principles of Computer Architecture
Marco Di Renzo is a CNRS Research Director (Professor) and Head of the iPhyCom group at the Laboratory of Signals and Systems (L2S) at Paris-Saclay University, France. He is affiliated with both CNRS and CentraleSupélec. His roles include: Member of L2S Management Committee and Board Council Member of the Ph.D. School Admission Committee Academic Vice Chair, ETSI Industry Specification Group on RIS Editorial and leadership roles in IEEE communications journals Education: Laurea (cum laude) and Ph.D. in Electrical Engineering from University of L’Aquila (2003, 2007) Habilitation à Diriger des Recherches from Paris-Saclay University (2013) Research focuses on 6G networks , reconfigurable intelligent surfaces (RIS) , and integrated sensing and communications (ISAC) . He explores electromagnetic theory, machine learning applications, and energy-efficient wireless systems. His work addresses challenges in near-field communications, multi-user MIMO, and holographic beamforming. He advocates for physics-driven design principles in next-gen networks. Key awards include IEEE/IEE Fellowships, the Michel Monpetit Prize, and multiple IEEE Best Paper Awards. He holds international visiting professorships at institutions like the University of Oulu (Finland) and Nanyang Technological University (Singapore). Active in standardization via ETSI ISG RIS and contributes to global initiatives like the ITU 6G Vision. His research bridges theoretical models with practical implementations, emphasizing interdisciplinary collaboration between physics, signal processing, and AI.
Nam Sung Kim is the W. J. "Jerry" Sanders III-Advanced Micro Devices Inc. Endowed Chair and holds a Professorship in Electrical and Computer Engineering at the University of Illinois. He is also affiliated with the Siebel School of Computing and Data Science, Coordinated Science Lab, and National Center for Supercomputing Applications (NCSA). His research focuses on computer architecture, memory systems, chiplet integration, and hardware security. Key areas include energy-efficient computing, processing-in-memory (PIM), and mitigating hardware vulnerabilities like rowhammer attacks. Kim has received prestigious awards including IEEE Fellow (2016), MICRO Hall of Fame (2018), NAI Fellow (2023), and NSF CAREER Award (2015). His work spans publications in top venues like ASPLOS and IEEE journals, addressing topics such as CXL-based memory systems, DRAM module optimization, and GPU architecture improvements. Collaborations emphasize interdisciplinary research in hardware-software co-design and emerging technologies. His labs and teams at Coordinated Science Lab and NCSA drive innovations in scalable computing, near-memory processing, and cloud infrastructure for AI workloads. Ongoing projects include developing resilient memory hierarchies and accelerating large-scale machine learning models through novel architecture designs.
Prof. Bruno Clerckx is a Professor of Wireless Communications and Signal Processing at Imperial College London's Department of Electrical and Electronic Engineering, Faculty of Engineering. He leads the Communications and Signal Processing Group and the Wireless Communications and Signal Processing Lab. Education: M.Sc. and Ph.D. in Electrical Engineering from Université Catholique de Louvain, Belgium Doctor of Science (DSc) from Imperial College London Research Interests: Focuses on wireless communications and signal processing for next-generation networks, including MIMO systems, reconfigurable intelligent surfaces (RIS), rate-splitting multiple access (RSMA), and integrated sensing and communications (ISAC). His work emphasizes 6G technologies, full-duplex systems, and energy-efficient architectures. Key contributions include pioneering research on beyond-diagonal RIS and RSMA prototyping. Awards: 2021 Blondel Medal (France) 2021 Adolphe Wetrems Prize (Royal Academy of Belgium) Fellowships from IEEE and IET IEEE Communications Society Distinguished Lecturer (2021-2023) Labs & Teams: Heads the Wireless Communications and Signal Processing Lab, and is affiliated with the IEEE Special Interest Groups on RSMA and BD-RIS. Collaborates with global institutions including Stanford University, Tsinghua University, and Samsung Electronics. Industry Experience: Former CTO of Silicon Austria Labs and contributor to 4G/5G standards at Samsung. Holds 80+ patents and authored two books on MIMO systems.
Lan Wei is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Waterloo, Canada. She leads the Waterloo Emerging Integrated Systems Group, focusing on device-circuit co-optimization, cryogenic CMOS for quantum computing, and emerging technologies like GaN, RRAM, and low-dimensional materials. Her work bridges nanoelectronics and system-level applications, with notable contributions to the MIT Virtual Source GaN HEMT (MVSG) compact model, an industry-standard tool. Education: B.S. in Microelectronics and Economics, Peking University (2005) M.S. and Ph.D. in Electrical Engineering, Stanford University (2007, 2010) Research Interests: Nanoelectronic devices Cryogenic CMOS for quantum computing GaN-based circuits and systems RRAM-based neuromorphic computing Device-circuit interactive design Publications reflect her expertise in GaN modeling, quantum computing hardware, and RRAM applications. Recent work emphasizes scalable quantum control circuits and error-resilient neural networks using emerging technologies. Awards include the 2019 Ontario Early Researcher Award and the 2020 UWaterloo President's Excellence Award in Research. She has served on technical committees for IEDM, DATE, and ICCAD, and contributed to the ITRS roadmap. Teaching includes courses like ECE 240 (Electronic Circuits) and ECE 730 (Solid State Devices). Her group actively seeks graduate students with interest in integrated systems and nanoelectronics.
Haryadi S. Gunawi is a Professor in the Department of Computer Science at the University of Chicago where he leads the UCARE research group (UChicago systems research on Availability, Reliability, and Efficiency). His work focuses on improving the dependability of storage and cloud computing systems, with a particular emphasis on addressing performance stability, reliability, and scalability challenges in modern computing environments. Dr. Gunawi received his Ph.D. in Computer Science from the University of Wisconsin, Madison in 2009. Following his doctoral studies, he was a postdoctoral fellow at the University of California, Berkeley from 2010 to 2012 before joining the University of Chicago faculty. His research focuses on three main areas: (1) performance stability, where he builds storage and distributed systems robust to latency tails and "limping" hardware; (2) reliability and scalability, where he addresses concurrency and scalability bugs in cloud-scale distributed systems; and (3) the intersection of machine learning and systems, exploring how machine learning techniques can solve operating and storage system problems. His work often combines theoretical insights with practical system implementations that address real-world challenges in cloud and storage infrastructure. Dr. Gunawi's publication record shows a consistent focus on storage and cloud system reliability, with recent work increasingly incorporating machine learning techniques to address traditional systems challenges. His research spans the full stack from hardware interfaces to distributed system design, with a strong emphasis on practical solutions that can be deployed in production environments. His work often involves close collaboration with industry partners to ensure real-world relevance and impact. Dr. Gunawi has received numerous prestigious awards including the NSF CAREER award, NSF Computing Innovation Fellowship, Google Faculty Research Award, multiple NetApp Faculty Fellowships, and an Honorable Mention for the 2009 ACM Doctoral Dissertation Award. He has also received the Provost's Global Faculty Award and Facebook Faculty Research Award, highlighting the broad recognition of his contributions to the field. As an advisor, Dr. Gunawi has mentored several PhD students including Ruidan Li, Ray Andrew, Rani Ayu Putri, and William Nixon. His research has been supported by major grants from NSF, Google, Facebook, and NetApp, enabling his team to pursue ambitious research projects at the intersection of systems, storage, and machine learning. Dr. Gunawi leads the UCARE research group at UChicago, which focuses on improving the dependability of storage and cloud-scale distributed systems. He is also involved with the Chameleon cloud research infrastructure project and the broader Systems Group at UChicago, contributing to a vibrant research community focused on systems, programming languages, and software engineering.
Prof. Dr. Amelie Hagelauer holds a professorship in Micro- and Nanosystem Technology at the TUM School of Computation, Information and Technology, Technical University of Munich. Her work focuses on advanced electronics and systems integration across quantum computing hardware, resistive memory technologies, and high-frequency RF systems. She has contributed to innovations in superconducting qubit readout architectures, multi-level RRAM designs, and 3D-integrated CMOS-compatible quantum devices. Research interests span quantum hardware design, nanoelectronic devices, RF front-end systems, and emerging memory technologies. Her work emphasizes practical implementation challenges such as low-power operation, high-voltage handling in RF switches, and wafer-scale fabrication processes. Recent projects include D-band radar systems, energy-efficient 60 GHz transceivers, and antenna tuning solutions for 5G applications. Publications from 2023-2025 showcase advancements in resistive switching device characterization, mitigation of TLS losses in superconducting qubits, and reconfigurable AI accelerators using RRAM-based digital twins. Her work bridges theoretical device physics with practical integrated circuit design, addressing scalability and reliability in next-gen electronics. Awards and grants: None explicitly listed in provided texts. Active collaborations include EU-funded projects on quantum computing platforms and TUM's Electronic Photonic Integration initiatives. Leads research teams in microsystem technology with emphasis on cross-disciplinary approaches combining CMOS processes, MEMS, and quantum engineering.
Prof Aaron Thean is the Deputy President (Academic Affairs) and Provost at the National University of Singapore (NUS). Formerly, he served as Dean of the College of Design and Engineering at NUS and held senior roles at IMEC (Belgium) as Vice President of Logic Technologies and Director of Logic Devices Research. His expertise spans advanced semiconductor device technologies, including FinFETs, nanowire FETs, III-V/Ge channels, and emerging beyond-CMOS architectures. He holds degrees from the University of Illinois Urbana-Champaign (B.Sc., M.Sc., Ph.D. in Electrical Engineering) and has published over 300 papers with 50+ patents. His awards include the Gregory Stillman Award (2001) and Compound Semiconductor Innovation Award (2014). Research interests focus on semiconductor innovation, device-process co-optimization (DTCO), and monolithic 3D integration. Notable contributions include industry-first Gate-First HKMG technologies, advanced strained silicon platforms, and neuromorphic computing hardware. His work bridges academia and industry through collaborations with Qualcomm, IBM, and foundry partners. Current initiatives emphasize energy-efficient computing and wearable sensor systems. Prof Thean’s leadership spans NUS-wide academic strategy and global research partnerships. His technical legacy includes foundational advancements in transistor scaling, low-power CMOS design, and AI-driven failure analysis methodologies.
Prof. Dr.-Ing. Thomas Zwick is a full professor and director of the Institute of High Frequency Engineering and Electronics (IHE) at the Karlsruhe Institute of Technology (KIT). He holds a Dipl.-Ing. (M.S.E.E.) and Dr.-Ing. (Ph.D.E.E.) from the University of Karlsruhe. His career includes roles at IBM Research (2001–2004), Siemens AG (2004–2007 managing automotive radar teams), and KIT since 2007. He leads research in high-frequency technologies, antennas, radar systems, and wireless communications. Research interests include radio wave propagation, antenna design, automotive radar architectures, and millimeter-wave systems. He has authored/co-authored over 400 papers, 20 patents, and received IEEE Fellow status (2018), honorary doctorate from Budapest University (2022), and membership in the Heidelberg Academy and acatech. His work emphasizes integrating sensing and communication systems, 3D-printed RF components, and high-frequency measurement techniques. Teaching focuses on high-frequency engineering, electronic circuits, and radar systems. He oversees the IHE’s laboratories, including the Microwave Engineering Lab and Student Innovation Lab. Recent work explores sub-THz communication, RIS-aided ISAC systems, and beamforming for reduced EMF exposure in urban scenarios.
Dr. Jing Li is an Associate Professor and Eduardo D. Glandt Faculty Fellow at the University of Pennsylvania , holding dual appointments in the Electrical and Systems Engineering and Computer and Information Science departments. As co-director of the CyberSavvy nationwide security research center and director of the Penn Computational Intelligence Lab (PennCIL) , she pioneers innovations in non-von Neumann computing paradigms. Her research spans post-CMOS technologies, in-memory computing, and hardware-software co-design for security and AI applications. PhD in Computer Engineering, Purdue University (2009) BSc in Electrical Engineering, Shanghai Jiaotong University (2004) Research Focus: Dr. Li's work addresses fundamental challenges in computer systems across the stack. Key areas include: In-Memory Computing: Liquid Silicon architecture combining RRAM with silicon CMOS through monolithic 3D integration Security Engineering: Transforming computer security from "Art" to formal "Engineering" discipline within CyberSavvy Virtualization: Cloud FPGA abstraction layers decoupling compilation from runtime resource management Graph Analytics: Degree-aware optimization techniques for massive-scale graph processing Deep Learning Systems: Roofline model extensions for FPGA-based CNN acceleration Scientific Impact: Awarded DARPA Young Faculty Award , NSF CAREER Award , and IBM CEO Milestone Award , her team has achieved world records in energy-efficient computing (ENIAD supercomputer). With 46 U.S. patents and over 80 publications, she leads ecosystem development for emerging computing architectures through initiatives like the open-source MEG simulation platform . Community Leadership: Dr. Li serves on program committees for flagship conferences ( ISCA , FPGA Symposium ), chairs the International Memory Workshop , and contributes to the MLsys conference's inaugural committee. She actively mentors through multiple PhD openings and industry collaborations.
Kay Severin is a full professor at the Laboratory of Supramolecular Chemistry (LCS) within École Polytechnique Fédérale de Lausanne (EPFL) , Switzerland. His research focuses on the design and reactivity of metal-ligand assemblies, including coordination cages, metalloligands, and supramolecular receptors. He has pioneered the use of metalloligands for constructing heterometallic architectures and developed systems for anion extraction and stimuli-responsive hydrogels. Key funder: Swiss National Science Foundation (FNS) Collaborative work with Rosario Scopelliti and Farzaneh Fadaei Tirani Research Interests: Severin's work spans supramolecular chemistry, organometallic synthesis, and functional materials. Recent projects include: Dynamic palladium-based hydrogels with anion-responsive crosslinks Gold(I)-driven nano-onion structures via π-stacking Triazene-derived ligands for Sandmeyer-type reactions Metalloligand assembly of Fe/Pd/Au heterotrimetallic cages Publication Trends: Over 300 publications since 1994, with recent emphasis on: Coordination-driven self-assembly (2024: 6 articles) Triazene and diazoolefin reactivity (2025: 4 articles) Metal-ligand interactions in nanogels and vesicles (2024-2025: 3 articles) Environmental applications in anion extraction (2025: 1 article)
Prof. Dimitris Gizopoulos is a Professor at the Department of Informatics & Telecommunications, University of Athens, leading the Computer Architecture Laboratory. His research focuses on fault tolerance, design validation, performance, and energy efficiency in microprocessors, GPUs, and AI accelerators. He is an IEEE Fellow (2013) and ACM Distinguished Member (2022). His work is supported by Horizon Europe projects like DARE, Neuropuls, and Vitamin-V, alongside industry grants from AMD, Cisco, and Meta. He participates in networks like HiPEAC and Eurolab4HPC and serves on editorial boards of journals including ACM Computing Surveys and IEEE Transactions on Computers . Prof. Gizopoulos teaches Computer Architecture courses at both undergraduate and graduate levels. His research spans cross-layer reliability analysis, voltage scaling effects, and secure hardware design. Notable contributions include frameworks for GPU reliability assessment (GUFI, GPUI-4) and tools like MerLIN for microarchitecture-level analysis. His lab’s work has been funded by the EuroHPC Joint Undertaking and the Greek-China Research Collaboration program. Key Projects: DARE (RISC-V Europe), Neuropuls (neuromorphic accelerators), Vitamin-V (RISC-V cloud environments). Awards: IEEE Fellow (2013), ACM Distinguished Member (2022), IEEE Golden Core (since 2002). Industry Partnerships: AMD, Cisco, Bosch, NVIDIA, Intel, IBM Research. Labs: Leads the Computer Architecture Lab, focusing on fault tolerance and energy-efficient computing. His work emphasizes bridging hardware-software co-design challenges, with publications in top venues like IEEE Transactions on Computers and ACM Computing Surveys . Recent efforts include analyzing silent data corruptions (SDCs) in CPUs and GPUs, and developing validation frameworks for cloud-native architectures.
Jiaxin Lin is an Assistant Professor in the Department of Electrical and Computer Engineering at Cornell University , affiliated with the Computer Systems Laboratory . She earned her Ph.D. in Computer Science from UT Austin (2025) , preceded by an M.S. from University of Wisconsin-Madison and a B.S. from ShenYuan Honors College at Beihang University. Her research focuses on co-designing software and hardware systems to enable high-performance data center communication, particularly through: Programmable network interface controllers (SmartNICs) Terabit network system stacks Cache/memory interconnects Compilers for in-network computing Chip-to-chip interconnects Her work addresses challenges in portability across heterogeneous SmartNICs, demonstrated through the development of the Alkali compiler framework (NSDI '25). Key themes include hardware abstraction, data center scalability, and network-compute co-design. Scientific Awards: Google Junior Faculty Award (2025) MIT EECS Rising Star (2024) Google Ph.D. Fellowship (2021) Meta Ph.D. Fellowship (2021)
Daniele Ielmini is a Professor at the Department of Electronics, Information and Bioengineering at Politecnico di Milano, Italy, where he leads research in non-volatile memory technologies and neuromorphic computing. He received his Laurea (with merit) and Ph.D. in Nuclear Engineering from Politecnico di Milano in 1995 and 2000, respectively, and has held visiting positions at Intel Corporation (2006), Stanford University (2006), and the University of Illinois at Urbana-Champaign (2010). His research focuses on the modeling and characterization of non-volatile memories, including nanocrystal memory, charge trap memory, phase change memory (PCM), resistive switching memory (RRAM), and spin-transfer torque magnetic memory (STT-MRAM). He has co-edited the book 'Resistive switching – from fundamental redox-processes to device applications' and published over 300 papers with more than 10,000 citations and an H-index of 69 (Scopus, September 2023). Prof. Ielmini's recent publications demonstrate a strong trend toward in-memory computing and neuromorphic applications, with particular emphasis on closed-loop analog computing architectures, reservoir computing with 2D materials, and hardware security implementations using emerging memory technologies. His work bridges fundamental device physics with practical computing applications, especially for energy-efficient AI acceleration. Intel Outstanding Researcher Award (2013) ERC Consolidator Grant (2014) IEEE-EDS Paul Rappaport Award (2015) Fellow of the IEEE Prof. Ielmini leads multiple ERC-funded projects including SHANNON (Secure Hardware with Advanced Nonvolatile memories), NEURO2D (neuromorphic systems based on reservoir computing in MoS2), and ANIMATE (closed-loop in-memory computing). His research group includes post-doctoral researchers, PhD students, and M.Sc. students working on various aspects of emerging memory technologies and their applications. He serves as Associate Editor for IEEE Trans. Nanotechnology and Semiconductor Science and Technology (IOP), and has served in several Technical Subcommittees of international conferences including IEEE-IEDM, IEEE-IRPS, and IEEE-ISCAS. His laboratory at Politecnico di Milano is equipped with advanced semiconductor device testing equipment including probe-stations, semiconductor parameter analyzers, high-speed waveform generators, and other specialized instruments for nano-electronic research. The lab collaborates with major semiconductor companies including Micron Technology Inc. and STMicroelectronics, as well as participating in national and international research projects.
